Add a missing memset to acpi_create_spcr().
The other acpi_create_xxxx() functions perform a memset on their
structures, acpi_create_spcr() does not and as a result the contents of
this table are partly uninitialized (and thus random after every reset).
Fixes: b288cd9600 ("x86: acpi: Generate SPCR table")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix the tags format in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Currently, the calculation for the length of the DSDT table includes any
bytes that are added for alignment, but those bytes are not initialized.
This is because the DSDT length is calculated after a call to
acpi_inc_align(). Split this up into the following sequence:
* acpi_inc()
* Calculate DSDT length
* acpi_align()
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The term eMMC is used inconsistently within the FSP devicetree
bindings (e-mmc and emmc), especially for "emmc-host-max-speed"
documentation and code disagree.
Change all eMMC instances within the FSP bindings to consistently
use "emmc". The term "emmc" is already used a lot within U-Boot,
while "e-mmc" is only used in the FSP bindings.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* 'master' of git://git.denx.de/u-boot: (113 commits)
doc: qemu: debug UART settings for QEMU ARM virt
MAINTAINERS: add myself as reviewer for SquashFS
MAINTAINERS: add myself as reviewer for SquashFS
lib: fdt: Fix fdtdec_setup_mem..() conversion to livetree API
include: phy: fix NULL pointer check in phy_write()
MAINTAINERS: update clk entry git tree
rockchip: make_fit_atf: ignore empty PT_LOAD segment
rockchip: rv1108: enable board early init
rockchip: rv1108: Enable grf as pre-reloc node
rockchip: rv1108: use correct API for board callback
Azure/GitLab/Travis: Add SH4 r2dplus machine with various PCI ethernet options
mmc: xenon_sdhci: Add missing common host capabilities
mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
efi_selftest: restore gd before do_reset()
efi_loader: save global data pointer on RISC-V
riscv: define function set_gd()
efi_loader: efi_var_mem_notify_exit_boot_services
rsa: crash in br_i32_decode() called from rsa_gen_key_prop()
test: do no assume hush parser in validate_empty()
Makefile: mrproper shall delete doc/output/
...
This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration
code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs
have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8.
Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so
update u-boot to remove decoding and support for those parts.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16
Reported-by: Coverity 3448860
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.
Reported-by: Coverity 10045172
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.
Reported-by: Coverity 18045
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Pull request for UEFI sub-system for efi-2020-10-rc5
The following bugs are fixed:
* unaligned access in br_i32_decode()
* missing restore of global data pointer in UEFI selftest
* missing restore of global data pointer on RISC-V in UEfI subsystem
* efi_var_mem_notify_exit_boot_services() should not be __efi_runtime
Function set_gd() is needed in the UEFI sub-system if the global data
pointer is stored in a register.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
50 MHz generated from PLL4Q cannot be divided well enough to produce
accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz
instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz,
which is in tolerance for the SDMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Gerald Baeza <gerald.baeza@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
There is no dedicated pull resistor on the AV96 UART4 (console UART)
pin. In case there is no UART adapter installed on the AV96, the line
is floating and can trigger reception of garbage characters, which in
turn can abort U-Boot autoboot. Add default pull up to mitigate this
problem.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Remove the unnecessary inversion on the eth_env_set_enetaddr() result which
only make complex the code of setup_mac_address() and display an invalid
value in the associated pr_err.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Instead of querying SDM for FPGA configuration status through mailbox
messages, U-Boot now checks System Manager's FPGA Config status register
for FPGA configuration status before resetting bridge.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add g_dnl_get_board_bcd_device_number, the new BCD value is used by uuu to distinguish
if the SPL supports the SDPV.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
This commit fixes initialization of COMPHY on EspressoBin.
Commit 22f418935b ("phy: marvell: a3700: Use comphy_mux on Armada
37xx.") introduced usage of comphy_mux on Armada 37xx comphy driver.
The lanes are defined in comphy_a3700.c as described in functional
specification, that is:
lane 0 is SGMII1 or USB3
lane 1 is PCIe or SGMII0
lane 2 is SATA or USB3
But the DTS for EspressoBin configures PCIe on lane 0 and USB3 on
lane 1, which is wrong in the sense of the specification and doesn't
work with the comphy_mux code, which is 2 years now (the aardvark driver
causes synchronous abort in U-Boot).
It worked till the above mentioned commit, because the code for powering
up PCIe PHY doesn't work with lane number at all, and the code for
powering up USB3 PHY works differently only if USB3 is on lane 2, ie.
the check goes like:
if (lane == 2)
something
else
something else
so it does not differentiate between lanes 0 and 1.
In the future I shall post patches that remove the comphy_a3700 driver
and add comphy driver which uses calls to ATF, like Linux' driver does.
This will have the advantage of same DTS bindings as Linux', but till
this is done, we need this patch.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Pali Rohár <pali@kernel.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
Update the ringacc and udma dt nodes to use the latest RM resource types
similar to the ones used in k3-j721e dt nodes.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.
Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
* 'master' of git://git.denx.de/u-boot: (117 commits)
Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 support
cmd: provide command sbi
configs: defconfig for Sipeed Maix in S-mode
riscv: fix building with CONFIG_SPL_SMP=n
clk: kendryte/pll.h: do not redefine nop()
ram: sifive: Fix compiler warnings for 32-bit
riscv: fu540: Use correct API to get L2 cache controller base address
xen: Code style conformity
board: xen: Remove unnecessary CONFIG_INITRD_TAG and CONFIG_CMDLINE_TAG
board: xen: Remove CONFIG_CMD_RUN define and clean xenguest_arm64_defconfig
MAINTAINERS: Add maintainers to XEN section
board: xen: Remove unnecessary CONFIG_BOARD_EARLY_INIT_F define and board_early_init_f function
arm: dts: mt7623: add USB nodes
arm: dts: mt7622: add USB nodes
arm: dts: rename mt7622-bpi-r64.dts
clk: mt7622: add needed clocks for ssusb-node
ahci: mediatek: fix copyright and author-lines
reset: drop unnecessary comment for pciesys
phy: mtk-tphy: make shared reg optional for v1
...
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
This patch adds support for all OcteonTX2 96xx/95xx
boards from Marvell.
For 96xx boards, use octeontx_96xx_defconfig and
for 95xx boards, use octeontx_95xx_defconfig.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
This patch adds support for all OcteonTX 81xx/83xx
boards from Marvell.
For 81xx boards, use octeontx_81xx_defconfig and
for 83xx boards, use octeontx_83xx_defconfig.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Provide a command to display information about the SBI implementation.
The output might look like:
=> sbi
SBI 0.2
OpenSBI
Extensions:
sbi_set_timer
sbi_console_putchar
sbi_console_getchar
sbi_clear_ipi
sbi_send_ipi
sbi_remote_fence_i
sbi_remote_sfence_vma
sbi_remote_sfence_vma_asid
sbi_shutdown
SBI Base Functionality
Timer Extension
IPI Extension
RFENCE Extension
Hart State Management Extension
The command can be used to construct a unit test checking that the
communication with the SEE is working.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Building with CONFIG_SPL_SMP=n results in:
arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
arch/riscv/lib/spl.c:33:6:
error: unused variable ‘ret’ [-Werror=unused-variable]
33 | int ret;
| ^~~
Define the variable ret as __maybe_unused.
Fixes: 191636e448 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL")
Fixes: 8c59f2023c ("riscv: add SPL support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
At present fdtdec_get_addr() is used to get L2 cache controller base
address. This only works for a fixed #address-cells and #size-cells.
Change to use fdtdec_get_addr_size_auto_parent() instead.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
