VOP2 (Video Output Processor v2) is a display controller on Rockchip
SoCs. It can be found on RK3566/8 and RK3588.
This commit currently only supports RK3566/8.
Signed-off-by: Dang Huynh <danct12@riseup.net>
This is without the SD controller support, because I have a broken
uSD slot on my board. Until that's fixed, it needs to be disabled.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
There's no other way to load bitstream file to Zynq 7000 via SPL
otherwise, and SPL just reports:
zynq_validate_bitstream: Bitstream is not validated yet (diff 6c)
spl_fit_upload_fpga: Cannot load the image to the FPGA
This is similar to code in boot/image-board.c
Signed-off-by: Ondrej Jirman <megi@xff.cz>
cpll in U-Boot runs at 384 MHz, set various VOP related clocks to produce
roughly 400 and 100 MHz just like in Linux.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
This is used for video output using video bridge implementation of
MIPI-DSI, like with the recently added dw_mipi_dsi_rockchip.c
driver.
The original code path when the UCLASS_DISPLAY device is found is
untouched. The video bridge branch is taken only when the
UCLASS_VIDEO_BRIDGE device is found at the remote endpoint's parent.
This was tested to work on Pinephone Pro.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Chris Morgan <macromorgan@hotmail.com>
Calculate burst mode overhead in one place for both internal
and external PHY use case and exit if out of range, instead
of ignoring the wrong value.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Shows a menu of items that can be controlled using touch panel.
This is useful for touch based devices like tablets to select
alternative boot options (multi-boot).
Signed-off-by: Ondrej Jirman <megous@megous.com>
Touchapnel devices are useful in u-boot for implementation of boot
menu user interfaces on tablets and other touch based devices.
This uclass implements start, stop and get_touches interface methods.
Signed-off-by: Ondrej Jirman <megous@megous.com>
UART pinctrl for serial is typically applied multiple times:
- in external TPL
- in SPL for DEBUG_UART in board_debug_uart_init()
- in SPL using pinctrl from DT
- in pre-reloc phase using pinctrl from DT
- after relocation using pinctrl from DT
Skip including UART pinctrl for the the pre-reloc phase to save time
during boot. On a Radxa ROCK 5B this reduce boot time by ~150 ms.
After this a warning may be shown with LOGLEVEL=5 (or higher), it is
safe to ignore this warning as device probe is successful even when
pinctrl cannot be applied:
ns16550_serial serial@feb50000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
UART pinctrl for serial is typically applied multiple times:
- in external TPL
- in SPL for DEBUG_UART in board_debug_uart_init()
- in SPL using pinctrl from DT
- in pre-reloc phase using pinctrl from DT
- after relocation using pinctrl from DT
Skip including UART pinctrl for the the pre-reloc phase to save time
during boot. On a Radxa ZERO 3W this reduce boot time by ~120 ms.
After this a warning may be shown with LOGLEVEL=5 (or higher), it is
safe to ignore this warning as device probe is successful even when
pinctrl cannot be applied:
ns16550_serial serial@fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
UART pinctrl for serial is typically applied multiple times:
- in external TPL
- in SPL using pinctrl from DT
- in pre-reloc phase using pinctrl from DT
- after relocation using pinctrl from DT
Skip including UART pinctrl for the the pre-reloc phase to save time
during boot. On a Radxa ROCK Pi S this reduce boot time by ~80 ms.
After this a warning may be shown with LOGLEVEL=5 (or higher), it is
safe to ignore this warning as device probe is successful even when
pinctrl cannot be applied:
ns16550_serial serial@ff0a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Add aliases for gpio controllers to soc u-boot dtsi files that are
missing aliases in soc dtsi files to ensure dev_seq() return the
expected number when a gpio controller is included in SPL.
Also drop the aliases from rk3288-u-boot.dtsi, they are already part of
rk3288.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Add a request() ops that call pinctrl_gpio_request() when the required
gpio-ranges prop has been defined to signal pinctrl driver to use gpio
pinmux.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Use the pinctrl pin offset to get_gpio_mux() to remove the bank num
dependency and instead only use the bank num to assign a bank name.
Most Rockchip SoCs use all 32 pins of each gpio controller, meaning the
pinctrl pin offset typically is aligned to 32.
However, for gpio0 on RK3288 only 24 pins are used meaning the pinctrl
pin offset start at pin 24 for gpio1. Use DIV_ROUND_UP to get the 32 pin
aligned bank num.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Get pinctrl device from gpio-ranges phandle when the property exists,
fallback to get the first pinctrl device.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Implement gpio_request_enable() ops so that the gpio request() ops can
be implemented and a gpio requested pin automatically is pinmuxed for
gpio use, similar to Linux kernel.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
