linux-mainline: Added LINUX_VERSION variable

Fixes:

File "/home/retpolanne/Dev/orange-pi-one-plus-image/poky/scripts/lib/devtool/standard.py", line 839, in modify
if (os.path.exists(srcdir) and os.listdir(srcdir)) and (kernelVersion in staging_kerVer and staging_kbranch == kbranch):
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TypeError: 'in ' requires string as left operand, not NoneType

While running devtool modify virtual/kernel.


Signed-off-by: Marek Belisko <marek.belisko@gmail.com>

README.md

@@ -19,24 +19,36 @@ Maintainers:
 Kernel / U-Boot Version
 ===========
 Most Allwinner devices and hardware are supported in mainline kernel and U-Boot, so this layer builds mainline by default.
+
+Legacy sunxi Kernel / U-Boot
+-----------
+
 There is a custom U-Boot and Kernel version for sunxi devices which includes some special drivers not mainlined.
-These versions are rather old (3.4 for kernel and 2014.04 for U-Boot), but may support more functions and devices than current mainline
+These versions are rather old (3.4 for kernel and 2014.04 for U-Boot), but may support more functions and devices than current mainline.
 
 If you want to switch back to sunxi versions for some reasons (no device tree available, unsupported hardware), either:
 - change the file conf/machine/include/sunxi.inc to include the following block
 - edit your conf/local.conf to add the following block
 
-	PREFERRED_PROVIDER_u-boot="u-boot-sunxi"
-	PREFERRED_PROVIDER_virtual/bootloader="u-boot-sunxi"
-	PREFERRED_PROVIDER_virtual/kernel="linux-sunxi"
+		PREFERRED_PROVIDER_u-boot="u-boot-sunxi"
+		PREFERRED_PROVIDER_virtual/bootloader="u-boot-sunxi"
+		PREFERRED_PROVIDER_virtual/kernel="linux-sunxi"
+		KERNEL_DEVICETREE = ""
 
 If you already have built the mainline versions it might be necessary to reset the build directories with:
 
 	bitbake -c clean virtual/kernel virtual/bootloader
 
-For mainline kernel we have now support for latest LTS, stable and bleeding edge (latest possible rc).
+Mainline Kernel / U-Boot
+-----------
+
+For mainline kernel we have now support for latest LTS and stable.
 By default we use latest LTS. If you would like to change version please update ```PREFERRED_VERSION_linux-mainline``` in:
-* [conf/machine/include/sunxi.inc](https://github.com/linux-sunxi/meta-sunxi/blob/4921234ed77f9df77c65c88637ce50468f65bde7/conf/machine/include/sunxi.inc#L16)
+* [conf/machine/include/sunxi.inc](https://github.com/linux-sunxi/meta-sunxi/blob/fa0846c0eb23e3424b89acb4d5a327e921f73497/conf/machine/include/sunxi.inc#L16)
+
+When using mainline kernel ≥ 5.2 it is now possible to use the mainline graphics drivers *lima* and *panfrost*, instead of the *mali* driver provided by ARM. To enable open source mainline graphics support add the following line in your `local.conf`:
+
+    MACHINEOVERRIDES .= ":use-mailine-graphics"
 
 Performance
 ===========

classes/sdcard_image-sunxi.bbclass

@@ -13,11 +13,14 @@ inherit image_types
 #
 #
 
+# Use an uncompressed ext4 by default as rootfs
+SDIMG_ROOTFS_TYPE ?= "ext4"
+
 # This image depends on the rootfs image
-IMAGE_TYPEDEP_sunxi-sdimg = "${SDIMG_ROOTFS_TYPE}"
+IMAGE_TYPEDEP:sunxi-sdimg = "${SDIMG_ROOTFS_TYPE}"
 
 # Boot partition volume id
-BOOTDD_VOLUME_ID ?= "${MACHINE}"
+BOOTDD_VOLUME_ID ?= "boot"
 
 # Boot partition size [in KiB]
 BOOT_SPACE ?= "40960"
@@ -25,8 +28,6 @@ BOOT_SPACE ?= "40960"
 # First partition begin at sector 2048 : 2048*1024 = 2097152
 IMAGE_ROOTFS_ALIGNMENT = "2048"
 
-# Use an uncompressed ext4 by default as rootfs
-SDIMG_ROOTFS_TYPE ?= "ext4"
 SDIMG_ROOTFS = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.${SDIMG_ROOTFS_TYPE}"
 
 do_image_sunxi_sdimg[depends] += " \
@@ -40,7 +41,7 @@ do_image_sunxi_sdimg[depends] += " \
 # SD card image name
 SDIMG = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.sunxi-sdimg"
 
-IMAGE_CMD_sunxi-sdimg () {
+IMAGE_CMD:sunxi-sdimg () {
 
 	# Align partitions
 	BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE} + ${IMAGE_ROOTFS_ALIGNMENT} - 1)
@@ -94,6 +95,10 @@ IMAGE_CMD_sunxi-sdimg () {
 	then
 		mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::boot.scr
 	fi
+        if [ -e "${DEPLOY_DIR_IMAGE}/splash.bmp" ]
+        then
+                mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/splash.bmp ::splash.bmp
+        fi
 
 
 	# Add stamp file
@@ -116,7 +121,7 @@ IMAGE_CMD_sunxi-sdimg () {
 }
 
 # write uboot.itb for arm64 boards
-IMAGE_CMD_sunxi-sdimg_append_sun50i () {
+IMAGE_CMD_sunxi-sdimg:append:sun50i () {
 	if [ -e "${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY}" ]
 	then
 		dd if=${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY} of=${SDIMG} bs=1024 seek=40 conv=notrunc

conf/layer.conf

@@ -12,6 +12,6 @@ BBFILE_PRIORITY_meta-sunxi = "10"
 # cause compatibility issues with other layers
 LAYERVERSION_meta-sunxi = "1"
 
-LAYERDEPENDS_meta-sunxi = "core openembedded-layer"
+LAYERDEPENDS_meta-sunxi = "core meta-python"
 
-LAYERSERIES_COMPAT_meta-sunxi = "morty pyro rocko sumo thud warrior"
+LAYERSERIES_COMPAT_meta-sunxi = "honister kirkstone"

conf/machine/bananapi-m2-zero.conf

@@ -0,0 +1,10 @@
+#@TYPE: Machine
+#@NAME: bananapi-m2-zero
+#@DESCRIPTION: Machine configuration for the Banana Pi M2 Zero, base on Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+require conf/machine/include/hardware/ap6212a.inc
+
+KERNEL_DEVICETREE = "sun8i-h2-plus-bananapi-m2-zero.dtb"
+UBOOT_MACHINE = "bananapi_m2_zero_defconfig"
+

conf/machine/bananapi-m2m.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: bananapi-m2m
+#@DESCRIPTION: Machine configuration for the Banana Pi M2M, base on Allwinner H8 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-r16-bananapi-m2m.dtb"
+UBOOT_MACHINE = "Bananapi_m2m_defconfig"
+

conf/machine/bananapi-m2plus.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: bananapi-m2plus
+#@DESCRIPTION: Machine configuration for the Banana Pi M2+, base on Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-bananapi-m2-plus.dtb"
+UBOOT_MACHINE = "bananapi_m2_plus_h3_defconfig"
+

conf/machine/bananapi-m64.conf

@@ -0,0 +1,8 @@
+#@TYPE: Machine
+#@NAME: pine64-plus
+#@DESCRIPTION: Machine configuration for the pine64-plus, based on Allwinner A64 CPU
+
+require conf/machine/include/sun50i.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-a64-bananapi-m64.dtb"
+UBOOT_MACHINE = "bananapi_m64_defconfig"

conf/machine/include/hardware/ap6212a.inc

@@ -0,0 +1,5 @@
+# Include for boards with AMPAK 6212A Wifi / Bluetooth module
+# https://linux-sunxi.org/Wifi#Ampak
+
+MACHINE_EXTRA_RRECOMMENDS:append = " kernel-module-brcmfmac"
+MACHINE_EXTRA_RDEPENDS:append = " linux-firmware-bcm43430"

conf/machine/include/sun4i.inc

@@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa8.inc
+require conf/machine/include/arm/armv7a/tune-cortexa8.inc
 
 SOC_FAMILY = "sun4i"

conf/machine/include/sun50i-h616.inc

@@ -0,0 +1,9 @@
+require conf/machine/include/sunxi64.inc
+
+DEFAULTTUNE ?= "cortexa53-crypto"
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
+
+MACHINEOVERRIDES =. "sun50i:"
+
+SOC_FAMILY = "sun50i-h616"
+

conf/machine/include/sun50i.inc

@@ -1,4 +1,6 @@
 require conf/machine/include/sunxi64.inc
-require conf/machine/include/arm/arch-armv8a.inc
+
+DEFAULTTUNE ?= "cortexa53-crypto"
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
 
 SOC_FAMILY = "sun50i"

conf/machine/include/sun5i.inc

@@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa8.inc
+require conf/machine/include/arm/armv7a/tune-cortexa8.inc
 
 SOC_FAMILY = "sun5i"

conf/machine/include/sun7i.inc

@@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa7.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc
 
 SOC_FAMILY = "sun7i"

conf/machine/include/sun8i.inc

@@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa7.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc
 
 SOC_FAMILY = "sun8i"

conf/machine/include/sunxi-mali-driver.inc

@@ -0,0 +1,15 @@
+PREFERRED_PROVIDER_virtual/mesa ?= "mesa-gl"
+PREFERRED_PROVIDER_virtual/libgl ?= "mesa-gl"
+PREFERRED_PROVIDER_virtual/libgles1 ?= "sunxi-mali"
+PREFERRED_PROVIDER_virtual/libgles2 ?= "sunxi-mali"
+PREFERRED_PROVIDER_virtual/egl ?= "sunxi-mali"
+
+PACKAGECONFIG:remove:pn-xserver-xorg = "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'glamor', '', d)}"
+
+XSERVER += "sunxi-mali \
+            sunxi-mali-dev"
+
+MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += "\
+ kernel-module-mali \
+ kernel-module-mali-drm \
+  "

conf/machine/include/sunxi-mali.inc

@@ -1,13 +1,5 @@
-PREFERRED_PROVIDER_virtual/mesa ?= "mesa-gl"
-PREFERRED_PROVIDER_virtual/libgl ?= "mesa-gl"
-PREFERRED_PROVIDER_virtual/libgles1 ?= "sunxi-mali"
-PREFERRED_PROVIDER_virtual/libgles2 ?= "sunxi-mali"
-PREFERRED_PROVIDER_virtual/egl ?= "sunxi-mali"
-
-XSERVER += "sunxi-mali \
-            sunxi-mali-dev"
-
-MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += "\
- kernel-module-mali \
- kernel-module-mali-drm \
-  "
+# The "sunxi-mailine-graphics-drivers.inc" doesn't exist, but it can be created
+# in the future if needed.  Using include directive ensures build doesn't fail
+# if .inc file doesn't exist:
+# https://www.yoctoproject.org/pipermail/yocto/2019-August/046484.html
+include ${@'sunxi-mali-driver.inc' if 'use-mailine-graphics' not in d.getVar("MACHINEOVERRIDES").split(":") else 'sunxi-mailine-graphics-drivers.inc' }

conf/machine/include/sunxi.inc

@@ -1,26 +1,27 @@
 SOC_FAMILY ??= ""
 include conf/machine/include/soc-family.inc
 
+MACHINEOVERRIDES =. "sunxi:"
+
 # Sub-architecture support
 MACHINE_SOCARCH_SUFFIX ?= ""
 MACHINE_SOCARCH_SUFFIX_sun4i = "-sun4i"
 
 PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
 XSERVER = "xserver-xorg \
-           xf86-video-fbturbo \
            xf86-input-evdev \
            xf86-input-mouse \
            xf86-input-keyboard"
 
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
-PREFERRED_VERSION_linux-mainline ?= "4.19%"
+PREFERRED_VERSION_linux-mainline ?= "5.15.%"
 PREFERRED_PROVIDER_u-boot ?= "u-boot"
 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
 
 KERNEL_IMAGETYPE ?= "uImage"
 
 IMAGE_CLASSES += "sdcard_image-sunxi"
-IMAGE_FSTYPES += "ext3 tar.gz sunxi-sdimg"
+IMAGE_FSTYPES += "ext3 tar.gz sunxi-sdimg wic.gz wic.bmap"
 
 MACHINE_EXTRA_RRECOMMENDS = "kernel-modules"
 
@@ -32,3 +33,16 @@ SPL_BINARY ?= "u-boot-sunxi-with-spl.bin"
 
 SERIAL_CONSOLE ?= "115200 ttyS0"
 MACHINE_FEATURES ?= "alsa apm keyboard rtc serial screen usbgadget usbhost vfat"
+
+# Mimic the sdcard_image-sunxi.bbclass
+# image-version-info file was also generated and installed to boot partition,
+# but it is missing here - can be added somehow (how?) if required
+SUNXI_FEX_FILE ?= " "
+SUNXI_BOOT_SPACE ?= "40"
+IMAGE_BOOT_FILES ?= "${KERNEL_IMAGETYPE} boot.scr"
+# ship fex file for sunxi kernel, devicetree file for mainline kernel
+IMAGE_BOOT_FILES += "${@bb.utils.contains('PREFERRED_PROVIDER_virtual/kernel', 'linux-sunxi', '${SUNXI_FEX_FILE}', '${KERNEL_DEVICETREE}', d)}"
+WKS_FILES ?= "sunxi-sdcard-image.wks.in"
+WKS_FILE_DEPENDS ?= "virtual/kernel u-boot"
+# in case of sunxi kernel, sunxi-board-fex must be built prior wic image assembly
+WKS_FILE_DEPENDS += " ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/kernel', 'linux-sunxi', 'sunxi-board-fex', '', d)}"

conf/machine/include/sunxi64.inc

@@ -1,6 +1,8 @@
 SOC_FAMILY ??= ""
 include conf/machine/include/soc-family.inc
 
+MACHINEOVERRIDES =. "sunxi:sunxi64:"
+
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
 PREFERRED_PROVIDER_u-boot ?= "u-boot"
 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
@@ -17,7 +19,7 @@ UBOOT_LOCALVERSION = "-g${@d.getVar('SRCPV', True).partition('+')[2][0:7]}"
 UBOOT_ENTRYPOINT ?= "0x40008000"
 UBOOT_LOADADDRESS ?= "0x400080OB00"
 
-UBOOT_BINARY ?= "u-boot.itb"
+#UBOOT_BINARY ?= "u-boot.itb"
 SPL_BINARY ?= "spl/sunxi-spl.bin"
 
 SERIAL_CONSOLE ?= "115200 ttyS0"

conf/machine/licheepi-zero.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: licheepi-zero
+#@DESCRIPTION: Machine configuration for the licheepi-zero, based on allwinner V3s CPU
+
+require conf/machine/include/sun8i.inc
+
+
+UBOOT_MACHINE = "LicheePi_Zero_defconfig"
+KERNEL_DEVICETREE = "sun8i-v3s-licheepi-zero.dtb"

conf/machine/marsboard-a10.conf

@@ -0,0 +1,10 @@
+#@TYPE: Machine
+#@NAME: HAOYU Electronics MarsBoard A10
+#@DESCRIPTION: Machine configuration for the HAOYU Electronics MarsBoard A10, based on Allwinner A10 CPU
+#https://linux-sunxi.org/MarsBoard_A10
+
+require conf/machine/include/sun4i.inc
+
+KERNEL_DEVICETREE = "sun4i-a10-marsboard.dtb"
+UBOOT_MACHINE = "Marsboard_A10_config"
+SUNXI_FEX_FILE = "sys_config/a10/marsboard_a10.fex"

conf/machine/nanopi-duo2.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: nanopi-duo2
+#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi Duo2, based on the Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-nanopi-duo2.dtb"
+UBOOT_MACHINE = "nanopi_duo2_defconfig"
+

conf/machine/nanopi-m1-plus.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h3-nanopi-m1-plus.dtb"
 UBOOT_MACHINE = "nanopi_m1_plus_defconfig"
 

conf/machine/nanopi-m1.conf

@@ -0,0 +1,8 @@
+#@TYPE: Machine
+#@NAME: NanoPi M1
+#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi Neo, based on #the Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-nanopi-m1.dtb"
+UBOOT_MACHINE = "nanopi_m1_defconfig"

conf/machine/nanopi-neo-air.conf

@@ -5,7 +5,5 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h3-nanopi-neo-air.dtb"
 UBOOT_MACHINE = "nanopi_neo_air_defconfig"

conf/machine/nanopi-neo-plus2.conf

@@ -4,8 +4,7 @@
 # on the Allwinner H5 SoC.
 
 require conf/machine/include/sun50i.inc
-
-PREFERRED_VERSION_u-boot = "v2018.09%"
+require conf/machine/include/hardware/ap6212a.inc
 
 KERNEL_DEVICETREE = "allwinner/sun50i-h5-nanopi-neo-plus2.dtb"
 UBOOT_MACHINE = "nanopi_neo_plus2_defconfig"

conf/machine/nanopi-neo.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h3-nanopi-neo.dtb"
 UBOOT_MACHINE = "nanopi_neo_defconfig"
 

conf/machine/nanopi-neo2.conf

@@ -5,7 +5,5 @@
 
 require conf/machine/include/sun50i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "allwinner/sun50i-h5-nanopi-neo2.dtb"
 UBOOT_MACHINE = "nanopi_neo2_defconfig"

conf/machine/nanopi-r1.conf

@@ -0,0 +1,8 @@
+#@TYPE: Machine
+#@NAME: NanoPi R1
+#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi R1, based on #the Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-nanopi-r1.dtb"
+UBOOT_MACHINE = "nanopi_r1_defconfig"

conf/machine/olinuxino-a64.conf

@@ -7,5 +7,7 @@ require conf/machine/include/sun50i.inc
 
 PREFFERED_VERSION_u-boot = "v2018.09%"
 
+MACHINE_EXTRA_RRECOMMENDS += " linux-firmware-rtl8723"
+
 KERNEL_DEVICETREE = "allwinner/sun50i-a64-olinuxino.dtb"
 UBOOT_MACHINE = "a64-olinuxino_defconfig"

conf/machine/orange-pi-one-plus.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: orange-pi-one-plus
+#@DESCRIPTION: Machine configuration for the Orange Pi One Plus, based on Allwinner H6 CPU
+
+
+require conf/machine/include/sun50i.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h6-orangepi-one-plus.dtb"
+UBOOT_MACHINE = "orangepi_one_plus_defconfig"

conf/machine/orange-pi-one.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h3-orangepi-one.dtb"
 UBOOT_MACHINE = "orangepi_one_defconfig"
 

conf/machine/orange-pi-pc-plus.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h3-orangepi-pc-plus.dtb"
 UBOOT_MACHINE = "orangepi_pc_plus_defconfig"
 

conf/machine/orange-pi-pc.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h3-orangepi-pc.dtb"
 UBOOT_MACHINE = "orangepi_pc_defconfig"
 

conf/machine/orange-pi-pc2.conf

@@ -0,0 +1,8 @@
+#@TYPE: Machine
+#@NAME: orangepi-pc2
+#@DESCRIPTION: Machine configuration for the orangepi-pc2, based on Allwinner A64 CPU
+
+require conf/machine/include/sun50i.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h5-orangepi-pc2.dtb"
+UBOOT_MACHINE = "orangepi_pc2_defconfig"

conf/machine/orange-pi-r1.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: orange-pi-r1
+#@DESCRIPTION: Machine configuration for the orange-pi-r1, base on allwinner H2+ CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h2-plus-orangepi-r1.dtb"
+UBOOT_MACHINE = "orangepi_r1_defconfig"
+

conf/machine/orange-pi-zero-plus2-h3.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: orange-pi-zero-plus2-h3
+#@DESCRIPTION: Machine configuration for the orange-pi-zero-plus2, based on Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+require conf/machine/include/hardware/ap6212a.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-orangepi-zero-plus2.dtb"
+UBOOT_MACHINE = "orangepi_zero_plus2_h3_defconfig"

conf/machine/orange-pi-zero-plus2.conf

@@ -2,10 +2,8 @@
 #@NAME: orange-pi-zero-plus2
 #@DESCRIPTION: Machine configuration for the orange-pi-zero-plus2, base on Allwinner H5 CPU
 
-
 require conf/machine/include/sun50i.inc
-
-PREFERRED_VERSION_u-boot = "v2018.09%"
+require conf/machine/include/hardware/ap6212a.inc
 
 KERNEL_DEVICETREE = "allwinner/sun50i-h5-orangepi-zero-plus2.dtb"
 UBOOT_MACHINE = "orangepi_zero_plus2_defconfig"

conf/machine/orange-pi-zero.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun8i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun8i-h2-plus-orangepi-zero.dtb"
 UBOOT_MACHINE = "orangepi_zero_defconfig"
 

conf/machine/orange-pi-zero2.conf

@@ -0,0 +1,16 @@
+#@TYPE: Machine
+#@NAME: orange-pi-zero-2
+#@DESCRIPTION: Machine configuration for the orange-pi-zero-2, based on Allwinner H616 CPU
+
+require conf/machine/include/sun50i-h616.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h616-orangepi-zero2.dtb"
+UBOOT_MACHINE = "orangepi_zero2_defconfig"
+
+SPL_BINARY = "u-boot-sunxi-with-spl.bin"
+
+# as for now neither graphics nor audio is supported
+MACHINE_FEATURES:remove = "alsa x11"
+MACHINE_FEATURES:append = "bluetooth wifi"
+
+MACHINE_EXTRA_RRECOMMENDS = "uwe5622-firmware"

conf/machine/pcduino.conf

@@ -4,8 +4,6 @@
 
 require conf/machine/include/sun4i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "sun4i-a10-pcduino.dtb"
 UBOOT_MACHINE = "Linksprite_pcDuino_defconfig"
 SUNXI_FEX_FILE = "sys_config/a10/pcduino.fex"

conf/machine/pine64-plus.conf

@@ -5,7 +5,5 @@
 
 require conf/machine/include/sun50i.inc
 
-PREFERRED_VERSION_u-boot = "v2018.09%"
-
 KERNEL_DEVICETREE = "allwinner/sun50i-a64-pine64-plus.dtb"
 UBOOT_MACHINE = "pine64_plus_defconfig"

recipes-bsp/atf/atf-sunxi/0001-Use-same-type-as-in-declaration.patch

@@ -0,0 +1,26 @@
+From 087b9306659effac870b4794c0f775ce3d7208c5 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Wed, 13 Apr 2022 08:09:29 +0200
+Subject: [PATCH] Use same type as in declaration
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ services/std_svc/psci/psci_common.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c
+index 75f52f538..918a719f6 100644
+--- a/services/std_svc/psci/psci_common.c
++++ b/services/std_svc/psci/psci_common.c
+@@ -261,7 +261,7 @@ void psci_acquire_afflvl_locks(int start_afflvl,
+  ******************************************************************************/
+ void psci_release_afflvl_locks(int start_afflvl,
+ 			       int end_afflvl,
+-			       aff_map_node_t *mpidr_nodes[])
++			       mpidr_aff_map_nodes_t mpidr_nodes)
+ {
+ 	int level;
+ 
+-- 
+2.25.1
+

recipes-bsp/atf/atf-sunxi_git.bb

@@ -1,16 +1,24 @@
 DESCRIPTION = "ARM Trusted Firmware Allwinner"
-LICENSE = "BSD"
+LICENSE = "BSD-3-Clause"
 LIC_FILES_CHKSUM = "file://license.md;md5=829bdeb34c1d9044f393d5a16c068371"
+LIC_FILES_CHKSUM:sun50i-h616 = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde"
 
-SRC_URI = "git://github.com/apritzel/arm-trusted-firmware;nobranch=1"
+SRC_URI = " \
+git://github.com/apritzel/arm-trusted-firmware;nobranch=1;protocol=https \
+file://0001-Use-same-type-as-in-declaration.patch \
+"
 SRCREV = "aa75c8da415158a94b82a430b2b40000778e851f"
 
+SRC_URI:sun50i-h616 = "git://github.com/ARM-software/arm-trusted-firmware;nobranch=1;protocol=https"
+SRCREV:sun50i-h616 = "f04dfbb297f03d7f8d7f7c00ce8712e1a10295cf"
+
 S = "${WORKDIR}/git"
 B = "${WORKDIR}/build"
 
-COMPATIBLE_MACHINE = "(sun50i)"
+COMPATIBLE_MACHINE = "(sun50i|sun50i-h616)"
 
-PLATFORM_sun50i = "sun50iw1p1"
+PLATFORM:sun50i = "sun50iw1p1"
+PLATFORM:sun50i-h616 = "sun50i_h616"
 
 LDFLAGS[unexport] = "1"
 

recipes-bsp/sunxi-board-fex/sunxi-board-fex.bb

@@ -9,9 +9,9 @@ PR = "r0"
 
 COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i)"
 
-SRC_URI = "git://github.com/linux-sunxi/sunxi-boards.git;protocol=git"
+SRC_URI = "git://github.com/linux-sunxi/sunxi-boards.git;protocol=https;branch=master"
 # Increase PV with SRCREV change
-SRCREV = "496ef0fbd166cc2395daa76dd3c359357420963d"
+SRCREV = "af5f938ea14a3614d35ad3d9ab51a5d392117444"
 
 S = "${WORKDIR}/git"
 

recipes-bsp/u-boot/files/0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch

@@ -1,20 +1,21 @@
-From f4a77da23b3890b53efab6a927cbe99b76ef3b26 Mon Sep 17 00:00:00 2001
+From 6a64d90ca4d976c16a2e102dbad0848e4d29776c Mon Sep 17 00:00:00 2001
 From: Florin Sarbu <florin@resin.io>
 Date: Wed, 12 Sep 2018 14:22:49 +0200
 Subject: [PATCH] nanopi_neo_air_defconfig: Enable eMMC support
 
 Upstream-status: Pending
 Signed-off-by: Florin Sarbu <florin@resin.io>
+
 ---
  configs/nanopi_neo_air_defconfig | 1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig
-index 8c362fa885..c7929ff015 100644
+index 806d95c1cc..8899cc3a15 100644
 --- a/configs/nanopi_neo_air_defconfig
 +++ b/configs/nanopi_neo_air_defconfig
-@@ -15,3 +15,4 @@ CONFIG_CONSOLE_MUX=y
- CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air"
+@@ -9,3 +9,4 @@ CONFIG_DRAM_CLK=408
+ CONFIG_CONSOLE_MUX=y
  CONFIG_USB_EHCI_HCD=y
- CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+ CONFIG_USB_OHCI_HCD=y
 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2

recipes-bsp/u-boot/files/0002-Added-nanopi-r1-board-support.patch

@@ -0,0 +1,40 @@
+From 767a05572ef5b93c2e157749b1754cbe261ee43d Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Fri, 8 Apr 2022 11:33:53 +0200
+Subject: [PATCH] Added nanopi-r1 board support
+
+Patch taken from : https://github.com/armbian/build/blob/master/patch/u-boot/u-boot-sunxi/add-nanopi-r1-and-duo2.patch
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+diff --git a/configs/nanopi_r1_defconfig b/configs/nanopi_r1_defconfig
+new file mode 100644
+index 0000000..e028b41
+--- /dev/null
++++ b/configs/nanopi_r1_defconfig
+@@ -0,0 +1,22 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_SPL=y
++CONFIG_MACH_SUN8I_H3=y
++CONFIG_DRAM_CLK=408
++CONFIG_DRAM_ZQ=3881979
++CONFIG_DRAM_ODT_EN=y
++CONFIG_MACPWR="PD6"
++# CONFIG_VIDEO_DE2 is not set
++CONFIG_NR_DRAM_BANKS=1
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_CONSOLE_MUX=y
++CONFIG_SYS_CLK_FREQ=480000000
++# CONFIG_CMD_FLASH is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++# CONFIG_SPL_EFI_PARTITION is not set
++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-r1"
++CONFIG_SUN8I_EMAC=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+-- 
+2.7.4
+

recipes-bsp/u-boot/files/0003-Add-nanopi-duo2-board-support.patch

@@ -0,0 +1,28 @@
+diff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig
+new file mode 100644
+index 0000000..1e51018
+--- /dev/null
++++ b/configs/nanopi_duo2_defconfig
+@@ -0,0 +1,21 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_SYS_TEXT_BASE=0x4a000000
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_MACH_SUN8I_H3=y
++CONFIG_DRAM_CLK=408
++CONFIG_DRAM_ZQ=3881979
++CONFIG_DRAM_ODT_EN=y
++# CONFIG_VIDEO_DE2 is not set
++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-duo2"
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_CONSOLE_MUX=y
++CONFIG_SPL=y
++CONFIG_SYS_CLK_FREQ=480000000
++# CONFIG_CMD_IMLS is not set
++# CONFIG_CMD_FLASH is not set
++# CONFIG_CMD_FPGA is not set
++CONFIG_SPL_SPI_SUNXI=y
++CONFIG_SUN8I_EMAC=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+

recipes-bsp/u-boot/files/0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch

@@ -0,0 +1,32 @@
+From eb31a4a141bf401f92426bd053a965022e47290d Mon Sep 17 00:00:00 2001
+From: Chris Morgan <macromorgan@hotmail.com>
+Date: Fri, 7 Jan 2022 11:52:54 -0600
+Subject: [PATCH] i2c: mvtwsi: Add compatible string for allwinner,
+ sun4i-a10-i2c
+
+This adds a compatible string for the Allwinner Sun4i-A10 I2C
+controller. Without this, boards based on the R8 and A13 (at a
+minimum) fail to boot.
+
+Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
+Acked-by: Akash Gajjar <gajjar04akash@gmail.com>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+---
+ drivers/i2c/mvtwsi.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
+index bad4b1484f..f48a4f25aa 100644
+--- a/drivers/i2c/mvtwsi.c
++++ b/drivers/i2c/mvtwsi.c
+@@ -900,6 +900,7 @@ static const struct dm_i2c_ops mvtwsi_i2c_ops = {
+ static const struct udevice_id mvtwsi_i2c_ids[] = {
+ 	{ .compatible = "marvell,mv64xxx-i2c", },
+ 	{ .compatible = "marvell,mv78230-i2c", },
++	{ .compatible = "allwinner,sun4i-a10-i2c", },
+ 	{ .compatible = "allwinner,sun6i-a31-i2c", },
+ 	{ /* sentinel */ }
+ };
+-- 
+2.34.1
+

recipes-bsp/u-boot/files/0005-Added-dtb-for-sun8i-h3-nanopi-r1-device.patch

@@ -0,0 +1,204 @@
+From 4ac73cb006bf34108ca280812e48942989a3575b Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@gmail.com>
+Date: Wed, 24 Apr 2024 15:06:58 +0200
+Subject: [PATCH] Added dtb for sun8i-h3-nanopi-r1 device
+
+Taken from mainline: 2c597855aa17d11520da642d03c82ff0c68042ab
+
+Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
+---
+ arch/arm/dts/Makefile               |   1 +
+ arch/arm/dts/sun8i-h3-nanopi-r1.dts | 169 ++++++++++++++++++++++++++++
+ 2 files changed, 170 insertions(+)
+ create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 9a9be76e6d..7a984510fe 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -589,6 +589,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
+ 	sun8i-h3-nanopi-m1-plus.dtb \
+ 	sun8i-h3-nanopi-neo.dtb \
+ 	sun8i-h3-nanopi-neo-air.dtb \
++	sun8i-h3-nanopi-r1.dtb \
+ 	sun8i-h3-orangepi-2.dtb \
+ 	sun8i-h3-orangepi-lite.dtb \
+ 	sun8i-h3-orangepi-one.dtb \
+diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+new file mode 100644
+index 0000000000..42cd1131ad
+--- /dev/null
++++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+@@ -0,0 +1,169 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com>
++ * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
++ * Copyright (C) 2020 Yu-Tung Chang <mtwget@gmail.com>
++*/
++
++#include "sun8i-h3-nanopi.dtsi"
++#include <dt-bindings/leds/common.h>
++
++/ {
++	model = "FriendlyARM NanoPi R1";
++	compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
++
++	aliases {
++		serial1 = &uart1;
++		ethernet0 = &emac;
++		ethernet1 = &wifi;
++	};
++
++	reg_gmac_3v3: gmac-3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "gmac-3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		startup-delay-us = <100000>;
++		enable-active-high;
++		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
++	};
++
++	reg_vdd_cpux: gpio-regulator {
++		compatible = "regulator-gpio";
++		regulator-name = "vdd-cpux";
++		regulator-type = "voltage";
++		regulator-boot-on;
++		regulator-always-on;
++		regulator-min-microvolt = <1100000>;
++		regulator-max-microvolt = <1300000>;
++		regulator-ramp-delay = <50>;
++		gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
++		gpios-states = <0x1>;
++		states = <1100000 0x0>,
++			 <1300000 0x1>;
++	};
++
++	wifi_pwrseq: wifi_pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
++		clocks = <&rtc CLK_OSC32K_FANOUT>;
++		clock-names = "ext_clock";
++	};
++
++	leds {
++		led-2 {
++			function = LED_FUNCTION_WAN;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
++		};
++
++		led-3 {
++			function = LED_FUNCTION_LAN;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
++		};
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_vdd_cpux>;
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&ehci2 {
++	status = "okay";
++};
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii-id";
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@7 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <7>;
++	};
++};
++
++&mmc1 {
++	vmmc-supply = <&reg_vcc3v3>;
++	vqmmc-supply = <&reg_vcc3v3>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	status = "okay";
++
++	wifi: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++		interrupt-parent = <&pio>;
++		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
++		interrupt-names = "host-wake";
++	};
++};
++
++&mmc2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc2_8bit_pins>;
++	vmmc-supply = <&reg_vcc3v3>;
++	vqmmc-supply = <&reg_vcc3v3>;
++	bus-width = <8>;
++	non-removable;
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++&ohci2 {
++	status = "okay";
++};
++
++&reg_usb0_vbus {
++	gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_pins>;
++	status = "okay";
++};
++
++&uart3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
++	uart-has-rtscts;
++	status = "okay";
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		clocks = <&rtc CLK_OSC32K_FANOUT>;
++		clock-names = "lpo";
++		vbat-supply = <&reg_vcc3v3>;
++		vddio-supply = <&reg_vcc3v3>;
++		device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
++		host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
++		shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
++	};
++};
++
++&usb_otg {
++	status = "okay";
++	dr_mode = "otg";
++};
++
++&usbphy {
++	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
++	usb0_vbus-supply = <&reg_usb0_vbus>;
++	status = "okay";
++};
+-- 
+2.25.1
+

recipes-bsp/u-boot/files/0006-nanopi-r1-dts-fixes.patch

@@ -0,0 +1,35 @@
+From 08aab303e36a3da19d49f111e5f2ad7d85b642fd Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@gmail.com>
+Date: Wed, 24 Apr 2024 15:32:12 +0200
+Subject: [PATCH] nanopi-r1: dts fixes
+
+Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
+---
+ arch/arm/dts/sun8i-h3-nanopi-r1.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+index 42cd1131ad..26e2e6172e 100644
+--- a/arch/arm/dts/sun8i-h3-nanopi-r1.dts
++++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+@@ -46,7 +46,7 @@
+ 	wifi_pwrseq: wifi_pwrseq {
+ 		compatible = "mmc-pwrseq-simple";
+ 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+-		clocks = <&rtc CLK_OSC32K_FANOUT>;
++		clocks = <&rtc 1>;
+ 		clock-names = "ext_clock";
+ 	};
+ 
+@@ -147,7 +147,7 @@
+ 
+ 	bluetooth {
+ 		compatible = "brcm,bcm43438-bt";
+-		clocks = <&rtc CLK_OSC32K_FANOUT>;
++		clocks = <&rtc 1>;
+ 		clock-names = "lpo";
+ 		vbat-supply = <&reg_vcc3v3>;
+ 		vddio-supply = <&reg_vcc3v3>;
+-- 
+2.25.1
+

recipes-bsp/u-boot/u-boot-sunxi.bb

@@ -2,7 +2,7 @@ DESCRIPTION = "U-Boot port for sunxi"
 
 require recipes-bsp/u-boot/u-boot.inc
 
-LICENSE = "GPLv2"
+LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263"
 
 # No patches for other machines yet
@@ -19,9 +19,10 @@ UBOOT_MACHINE_olinuxino-a10s = "A10s-OLinuXino-Micro_config"
 UBOOT_MACHINE_meleg = "Mele_A1000G_config"
 
 SRC_URI = " \
-	git://github.com/linux-sunxi/u-boot-sunxi.git;protocol=git;branch=sunxi \
-	file://0002-gcc5-fixes.patch \
-	file://0003-gcc6-fixes.patch \
+	git://github.com/linux-sunxi/u-boot-sunxi.git;protocol=https;branch=sunxi \
+	file://0001-gcc5-fixes.patch \
+	file://0002-gcc6-fixes.patch \
+	file://0003-No-gcc-version-specific-includes.patch \
 	"
 
 PE = "1"
@@ -35,3 +36,7 @@ S = "${WORKDIR}/git"
 PACKAGE_ARCH = "${MACHINE_ARCH}"
 
 SPL_BINARY="u-boot-sunxi-with-spl.bin"
+
+do_configure () {
+    oe_runmake -C ${S} O=${B} ${UBOOT_MACHINE}
+}

recipes-bsp/u-boot/u-boot-sunxi/0003-No-gcc-version-specific-includes.patch

@@ -0,0 +1,24 @@
+From bc4aa5814cbedbfaa1c79dfe7ea2571fee7f2d51 Mon Sep 17 00:00:00 2001
+From: Andrey Lebedev <andrey@lebedev.lt>
+Date: Wed, 22 Jan 2020 20:00:11 +0200
+Subject: [PATCH] No gcc version-specific includes
+
+In order to support gcc-5 and above. Fixes compilation errors like
+
+linux/compiler-gcc9.h: No such file or directory
+---
+ include/linux/compiler-gcc.h | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h
+index 9896e547b9..5f0bd65f3a 100644
+--- a/include/linux/compiler-gcc.h
++++ b/include/linux/compiler-gcc.h
+@@ -90,4 +90,3 @@
+ #define __gcc_header(x) #x
+ #define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h)
+ #define gcc_header(x) _gcc_header(x)
+-#include gcc_header(__GNUC__)
+-- 
+2.20.1
+

recipes-bsp/u-boot/u-boot_%.bbappend

@@ -0,0 +1,34 @@
+FILESEXTRAPATHS:prepend:sunxi := "${THISDIR}/files:"
+
+DEPENDS:append:sunxi = " bc-native dtc-native swig-native python3-native flex-native bison-native "
+DEPENDS:append:sun50i = " atf-sunxi "
+
+COMPATIBLE_MACHINE:sunxi = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
+
+DEFAULT_PREFERENCE:sun4i = "1"
+DEFAULT_PREFERENCE:sun5i = "1"
+DEFAULT_PREFERENCE:sun7i = "1"
+DEFAULT_PREFERENCE:sun8i = "1"
+DEFAULT_PREFERENCE:sun50i = "1"
+
+SRC_URI:append:sunxi = " \
+        file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
+	file://0002-Added-nanopi-r1-board-support.patch \
+	file://0003-Add-nanopi-duo2-board-support.patch \
+	file://0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch \
+	file://0005-Added-dtb-for-sun8i-h3-nanopi-r1-device.patch \
+	file://0006-nanopi-r1-dts-fixes.patch \
+        file://boot.cmd \
+"
+
+UBOOT_ENV_SUFFIX:sunxi = "scr"
+UBOOT_ENV:sunxi = "boot"
+
+EXTRA_OEMAKE:append:sunxi = ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" '
+EXTRA_OEMAKE:append:sun50i = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin SCP=/dev/null"
+
+do_compile_sun50i[depends] += "atf-sunxi:do_deploy"
+
+do_compile:append:sunxi() {
+    ${B}/tools/mkimage -C none -A arm -T script -d ${WORKDIR}/boot.cmd ${WORKDIR}/${UBOOT_ENV_BINARY}
+}

recipes-bsp/u-boot/u-boot_2018.09.bb

@@ -1,41 +0,0 @@
-DESCRIPTION="Upstream's U-boot configured for sunxi devices"
-
-require recipes-bsp/u-boot/u-boot.inc
-
-DEPENDS += " bc-native dtc-native swig-native python3-native flex-native bison-native "
-DEPENDS_append_sun50i = " atf-sunxi "
-
-LICENSE = "GPLv2+"
-LIC_FILES_CHKSUM = "file://Licenses/README;md5=30503fd321432fc713238f582193b78e"
-
-COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
-
-DEFAULT_PREFERENCE_sun4i="1"
-DEFAULT_PREFERENCE_sun5i="1"
-DEFAULT_PREFERENCE_sun7i="1"
-DEFAULT_PREFERENCE_sun8i="1"
-DEFAULT_PREFERENCE_sun50i="1"
-
-SRC_URI = "git://git.denx.de/u-boot.git;branch=master \
-           file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
-           file://boot.cmd \
-           "
-
-SRCREV = "f88b6facb87dc4a52f1630eb9d858c0f54c6628e"
-
-PV = "v2018.09+git${SRCPV}"
-PE = "2"
-
-S = "${WORKDIR}/git"
-
-UBOOT_ENV_SUFFIX = "scr"
-UBOOT_ENV = "boot"
-
-EXTRA_OEMAKE += ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" '
-EXTRA_OEMAKE_append_sun50i = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin "
-
-do_compile_sun50i[depends] += "atf-sunxi:do_deploy"
-
-do_compile_append() {
-    ${B}/tools/mkimage -C none -A arm -T script -d ${WORKDIR}/boot.cmd ${WORKDIR}/${UBOOT_ENV_BINARY}
-}

recipes-devtools/python/files/setup.py.patch

@@ -1,51 +0,0 @@
---- pyA20-0.2.1/setup.py	2014-09-04 12:17:18.000000000 +0200
-+++ pyA20-0.2.1/setup.py	2014-11-24 17:44:37.000000000 +0100
-@@ -43,31 +43,31 @@
-     Detect processor type
-     :return:
-     """
--    cpuinfo = open("/proc/cpuinfo", 'r')
--    for line in cpuinfo:
--        if "Hardware" in line:
--            processor = line.split(":")[1].rstrip()
-+    #cpuinfo = open("/proc/cpuinfo", 'r')
-+    #for line in cpuinfo:
-+    #    if "Hardware" in line:
-+    #        processor = line.split(":")[1].rstrip()
- 
--            if "sun4i" in processor:
--                print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A10)")
-+    #        if "sun4i" in processor:
-+    #            print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A10)")
- 
--            elif "sun5i" in processor:
--                print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A13)")
-+    #        elif "sun5i" in processor:
-+    #            print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A13)")
- 
--            elif "sun7i" in processor:
--                print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A20)")
-+    #        elif "sun7i" in processor:
-+    #            print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A20)")
- 
--            else:
--                print ("Detected processor: " + print_color("unknown"))
-+    #        else:
-+    #            print ("Detected processor: " + print_color("unknown"))
- 
- 
--            if processor_type not in processor:
--                print_warning()
-+    #        if processor_type not in processor:
-+    #            print_warning()
- 
--            return
-+    return
- 
--    print ("No processor detected")
--    print_warning()
-+    #print ("No processor detected")
-+    #print_warning()
- 
- 
- class build_ext(_build_ext):

recipes-devtools/python/pya20_0.2.12.bb

@@ -1,24 +1,23 @@
 DESCRIPTION = "A module to control Allwinner GPIO,SPI and I2C channels"
 HOMEPAGE = "https://pypi.python.org/pypi/pyA20"
 SECTION = "devel/python"
-LICENSE = "MIT"
-LIC_FILES_CHKSUM = "file://PKG-INFO;md5=bfe0261ded6cff75086193ec2f79129e"
-DEPENDS = "python"
+LICENSE = "GPL-3.0-only"
+LIC_FILES_CHKSUM = "file://PKG-INFO;md5=4e584373bb0f46ef1e423cb7df37847d"
+DEPENDS = "python3"
 
 # No GPIO mappings for other machines yet
 COMPATIBLE_MACHINE = "(olinuxino-a13|olinuxino-a10|olinuxino-a20|olinuxino-a10lime|olinuxino-a20lime|olinuxino-a20lime2|olinuxino-a13som|olinuxino-a20som)"
 
 SRC_URI = "https://pypi.python.org/packages/source/p/pyA20/pyA20-${PV}.tar.gz \
-           file://setup.py.patch \
            file://mapping.h \
           "
 S = "${WORKDIR}/pyA20-${PV}"
 
-inherit distutils
+inherit distutils3
 
-do_compile_prepend() { 
+do_compile:prepend() { 
 cp ${WORKDIR}/mapping.h ${S}/pyA20/gpio/mapping.h
 }
 
-SRC_URI[md5sum] = "2290066bbe274000c53693959a8005b4"
-SRC_URI[sha256sum] = "b15e4ee1016b7eb52001cbccde3751868624a88d2adbb9adc5404628f7e59e7e"
+SRC_URI[md5sum] = "cab03b4931199804603d1074f6d8f48f"
+SRC_URI[sha256sum] = "4bef559a9c5a4d648d9834bad996cf2805b20d6063b8051029ffdf9deda2b536"

recipes-devtools/python/pya20som_0.2.1.bb

@@ -1,24 +0,0 @@
-DESCRIPTION = "A module to control Allwinner GPIO,SPI and I2C channels"
-HOMEPAGE = "https://pypi.python.org/pypi/pyA20SOM"
-SECTION = "devel/python"
-LICENSE = "MIT"
-LIC_FILES_CHKSUM = "file://PKG-INFO;md5=cf6345f2cb2acee98b01c493d68b8322"
-DEPENDS = "python"
-
-# No GPIO mappings for other machines yet
-COMPATIBLE_MACHINE = "olinuxino-a20som"
-
-SRC_URI = "https://pypi.python.org/packages/source/p/pyA20SOM/pyA20SOM-${PV}.tar.gz \
-           file://setup.py.patch \
-           file://mapping.h \
-          "
-S = "${WORKDIR}/pyA20SOM-${PV}"
-
-inherit distutils
-
-do_compile_prepend() { 
-cp ${WORKDIR}/mapping.h ${S}/pyA20SOM/gpio/mapping.h
-}
-
-SRC_URI[md5sum] = "a720115ef1d3dffe82f42f2157ca1c56"
-SRC_URI[sha256sum] = "1ac1025596cc112964f7caac9a6a523d5da61623c248ccc178c6cbb4bc1b4549"

recipes-graphics/libgles/sunxi-mali_git.bb

@@ -21,7 +21,7 @@ python __anonymous() {
         raise bb.parse.SkipPackage("%s-%s ONLY supports hardfp mode for now" % (pkgn, pkgv))
 }
 
-SRCREV_pn-${PN} = "d343311efc8db166d8371b28494f0f27b6a58724"
+SRCREV = "d343311efc8db166d8371b28494f0f27b6a58724"
 SRC_URI = "gitsm://github.com/linux-sunxi/sunxi-mali.git \
            file://0001-Add-EGLSyncKHR-EGLTimeKHR-and-GLChar-definition.patch \
            file://0002-Add-missing-GLchar-definition.patch \
@@ -31,7 +31,7 @@ SRC_URI = "gitsm://github.com/linux-sunxi/sunxi-mali.git \
 
 S = "${WORKDIR}/git"
 
-DEPENDS = "libdrm xorgproto libump"
+DEPENDS = "libdrm xorgproto libump patchelf-native"
 
 PACKAGECONFIG ??= "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'x11', '', d)} ${@bb.utils.contains('DISTRO_FEATURES', 'wayland', 'wayland', '', d)}"
 PACKAGECONFIG[wayland] = "EGL_TYPE=framebuffer,,,"
@@ -70,11 +70,13 @@ do_install() {
 
     make libdir=${D}${libdir}/ includedir=${D}${includedir}/ install
     make libdir=${D}${libdir}/ includedir=${D}${includedir}/ install -C include
+    rm -f ${D}${includedir}/KHR/khrplatform.h
 
     # Fix .so name and create symlinks, binary package provides .so wich can't be included directly in package without triggering the 'dev-so' QA check
     # Packages like xf86-video-fbturbo dlopen() libUMP.so, so we do need to ship the .so files in ${PN}
 
     mv ${D}${libdir}/libMali.so ${D}${libdir}/libMali.so.3
+    patchelf --set-soname libMali.so.3 ${D}${libdir}/libMali.so.3
     ln -sf libMali.so.3 ${D}${libdir}/libMali.so
 
     for flib in libEGL.so.1.4 libGLESv1_CM.so.1.1 libGLESv2.so.2.0 ; do
@@ -90,13 +92,13 @@ do_install() {
 # Packages like xf86-video-fbturbo dlopen() libUMP.so, so we do need to ship the .so files in ${PN}
 PACKAGES =+ "${PN}-test"
 
-RPROVIDES_${PN} += "libGLESv2.so libEGL.so libGLESv2.so libGLESv1_CM.so libMali.so"
-RDEPENDS_${PN}-test = "${PN}"
+RPROVIDES:${PN} += "libGLESv2.so libEGL.so libGLESv2.so libGLESv1_CM.so libMali.so"
+RDEPENDS:${PN}-test = "${PN}"
 
-FILES_${PN} += "${libdir}/lib*.so"
-FILES_${PN}-dev = "${includedir} ${libdir}/pkgconfig/*"
-FILES_${PN}-test = "${bindir}/sunximali-test"
+FILES:${PN} += "${libdir}/lib*.so"
+FILES:${PN}-dev = "${includedir} ${libdir}/pkgconfig/*"
+FILES:${PN}-test = "${bindir}/sunximali-test"
 
 # These are closed binaries generated elsewhere so don't check ldflags & text relocations
-INSANE_SKIP_${PN} = "dev-so ldflags textrel"
-INSANE_SKIP_${PN}-test = "dev-so ldflags textrel"
+INSANE_SKIP:${PN} = "dev-so ldflags textrel"
+INSANE_SKIP:${PN}-test = "dev-so ldflags textrel"

recipes-graphics/libump/libump_git.bb

@@ -1,14 +1,14 @@
 DESCRIPTION = "Unified Memory Provider userspace API source code needed for xf86-video-mali compilation"
 
-LICENSE = "Apache-2"
+LICENSE = "Apache-2.0"
 LIC_FILES_CHKSUM = "file://debian/copyright;md5=edf7fb6071cae7ec80d537a05ee17198"
 
 inherit autotools
 
 PV = "r4p0-00rel0+git${SRCPV}"
-SRCREV_pn-${PN} = "ec0680628744f30b8fac35e41a7bd8e23e59c39f"
+SRCREV = "ec0680628744f30b8fac35e41a7bd8e23e59c39f"
 
-SRC_URI = "git://github.com/linux-sunxi/libump.git"
+SRC_URI = "git://github.com/linux-sunxi/libump.git;protocol=https;branch=master"
 
 S = "${WORKDIR}/git"
 

recipes-graphics/mesa/mesa-gl_%.bbappend

@@ -0,0 +1 @@
+PACKAGECONFIG:class-target = "opengl x11 gallium"

recipes-graphics/mesa/mesa_%.bbappend

@@ -0,0 +1,5 @@
+# Enable lima and panfrost Mesa drivers
+PACKAGECONFIG:append:use-mailine-graphics = " lima panfrost"
+# Enable KMS renderonly Mesa support
+# See https://cgit.freedesktop.org/mesa/mesa/commit/?id=2b780fe89300199f2334539aa1678e9b68f0434f
+GALLIUMDRIVERS:append:use-mailine-graphics = ",kmsro"

recipes-graphics/tslib/tslib_1.1.bbappend.disabled

@@ -1,4 +1,4 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
 
 SRC_URI += "file://tslib.patch"
 

recipes-graphics/xorg-xserver/libdri2_git.bb

@@ -1,6 +1,6 @@
 DESCRIPTION = "Library for the DRI2 extension to the X Window System"
 
-LICENSE = "MIT-X"
+LICENSE = "MIT-CMU"
 LIC_FILES_CHKSUM = "file://COPYING;md5=827da9afab1f727f2a66574629e0f39c"
 
 DEPENDS = "libdrm libxext libxfixes xorgproto"
@@ -9,7 +9,7 @@ PE = "1"
 PV = "1.0.0+git${SRCPV}"
 SRC_URI = "git://github.com/robclark/libdri2.git;protocol=http;branch=master"
 
-SRCREV_pn-${PN} = "4f1eef3183df2b270c3d5cbef07343ee5127a6a4"
+SRCREV = "4f1eef3183df2b270c3d5cbef07343ee5127a6a4"
 
 S = "${WORKDIR}/git"
 

recipes-graphics/xorg-xserver/xf86-video-fbturbo_git.bb

@@ -2,14 +2,14 @@ require recipes-graphics/xorg-driver/xorg-driver-video.inc
 
 DESCRIPTION = "X.Org X server -- A10/A13 display driver"
 
-LICENSE = "MIT-X"
+LICENSE = "MIT-CMU"
 LIC_FILES_CHKSUM = "file://COPYING;md5=f91dc3ee5ce59eb4b528e67e98a31266"
 
 DEPENDS += "sunxi-mali libump xorgproto"
 
 PE = "3"
 PV = "0.5.1+git${SRCPV}"
-SRCREV_pn-${PN} = "e094e3c8f9004ca3347694bd05b99d136e8621b9"
+SRCREV = "e094e3c8f9004ca3347694bd05b99d136e8621b9"
 
 SRC_URI = "git://github.com/ssvb/xf86-video-fbturbo.git;protocol=http;branch=master \
            file://20-fbturbo.conf"
@@ -18,9 +18,9 @@ S = "${WORKDIR}/git"
 
 CFLAGS += " -I${STAGING_INCDIR}/xorg "
 
-do_install_append() {
+do_install:append() {
     install -d ${D}${datadir}/X11/xorg.conf.d
     install -m 0644 ${WORKDIR}/20-fbturbo.conf ${D}${datadir}/X11/xorg.conf.d
 }
 
-FILES_${PN} += "${datadir}/X11/xorg.conf.d/20-fbturbo.conf"
+FILES:${PN} += "${datadir}/X11/xorg.conf.d/20-fbturbo.conf"

recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend

@@ -1 +1 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"

recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend

@@ -0,0 +1 @@
+DEPENDS += "libxshmfence"

recipes-kernel/linux-firmware/linux-firmware_%.bbappend

@@ -0,0 +1,13 @@
+# The brcmfmac driver looks for NVRAM files using the first entry in board
+# compatible since kernel >= 5.0:
+# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0ad4b55b2f29784f93875e6231bf57cd233624a2
+# We create a link to the AP6212 module NVRAM file so that firmware is
+# autodetected by the driver.
+# WARNING: The following commit is required for NVRAM files to be included in
+# linux-firmware-bcm43430 package:
+# http://git.openembedded.org/openembedded-core/commit/?id=dde0f79f32fa6bab045ef60199903f74c4cc3393
+do_install:append() {
+	ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.xunlong,orangepi-zero-plus2.txt
+	ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.xunlong,orangepi-zero-plus2-h3.txt
+	ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.friendlyarm,nanopi-neo-plus2.txt
+}

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0001-dts-add-h616-and-orangepizero2.patch

@@ -0,0 +1,907 @@
+From 4de4213f698a5962f839f671e4dec247baa35d5b Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Wed, 25 Jan 2023 20:30:15 +0100
+Subject: [PATCH] Add device tree from master
+
+---
+ arch/arm64/boot/dts/allwinner/Makefile        |   1 +
+ .../allwinner/sun50i-h616-orangepi-zero2.dts  | 261 ++++++++
+ .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 590 ++++++++++++++++++
+ include/dt-bindings/clock/sun6i-rtc.h         |  10 +
+ 4 files changed, 862 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+ create mode 100644 include/dt-bindings/clock/sun6i-rtc.h
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index a96d9d2d8..471822f5f 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -37,3 +37,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
+\ No newline at end of file
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+new file mode 100644
+index 000000000..e92055145
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -0,0 +1,261 @@
++// SPDX-License-Identifier: (GPL-2.0+ or MIT)
++/*
++ * Copyright (C) 2020 Arm Ltd.
++ */
++
++/dts-v1/;
++
++#include "sun50i-h616.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/leds/common.h>
++
++/ {
++	model = "OrangePi Zero2";
++	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
++
++	aliases {
++		ethernet0 = &emac0;
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led-0 {
++			function = LED_FUNCTION_POWER;
++			color = <LED_COLOR_ID_RED>;
++			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
++			default-state = "on";
++		};
++
++		led-1 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
++		};
++	};
++
++	reg_vcc5v: vcc5v {
++		/* board wide 5V supply directly from the USB-C socket */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-5v";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++	};
++
++	reg_vcc33_wifi: vcc33-wifi {
++		/* Always on 3.3V regulator for WiFi and BT */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc33-wifi";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc5v>;
++	};
++
++	reg_vcc_wifi_io: vcc-wifi-io {
++		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-wifi-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc33_wifi>;
++	};
++
++	wifi_pwrseq: wifi-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rtc 1>;
++		clock-names = "osc32k-out";
++		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
++		post-power-on-delay-ms = <200>;
++	};
++};
++
++&emac0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ext_rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	phy-supply = <&reg_dcdce>;
++	allwinner,rx-delay-ps = <3100>;
++	allwinner,tx-delay-ps = <700>;
++	status = "okay";
++};
++
++&mmc1 {
++	vmmc-supply = <&reg_vcc33_wifi>;
++	vqmmc-supply = <&reg_vcc_wifi_io>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	mmc-ddr-1_8v;
++	status = "okay";
++
++	uwe-bsp {
++		compatible = "unisoc,uwe_bsp";
++		keep-power-on;
++		data-irq;
++		//adma-tx;
++		adma-rx;
++		//blksz-512;
++		status = "okay";
++	};
++};
++
++&mdio0 {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
++&mmc0 {
++	vmmc-supply = <&reg_dcdce>;
++	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
++	bus-width = <4>;
++	status = "okay";
++};
++
++&r_rsb {
++	status = "okay";
++
++	axp305: pmic@745 {
++		compatible = "x-powers,axp305", "x-powers,axp805",
++			     "x-powers,axp806";
++		interrupt-controller;
++		#interrupt-cells = <1>;
++		reg = <0x745>;
++
++		x-powers,self-working-mode;
++		vina-supply = <&reg_vcc5v>;
++		vinb-supply = <&reg_vcc5v>;
++		vinc-supply = <&reg_vcc5v>;
++		vind-supply = <&reg_vcc5v>;
++		vine-supply = <&reg_vcc5v>;
++		aldoin-supply = <&reg_vcc5v>;
++		bldoin-supply = <&reg_vcc5v>;
++		cldoin-supply = <&reg_vcc5v>;
++
++		regulators {
++			reg_aldo1: aldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc-sys";
++			};
++
++			reg_aldo2: aldo2 {	/* 3.3V on headers */
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc3v3-ext";
++			};
++
++			reg_aldo3: aldo3 {	/* 3.3V on headers */
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc3v3-ext2";
++			};
++
++			reg_bldo1: bldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc1v8";
++			};
++
++			bldo2 {
++				/* unused */
++			};
++
++			bldo3 {
++				/* unused */
++			};
++
++			bldo4 {
++				/* unused */
++			};
++
++			cldo1 {
++				/* reserved */
++			};
++
++			cldo2 {
++				/* unused */
++			};
++
++			cldo3 {
++				/* unused */
++			};
++
++			reg_dcdca: dcdca {
++				regulator-always-on;
++				regulator-min-microvolt = <810000>;
++				regulator-max-microvolt = <1100000>;
++				regulator-name = "vdd-cpu";
++			};
++
++			reg_dcdcc: dcdcc {
++				regulator-always-on;
++				regulator-min-microvolt = <810000>;
++				regulator-max-microvolt = <990000>;
++				regulator-name = "vdd-gpu-sys";
++			};
++
++			reg_dcdcd: dcdcd {
++				regulator-always-on;
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vdd-dram";
++			};
++
++			reg_dcdce: dcdce {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc-eth-mmc";
++			};
++
++			sw {
++				/* unused */
++			};
++		};
++	};
++};
++
++&pio {
++	vcc-pc-supply = <&reg_aldo1>;
++	vcc-pf-supply = <&reg_aldo1>;
++	vcc-pg-supply = <&reg_bldo1>;
++	vcc-ph-supply = <&reg_aldo1>;
++	vcc-pi-supply = <&reg_aldo1>;
++};
++
++&spi0  {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
++
++	flash@0 {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		compatible = "jedec,spi-nor";
++		reg = <0>;
++		spi-max-frequency = <40000000>;
++	};
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_ph_pins>;
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+new file mode 100644
+index 000000000..ab344ea8a
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -0,0 +1,590 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++// Copyright (C) 2020 Arm Ltd.
++// based on the H6 dtsi, which is:
++//   Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
++
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/clock/sun50i-h616-ccu.h>
++#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
++#include <dt-bindings/clock/sun6i-rtc.h>
++#include <dt-bindings/reset/sun50i-h616-ccu.h>
++#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
++
++/ {
++	interrupt-parent = <&gic>;
++	#address-cells = <2>;
++	#size-cells = <2>;
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		cpu0: cpu@0 {
++			compatible = "arm,cortex-a53";
++			device_type = "cpu";
++			reg = <0>;
++			enable-method = "psci";
++			clocks = <&ccu CLK_CPUX>;
++		};
++
++		cpu1: cpu@1 {
++			compatible = "arm,cortex-a53";
++			device_type = "cpu";
++			reg = <1>;
++			enable-method = "psci";
++			clocks = <&ccu CLK_CPUX>;
++		};
++
++		cpu2: cpu@2 {
++			compatible = "arm,cortex-a53";
++			device_type = "cpu";
++			reg = <2>;
++			enable-method = "psci";
++			clocks = <&ccu CLK_CPUX>;
++		};
++
++		cpu3: cpu@3 {
++			compatible = "arm,cortex-a53";
++			device_type = "cpu";
++			reg = <3>;
++			enable-method = "psci";
++			clocks = <&ccu CLK_CPUX>;
++		};
++	};
++
++	reserved-memory {
++		#address-cells = <2>;
++		#size-cells = <2>;
++		ranges;
++
++		/*
++		 * 256 KiB reserved for Trusted Firmware-A (BL31).
++		 * This is added by BL31 itself, but some bootloaders fail
++		 * to propagate this into the DTB handed to kernels.
++		 */
++		secmon@40000000 {
++			reg = <0x0 0x40000000 0x0 0x40000>;
++			no-map;
++		};
++	};
++
++	osc24M: osc24M-clk {
++		#clock-cells = <0>;
++		compatible = "fixed-clock";
++		clock-frequency = <24000000>;
++		clock-output-names = "osc24M";
++	};
++
++	pmu {
++		compatible = "arm,cortex-a53-pmu";
++		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
++			     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
++			     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
++	};
++
++	psci {
++		compatible = "arm,psci-0.2";
++		method = "smc";
++	};
++
++	timer {
++		compatible = "arm,armv8-timer";
++		arm,no-tick-in-suspend;
++		interrupts = <GIC_PPI 13
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 14
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 11
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 10
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
++	};
++
++	soc {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges = <0x0 0x0 0x0 0x40000000>;
++
++		syscon: syscon@3000000 {
++			compatible = "allwinner,sun50i-h616-system-control";
++			reg = <0x03000000 0x1000>;
++			#address-cells = <1>;
++			#size-cells = <1>;
++			ranges;
++
++			sram_c: sram@28000 {
++				compatible = "mmio-sram";
++				reg = <0x00028000 0x30000>;
++				#address-cells = <1>;
++				#size-cells = <1>;
++				ranges = <0 0x00028000 0x30000>;
++			};
++		};
++
++		ccu: clock@3001000 {
++			compatible = "allwinner,sun50i-h616-ccu";
++			reg = <0x03001000 0x1000>;
++			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
++			clock-names = "hosc", "losc", "iosc";
++			#clock-cells = <1>;
++			#reset-cells = <1>;
++		};
++
++		watchdog: watchdog@30090a0 {
++			compatible = "allwinner,sun50i-h616-wdt",
++				     "allwinner,sun6i-a31-wdt";
++			reg = <0x030090a0 0x20>;
++			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&osc24M>;
++		};
++
++		pio: pinctrl@300b000 {
++			compatible = "allwinner,sun50i-h616-pinctrl";
++			reg = <0x0300b000 0x400>;
++			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
++			clock-names = "apb", "hosc", "losc";
++			gpio-controller;
++			#gpio-cells = <3>;
++			interrupt-controller;
++			#interrupt-cells = <3>;
++
++			ext_rgmii_pins: rgmii-pins {
++				pins = "PI0", "PI1", "PI2", "PI3", "PI4",
++				       "PI5", "PI7", "PI8", "PI9", "PI10",
++				       "PI11", "PI12", "PI13", "PI14", "PI15",
++				       "PI16";
++				function = "emac0";
++				drive-strength = <40>;
++			};
++
++			i2c0_pins: i2c0-pins {
++				pins = "PI6", "PI7";
++				function = "i2c0";
++			};
++
++			i2c3_ph_pins: i2c3-ph-pins {
++				pins = "PH4", "PH5";
++				function = "i2c3";
++			};
++
++			ir_rx_pin: ir-rx-pin {
++				pins = "PH10";
++				function = "ir_rx";
++			};
++
++			mmc0_pins: mmc0-pins {
++				pins = "PF0", "PF1", "PF2", "PF3",
++				       "PF4", "PF5";
++				function = "mmc0";
++				drive-strength = <30>;
++				bias-pull-up;
++			};
++
++			/omit-if-no-ref/
++			mmc1_pins: mmc1-pins {
++				pins = "PG0", "PG1", "PG2", "PG3",
++				       "PG4", "PG5";
++				function = "mmc1";
++				drive-strength = <30>;
++				bias-pull-up;
++			};
++
++			mmc2_pins: mmc2-pins {
++				pins = "PC0", "PC1", "PC5", "PC6",
++				       "PC8", "PC9", "PC10", "PC11",
++				       "PC13", "PC14", "PC15", "PC16";
++				function = "mmc2";
++				drive-strength = <30>;
++				bias-pull-up;
++			};
++
++			/omit-if-no-ref/
++			spi0_pins: spi0-pins {
++				pins = "PC0", "PC2", "PC4";
++				function = "spi0";
++			};
++
++			/omit-if-no-ref/
++			spi0_cs0_pin: spi0-cs0-pin {
++				pins = "PC3";
++				function = "spi0";
++			};
++
++			/omit-if-no-ref/
++			spi1_pins: spi1-pins {
++				pins = "PH6", "PH7", "PH8";
++				function = "spi1";
++			};
++
++			/omit-if-no-ref/
++			spi1_cs0_pin: spi1-cs0-pin {
++				pins = "PH5";
++				function = "spi1";
++			};
++
++			uart0_ph_pins: uart0-ph-pins {
++				pins = "PH0", "PH1";
++				function = "uart0";
++			};
++
++			/omit-if-no-ref/
++			uart1_pins: uart1-pins {
++				pins = "PG6", "PG7";
++				function = "uart1";
++			};
++
++			/omit-if-no-ref/
++			uart1_rts_cts_pins: uart1-rts-cts-pins {
++				pins = "PG8", "PG9";
++				function = "uart1";
++			};
++		};
++
++		gic: interrupt-controller@3021000 {
++			compatible = "arm,gic-400";
++			reg = <0x03021000 0x1000>,
++			      <0x03022000 0x2000>,
++			      <0x03024000 0x2000>,
++			      <0x03026000 0x2000>;
++			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
++			interrupt-controller;
++			#interrupt-cells = <3>;
++		};
++
++		mmc0: mmc@4020000 {
++			compatible = "allwinner,sun50i-h616-mmc",
++				     "allwinner,sun50i-a100-mmc";
++			reg = <0x04020000 0x1000>;
++			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
++			clock-names = "ahb", "mmc";
++			resets = <&ccu RST_BUS_MMC0>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&mmc0_pins>;
++			status = "disabled";
++			max-frequency = <150000000>;
++			cap-sd-highspeed;
++			cap-mmc-highspeed;
++			mmc-ddr-3_3v;
++			cap-sdio-irq;
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		mmc1: mmc@4021000 {
++			compatible = "allwinner,sun50i-h616-mmc",
++				     "allwinner,sun50i-a100-mmc";
++			reg = <0x04021000 0x1000>;
++			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
++			clock-names = "ahb", "mmc";
++			resets = <&ccu RST_BUS_MMC1>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&mmc1_pins>;
++			status = "disabled";
++			max-frequency = <150000000>;
++			cap-sd-highspeed;
++			cap-mmc-highspeed;
++			mmc-ddr-3_3v;
++			cap-sdio-irq;
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		mmc2: mmc@4022000 {
++			compatible = "allwinner,sun50i-h616-emmc",
++				     "allwinner,sun50i-a100-emmc";
++			reg = <0x04022000 0x1000>;
++			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
++			clock-names = "ahb", "mmc";
++			resets = <&ccu RST_BUS_MMC2>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&mmc2_pins>;
++			status = "disabled";
++			max-frequency = <150000000>;
++			cap-sd-highspeed;
++			cap-mmc-highspeed;
++			mmc-ddr-3_3v;
++			cap-sdio-irq;
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		uart0: serial@5000000 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x05000000 0x400>;
++			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&ccu CLK_BUS_UART0>;
++			resets = <&ccu RST_BUS_UART0>;
++			status = "disabled";
++		};
++
++		uart1: serial@5000400 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x05000400 0x400>;
++			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&ccu CLK_BUS_UART1>;
++			resets = <&ccu RST_BUS_UART1>;
++			status = "disabled";
++		};
++
++		uart2: serial@5000800 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x05000800 0x400>;
++			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&ccu CLK_BUS_UART2>;
++			resets = <&ccu RST_BUS_UART2>;
++			status = "disabled";
++		};
++
++		uart3: serial@5000c00 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x05000c00 0x400>;
++			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&ccu CLK_BUS_UART3>;
++			resets = <&ccu RST_BUS_UART3>;
++			status = "disabled";
++		};
++
++		uart4: serial@5001000 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x05001000 0x400>;
++			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&ccu CLK_BUS_UART4>;
++			resets = <&ccu RST_BUS_UART4>;
++			status = "disabled";
++		};
++
++		uart5: serial@5001400 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x05001400 0x400>;
++			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&ccu CLK_BUS_UART5>;
++			resets = <&ccu RST_BUS_UART5>;
++			status = "disabled";
++		};
++
++		i2c0: i2c@5002000 {
++			compatible = "allwinner,sun50i-h616-i2c",
++				     "allwinner,sun8i-v536-i2c",
++				     "allwinner,sun6i-a31-i2c";
++			reg = <0x05002000 0x400>;
++			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_I2C0>;
++			resets = <&ccu RST_BUS_I2C0>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&i2c0_pins>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c1: i2c@5002400 {
++			compatible = "allwinner,sun50i-h616-i2c",
++				     "allwinner,sun8i-v536-i2c",
++				     "allwinner,sun6i-a31-i2c";
++			reg = <0x05002400 0x400>;
++			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_I2C1>;
++			resets = <&ccu RST_BUS_I2C1>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c2: i2c@5002800 {
++			compatible = "allwinner,sun50i-h616-i2c",
++				     "allwinner,sun8i-v536-i2c",
++				     "allwinner,sun6i-a31-i2c";
++			reg = <0x05002800 0x400>;
++			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_I2C2>;
++			resets = <&ccu RST_BUS_I2C2>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c3: i2c@5002c00 {
++			compatible = "allwinner,sun50i-h616-i2c",
++				     "allwinner,sun8i-v536-i2c",
++				     "allwinner,sun6i-a31-i2c";
++			reg = <0x05002c00 0x400>;
++			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_I2C3>;
++			resets = <&ccu RST_BUS_I2C3>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c4: i2c@5003000 {
++			compatible = "allwinner,sun50i-h616-i2c",
++				     "allwinner,sun8i-v536-i2c",
++				     "allwinner,sun6i-a31-i2c";
++			reg = <0x05003000 0x400>;
++			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_I2C4>;
++			resets = <&ccu RST_BUS_I2C4>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		spi0: spi@5010000 {
++			compatible = "allwinner,sun50i-h616-spi",
++				     "allwinner,sun8i-h3-spi";
++			reg = <0x05010000 0x1000>;
++			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
++			clock-names = "ahb", "mod";
++			resets = <&ccu RST_BUS_SPI0>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		spi1: spi@5011000 {
++			compatible = "allwinner,sun50i-h616-spi",
++				     "allwinner,sun8i-h3-spi";
++			reg = <0x05011000 0x1000>;
++			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
++			clock-names = "ahb", "mod";
++			resets = <&ccu RST_BUS_SPI1>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		emac0: ethernet@5020000 {
++			compatible = "allwinner,sun50i-h616-emac0",
++				     "allwinner,sun50i-a64-emac";
++			reg = <0x05020000 0x10000>;
++			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "macirq";
++			clocks = <&ccu CLK_BUS_EMAC0>;
++			clock-names = "stmmaceth";
++			resets = <&ccu RST_BUS_EMAC0>;
++			reset-names = "stmmaceth";
++			syscon = <&syscon>;
++			status = "disabled";
++
++			mdio0: mdio {
++				compatible = "snps,dwmac-mdio";
++				#address-cells = <1>;
++				#size-cells = <0>;
++			};
++		};
++
++		rtc: rtc@7000000 {
++			compatible = "allwinner,sun50i-h616-rtc",
++				     "allwinner,sun50i-h6-rtc";
++			reg = <0x07000000 0x400>;
++			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
++			clock-output-names = "osc32k", "osc32k-out", "iosc";
++			#clock-cells = <1>;
++		};
++
++		r_ccu: clock@7010000 {
++			compatible = "allwinner,sun50i-h616-r-ccu";
++			reg = <0x07010000 0x210>;
++			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
++				 <&ccu CLK_PLL_PERIPH0>;
++			clock-names = "hosc", "losc", "iosc", "pll-periph";
++			#clock-cells = <1>;
++			#reset-cells = <1>;
++		};
++
++		r_pio: pinctrl@7022000 {
++			compatible = "allwinner,sun50i-h616-r-pinctrl";
++			reg = <0x07022000 0x400>;
++			clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
++				 <&rtc CLK_OSC32K>;
++			clock-names = "apb", "hosc", "losc";
++			gpio-controller;
++			#gpio-cells = <3>;
++
++			/omit-if-no-ref/
++			r_i2c_pins: r-i2c-pins {
++				pins = "PL0", "PL1";
++				function = "s_i2c";
++			};
++
++			r_rsb_pins: r-rsb-pins {
++				pins = "PL0", "PL1";
++				function = "s_rsb";
++			};
++		};
++
++		ir: ir@7040000 {
++			compatible = "allwinner,sun50i-h616-ir",
++				     "allwinner,sun6i-a31-ir";
++			reg = <0x07040000 0x400>;
++			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&r_ccu CLK_R_APB1_IR>,
++				 <&r_ccu CLK_IR>;
++			clock-names = "apb", "ir";
++			resets = <&r_ccu RST_R_APB1_IR>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&ir_rx_pin>;
++			status = "disabled";
++		};
++
++		r_i2c: i2c@7081400 {
++			compatible = "allwinner,sun50i-h616-i2c",
++				     "allwinner,sun8i-v536-i2c",
++				     "allwinner,sun6i-a31-i2c";
++			reg = <0x07081400 0x400>;
++			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&r_ccu CLK_R_APB2_I2C>;
++			resets = <&r_ccu RST_R_APB2_I2C>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		r_rsb: rsb@7083000 {
++			compatible = "allwinner,sun50i-h616-rsb",
++				     "allwinner,sun8i-a23-rsb";
++			reg = <0x07083000 0x400>;
++			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&r_ccu CLK_R_APB2_RSB>;
++			clock-frequency = <3000000>;
++			resets = <&r_ccu RST_R_APB2_RSB>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&r_rsb_pins>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++	};
++};
+diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h
+new file mode 100644
+index 000000000..c845493e4
+--- /dev/null
++++ b/include/dt-bindings/clock/sun6i-rtc.h
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
++
++#ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_
++#define _DT_BINDINGS_CLK_SUN6I_RTC_H_
++
++#define CLK_OSC32K		0
++#define CLK_OSC32K_FANOUT	1
++#define CLK_IOSC		2
++
++#endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0003-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch

@@ -0,0 +1,60 @@
+From 452a691a83df1aab77cec33203cb04a817817a05 Mon Sep 17 00:00:00 2001
+From: The-going <48602507+The-going@users.noreply.github.com>
+Date: Thu, 5 May 2022 22:55:13 +0300
+Subject: [PATCH] drv: nvmem: sunxi_sid: Add sunxi_get_soc_chipid,
+ sunxi_get_serial
+
+---
+ drivers/nvmem/sunxi_sid.c | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
+index 37a6abb0e..c81fac63d 100644
+--- a/drivers/nvmem/sunxi_sid.c
++++ b/drivers/nvmem/sunxi_sid.c
+@@ -37,6 +37,25 @@ struct sunxi_sid {
+ 	u32			value_offset;
+ };
+ 
++static unsigned int sunxi_soc_chipid[4];
++static unsigned int sunxi_serial[4];
++
++int sunxi_get_soc_chipid(unsigned char *chipid)
++{
++	memcpy(chipid, sunxi_soc_chipid, 16);
++
++	return 0;
++}
++EXPORT_SYMBOL(sunxi_get_soc_chipid);
++
++int sunxi_get_serial(unsigned       char *serial)
++{
++	memcpy(serial, sunxi_serial, 16);
++
++	return 0;
++}
++EXPORT_SYMBOL(sunxi_get_serial);
++
+ static int sunxi_sid_read(void *context, unsigned int offset,
+ 			  void *val, size_t bytes)
+ {
+@@ -167,6 +186,15 @@ static int sunxi_sid_probe(struct platform_device *pdev)
+ 
+ 	platform_set_drvdata(pdev, nvmem);
+ 
++	nvmem_cfg->reg_read(sid, 0, &sunxi_soc_chipid[0], sizeof(int));
++	nvmem_cfg->reg_read(sid, 4, &sunxi_soc_chipid[1], sizeof(int));
++	nvmem_cfg->reg_read(sid, 8, &sunxi_soc_chipid[2], sizeof(int));
++	nvmem_cfg->reg_read(sid, 12, &sunxi_soc_chipid[3], sizeof(int));
++
++	sunxi_serial[0] = sunxi_soc_chipid[3];
++	sunxi_serial[1] = sunxi_soc_chipid[2];
++	sunxi_serial[2] = (sunxi_soc_chipid[1] >> 16) & 0x0ffff;
++
+ 	return 0;
+ }
+ 
+-- 
+2.35.3
+
+

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0004-dts-add-sunxi-info-device-tree-node.patch

@@ -0,0 +1,27 @@
+From 9a7776b44588c24d04ffff63194d8a137624f8ac Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Thu, 26 Jan 2023 09:50:42 +0100
+Subject: [PATCH] Add sunxi-info device tree node
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index ab344ea8a..d0b95d43a 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -586,5 +586,10 @@ r_rsb: rsb@7083000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+ 		};
++
++		sunxi-info {
++			compatible = "allwinner,sun50i-h616-sys-info";
++			status = "okay";
++		};
+ 	};
+ };
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0005-dts-add-addr_mgt-device-tree-node.patch

@@ -0,0 +1,32 @@
+From 706dc6ed092e4a1b9d84893cb4186fbd354bb1c8 Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Thu, 26 Jan 2023 09:51:22 +0100
+Subject: [PATCH] Add addr_mgt device tree node
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index d0b95d43a..15f45a3f9 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -591,5 +591,15 @@ sunxi-info {
+ 			compatible = "allwinner,sun50i-h616-sys-info";
+ 			status = "okay";
+ 		};
++
++		addr_mgt {
++			compatible = "allwinner,sunxi-addr_mgt";
++			type_addr_wifi = <0x00>;
++			type_addr_bt = <0x00>;
++			type_addr_eth = <0x00>;
++			status = "okay";
++			linux,phandle = <0x179>;
++			phandle = <0x179>;
++		};
+ 	};
+ };
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0007-drv-add-sunxi-addr-driver-used-to-fix-uwe5622-bluetooth-.patch

@@ -0,0 +1,613 @@
+From 29cfa9437eaa2ff862ab0f06852383b181b60743 Mon Sep 17 00:00:00 2001
+From: afaulkner420 <afaulkner420@gmail.com>
+Date: Fri, 25 Mar 2022 20:18:18 +0000
+Subject: [PATCH 04/11] Add sunxi-addr driver - Used to fix uwe5622 bluetooth
+ MAC addresses
+
+---
+ drivers/misc/Kconfig                 |   1 +
+ drivers/misc/Makefile                |   1 +
+ drivers/misc/sunxi-addr/Kconfig      |   6 +
+ drivers/misc/sunxi-addr/Makefile     |   5 +
+ drivers/misc/sunxi-addr/sha256.c     | 178 +++++++++++++
+ drivers/misc/sunxi-addr/sunxi-addr.c | 358 +++++++++++++++++++++++++++
+ 6 files changed, 549 insertions(+)
+ create mode 100644 drivers/misc/sunxi-addr/Kconfig
+ create mode 100644 drivers/misc/sunxi-addr/Makefile
+ create mode 100644 drivers/misc/sunxi-addr/sha256.c
+ create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
+
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 24cb809ae..52843042f 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -494,4 +494,5 @@ source "drivers/misc/cardreader/Kconfig"
+ source "drivers/misc/habanalabs/Kconfig"
+ source "drivers/misc/uacce/Kconfig"
+ source "drivers/misc/pvpanic/Kconfig"
++source "drivers/misc/sunxi-addr/Kconfig"
+ endmenu
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index f3eaa577a..0f9280509 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -60,3 +60,4 @@ obj-$(CONFIG_XILINX_SDFEC)	+= xilinx_sdfec.o
+ obj-$(CONFIG_HISI_HIKEY_USB)	+= hisi_hikey_usb.o
+ obj-$(CONFIG_HI6421V600_IRQ)	+= hi6421v600-irq.o
+ obj-$(CONFIG_MODEM_POWER)	+= modem-power.o
++obj-$(CONFIG_SUNXI_ADDR_MGT)    += sunxi-addr/
+\ No newline at end of file
+diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
+new file mode 100644
+index 000000000..801dd2c02
+--- /dev/null
++++ b/drivers/misc/sunxi-addr/Kconfig
+@@ -0,0 +1,6 @@
++config SUNXI_ADDR_MGT
++  tristate "Allwinner Network MAC Addess Manager"
++  depends on BT || ETHERNET || WLAN
++  depends on NVMEM_SUNXI_SID
++  help
++    allwinner network mac address management
+diff --git a/drivers/misc/sunxi-addr/Makefile b/drivers/misc/sunxi-addr/Makefile
+new file mode 100644
+index 000000000..f01fd4783
+--- /dev/null
++++ b/drivers/misc/sunxi-addr/Makefile
+@@ -0,0 +1,5 @@
++#
++# Makefile for wifi mac addr manager drivers
++#
++sunxi_addr-objs := sunxi-addr.o sha256.o
++obj-$(CONFIG_SUNXI_ADDR_MGT)   += sunxi_addr.o
+diff --git a/drivers/misc/sunxi-addr/sha256.c b/drivers/misc/sunxi-addr/sha256.c
+new file mode 100644
+index 000000000..78825810c
+--- /dev/null
++++ b/drivers/misc/sunxi-addr/sha256.c
+@@ -0,0 +1,178 @@
++/*
++ * Local implement of sha256.
++ *
++ * Copyright (C) 2013 Allwinner.
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2.  This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++#include <linux/kernel.h>
++#include <linux/string.h>
++
++/****************************** MACROS ******************************/
++#define ROTRIGHT(a, b) (((a) >> (b)) | ((a) << (32 - (b))))
++#define CH(x, y, z)    (((x) & (y)) ^ (~(x) & (z)))
++#define MAJ(x, y, z)   (((x) & (y)) ^  ((x) & (z)) ^ ((y) & (z)))
++#define EP0(x)         (ROTRIGHT(x,  2) ^ ROTRIGHT(x, 13) ^ ROTRIGHT(x, 22))
++#define EP1(x)         (ROTRIGHT(x,  6) ^ ROTRIGHT(x, 11) ^ ROTRIGHT(x, 25))
++#define SIG0(x)        (ROTRIGHT(x,  7) ^ ROTRIGHT(x, 18) ^ ((x) >> 3))
++#define SIG1(x)        (ROTRIGHT(x, 17) ^ ROTRIGHT(x, 19) ^ ((x) >> 10))
++
++/**************************** VARIABLES *****************************/
++static const uint32_t k[64] = {
++	0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
++	0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
++	0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
++	0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
++	0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
++	0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
++	0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
++	0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
++	0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
++	0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
++	0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
++	0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
++	0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
++	0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
++	0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
++	0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
++};
++
++struct sha256_ctx {
++	uint8_t data[64];   /* current 512-bit chunk of message data, just like a buffer */
++	uint32_t datalen;   /* sign the data length of current chunk */
++	uint64_t bitlen;    /* the bit length of the total message */
++	uint32_t state[8];  /* store the middle state of hash abstract */
++};
++
++/*********************** FUNCTION DEFINITIONS ***********************/
++static void sha256_transform(struct sha256_ctx *ctx, const uint8_t *data)
++{
++	uint32_t a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
++
++	/* initialization */
++	for (i = 0, j = 0; i < 16; ++i, j += 4)
++		m[i] = (data[j] << 24) | (data[j + 1] << 16) |
++			(data[j + 2] << 8) | (data[j + 3]);
++	for ( ; i < 64; ++i)
++		m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
++
++	a = ctx->state[0];
++	b = ctx->state[1];
++	c = ctx->state[2];
++	d = ctx->state[3];
++	e = ctx->state[4];
++	f = ctx->state[5];
++	g = ctx->state[6];
++	h = ctx->state[7];
++
++	for (i = 0; i < 64; ++i) {
++		t1 = h + EP1(e) + CH(e, f, g) + k[i] + m[i];
++		t2 = EP0(a) + MAJ(a, b, c);
++		h = g;
++		g = f;
++		f = e;
++		e = d + t1;
++		d = c;
++		c = b;
++		b = a;
++		a = t1 + t2;
++	}
++
++	ctx->state[0] += a;
++	ctx->state[1] += b;
++	ctx->state[2] += c;
++	ctx->state[3] += d;
++	ctx->state[4] += e;
++	ctx->state[5] += f;
++	ctx->state[6] += g;
++	ctx->state[7] += h;
++}
++
++static void sha256_init(struct sha256_ctx *ctx)
++{
++	ctx->datalen = 0;
++	ctx->bitlen = 0;
++	ctx->state[0] = 0x6a09e667;
++	ctx->state[1] = 0xbb67ae85;
++	ctx->state[2] = 0x3c6ef372;
++	ctx->state[3] = 0xa54ff53a;
++	ctx->state[4] = 0x510e527f;
++	ctx->state[5] = 0x9b05688c;
++	ctx->state[6] = 0x1f83d9ab;
++	ctx->state[7] = 0x5be0cd19;
++}
++
++static void sha256_update(struct sha256_ctx *ctx, const uint8_t *data, size_t len)
++{
++	uint32_t i;
++
++	for (i = 0; i < len; ++i) {
++		ctx->data[ctx->datalen] = data[i];
++		ctx->datalen++;
++		if (ctx->datalen == 64) {
++			/* 64 byte = 512 bit  means the buffer ctx->data has
++			 * fully stored one chunk of message,
++			 * so do the sha256 hash map for the current chunk.
++			 */
++			sha256_transform(ctx, ctx->data);
++			ctx->bitlen += 512;
++			ctx->datalen = 0;
++		}
++	}
++}
++
++static void sha256_final(struct sha256_ctx *ctx, uint8_t *hash)
++{
++	uint32_t i;
++
++	i = ctx->datalen;
++
++	/* Pad whatever data is left in the buffer. */
++	if (ctx->datalen < 56) {
++		ctx->data[i++] = 0x80;  /* pad 10000000 = 0x80 */
++		while (i < 56)
++			ctx->data[i++] = 0x00;
++	} else {
++		ctx->data[i++] = 0x80;
++		while (i < 64)
++			ctx->data[i++] = 0x00;
++		sha256_transform(ctx, ctx->data);
++		memset(ctx->data, 0, 56);
++	}
++
++	/* Append to the padding the total message's length in bits and transform. */
++	ctx->bitlen += ctx->datalen * 8;
++	ctx->data[63] = ctx->bitlen;
++	ctx->data[62] = ctx->bitlen >> 8;
++	ctx->data[61] = ctx->bitlen >> 16;
++	ctx->data[60] = ctx->bitlen >> 24;
++	ctx->data[59] = ctx->bitlen >> 32;
++	ctx->data[58] = ctx->bitlen >> 40;
++	ctx->data[57] = ctx->bitlen >> 48;
++	ctx->data[56] = ctx->bitlen >> 56;
++	sha256_transform(ctx, ctx->data);
++
++	/* copying the final state to the output hash(use big endian). */
++	for (i = 0; i < 4; ++i) {
++		hash[i]      = (ctx->state[0] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 4]  = (ctx->state[1] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 8]  = (ctx->state[2] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 12] = (ctx->state[3] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 16] = (ctx->state[4] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 20] = (ctx->state[5] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 24] = (ctx->state[6] >> (24 - i * 8)) & 0x000000ff;
++		hash[i + 28] = (ctx->state[7] >> (24 - i * 8)) & 0x000000ff;
++	}
++}
++
++int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output)
++{
++	struct sha256_ctx ctx;
++
++	sha256_init(&ctx);
++	sha256_update(&ctx, plaintext, psize);
++	sha256_final(&ctx, output);
++	return 0;
++}
+diff --git a/drivers/misc/sunxi-addr/sunxi-addr.c b/drivers/misc/sunxi-addr/sunxi-addr.c
+new file mode 100644
+index 000000000..a812e4e82
+--- /dev/null
++++ b/drivers/misc/sunxi-addr/sunxi-addr.c
+@@ -0,0 +1,358 @@
++/*
++ * The driver of SUNXI NET MAC ADDR Manager.
++ *
++ * Copyright (C) 2013 Allwinner.
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2.  This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++#define DEBUG
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/miscdevice.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++
++#define ADDR_MGT_DBG(fmt, arg...) printk(KERN_DEBUG "[ADDR_MGT] %s: " fmt "\n",\
++				__func__, ## arg)
++#define ADDR_MGT_ERR(fmt, arg...) printk(KERN_ERR "[ADDR_MGT] %s: " fmt "\n",\
++				__func__, ## arg)
++
++#define MODULE_CUR_VERSION  "v1.0.9"
++
++#define MATCH_STR_LEN       20
++#define ADDR_VAL_LEN        6
++#define ADDR_STR_LEN        18
++#define ID_LEN              16
++#define HASH_LEN            32
++
++#define TYPE_ANY            0
++#define TYPE_BURN           1
++#define TYPE_IDGEN          2
++#define TYPE_USER           3
++#define TYPE_RAND           4
++
++#define ADDR_FMT_STR        0
++#define ADDR_FMT_VAL        1
++
++#define IS_TYPE_INVALID(x)  ((x < TYPE_ANY) || (x > TYPE_RAND))
++
++#define ADDR_CLASS_ATTR_ADD(name) \
++static ssize_t addr_##name##_show(struct class *class, \
++		struct class_attribute *attr, char *buffer) \
++{ \
++	char addr[ADDR_STR_LEN]; \
++	if (IS_TYPE_INVALID(get_addr_by_name(ADDR_FMT_STR, addr, #name))) \
++		return 0; \
++	return sprintf(buffer, "%.17s\n", addr); \
++} \
++static ssize_t addr_##name##_store(struct class *class, \
++		struct class_attribute *attr, \
++		const char *buffer, size_t count) \
++{ \
++	if (count != ADDR_STR_LEN) { \
++		ADDR_MGT_ERR("Length wrong."); \
++		return -EINVAL; \
++	} \
++	set_addr_by_name(TYPE_USER, ADDR_FMT_STR, buffer, #name); \
++	return count; \
++} \
++static CLASS_ATTR_RW(addr_##name);
++
++struct addr_mgt_info {
++	unsigned int type_def;
++	unsigned int type_cur;
++	unsigned int flag;
++	char *addr;
++	char *name;
++};
++
++static struct addr_mgt_info info[] = {
++	{TYPE_ANY, TYPE_ANY, 1, NULL, "wifi"},
++	{TYPE_ANY, TYPE_ANY, 0, NULL, "bt"  },
++	{TYPE_ANY, TYPE_ANY, 1, NULL, "eth" },
++};
++
++extern int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output);
++extern int sunxi_get_soc_chipid(unsigned char *chipid);
++
++static int addr_parse(int fmt, const char *addr, int check)
++{
++	char val_buf[ADDR_VAL_LEN];
++	char cmp_buf[ADDR_VAL_LEN];
++	int  ret = ADDR_VAL_LEN;
++
++	if (fmt == ADDR_FMT_STR)
++		ret = sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
++					&val_buf[0], &val_buf[1], &val_buf[2],
++					&val_buf[3], &val_buf[4], &val_buf[5]);
++	else
++		memcpy(val_buf, addr, ADDR_VAL_LEN);
++
++	if (ret != ADDR_VAL_LEN)
++		return -1;
++
++	if (check && (val_buf[0] & 0x3))
++		return -1;
++
++	memset(cmp_buf, 0x00, ADDR_VAL_LEN);
++	if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
++		return -1;
++
++	memset(cmp_buf, 0xFF, ADDR_VAL_LEN);
++	if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
++		return -1;
++
++	return 0;
++}
++
++static struct addr_mgt_info *addr_find_by_name(char *name)
++{
++	int i = 0;
++	for (i = 0; i < ARRAY_SIZE(info); i++) {
++		if (strcmp(info[i].name, name) == 0)
++			return &info[i];
++	}
++	return NULL;
++}
++
++static int get_addr_by_name(int fmt, char *addr, char *name)
++{
++	struct addr_mgt_info *t;
++
++	t = addr_find_by_name(name);
++	if (t == NULL) {
++		ADDR_MGT_ERR("can't find addr named: %s", name);
++		return -1;
++	}
++
++	if (IS_TYPE_INVALID(t->type_cur)) {
++		ADDR_MGT_ERR("addr type invalid");
++		return -1;
++	}
++
++	if (addr_parse(ADDR_FMT_VAL, t->addr, t->flag)) {
++		ADDR_MGT_ERR("addr parse fail(%s)", t->addr);
++		return -1;
++	}
++
++	if (fmt == ADDR_FMT_STR)
++		sprintf(addr, "%02X:%02X:%02X:%02X:%02X:%02X",
++				t->addr[0], t->addr[1], t->addr[2],
++				t->addr[3], t->addr[4], t->addr[5]);
++	else
++		memcpy(addr, t->addr, ADDR_VAL_LEN);
++
++	return t->type_cur;
++}
++
++static int set_addr_by_name(int type, int fmt, const char *addr, char *name)
++{
++	struct addr_mgt_info *t;
++
++	t = addr_find_by_name(name);
++	if (t == NULL) {
++		ADDR_MGT_ERR("can't find addr named: %s", name);
++		return -1;
++	}
++
++	if (addr_parse(fmt, addr, t->flag)) {
++		ADDR_MGT_ERR("addr parse fail(%s)", addr);
++		return -1;
++	}
++
++	t->type_cur = type;
++	if (fmt == ADDR_FMT_STR)
++		sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
++				&t->addr[0], &t->addr[1], &t->addr[2],
++				&t->addr[3], &t->addr[4], &t->addr[5]);
++	else
++		memcpy(t->addr, addr, ADDR_VAL_LEN);
++
++	return 0;
++}
++
++int get_custom_mac_address(int fmt, char *name, char *addr)
++{
++	return get_addr_by_name(fmt, addr, name);
++}
++EXPORT_SYMBOL_GPL(get_custom_mac_address);
++
++static int addr_factory(struct device_node *np,
++			int idx, int type, char *mac, char *name)
++{
++	int  ret, i;
++	char match[MATCH_STR_LEN];
++	const char *p;
++	char id[ID_LEN], hash[HASH_LEN], cmp_buf[ID_LEN];
++	struct timespec64 curtime;
++
++	switch (type) {
++	case TYPE_BURN:
++		sprintf(match, "addr_%s", name);
++		ret = of_property_read_string_index(np, match, 0, &p);
++		if (ret)
++			return -1;
++
++		ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
++			&mac[0], &mac[1], &mac[2],
++			&mac[3], &mac[4], &mac[5]);
++
++		if (ret != ADDR_VAL_LEN)
++			return -1;
++		break;
++	case TYPE_IDGEN:
++		if (idx > HASH_LEN / ADDR_VAL_LEN - 1)
++			return -1;
++		if (sunxi_get_soc_chipid(id))
++			return -1;
++		memset(cmp_buf, 0x00, ID_LEN);
++		if (memcmp(id, cmp_buf, ID_LEN) == 0)
++			return -1;
++		if (hmac_sha256(id, ID_LEN, hash))
++			return -1;
++		memcpy(mac, &hash[idx * ADDR_VAL_LEN], ADDR_VAL_LEN);
++		break;
++	case TYPE_RAND:
++		for (i = 0; i < ADDR_VAL_LEN; i++) {
++			ktime_get_real_ts64(&curtime);
++			mac[i] = (char)curtime.tv_nsec;
++		}
++		break;
++	default:
++		ADDR_MGT_ERR("unsupport type: %d", type);
++		return -1;
++	}
++	return 0;
++}
++
++static int addr_init(struct platform_device *pdev)
++{
++	struct device_node *np = pdev->dev.of_node;
++	int  type, i, j;
++	char match[MATCH_STR_LEN];
++	char addr[ADDR_VAL_LEN];
++	int  type_tab[] = {TYPE_BURN, TYPE_IDGEN, TYPE_RAND};
++
++	/* init addr type and value */
++	for (i = 0; i < ARRAY_SIZE(info); i++) {
++		sprintf(match, "type_addr_%s", info[i].name);
++		if (of_property_read_u32(np, match, &type)) {
++			ADDR_MGT_DBG("Failed to get type_def_%s, use default: %d",
++						info[i].name, info[i].type_def);
++		} else {
++			info[i].type_def = type;
++			info[i].type_cur = type;
++		}
++
++		if (IS_TYPE_INVALID(info[i].type_def))
++			return -1;
++		if (info[i].type_def != TYPE_ANY) {
++			if (addr_factory(np, i, info[i].type_def, addr, info[i].name))
++				return -1;
++		} else {
++			for (j = 0; j < ARRAY_SIZE(type_tab); j++) {
++				if (!addr_factory(np, i, type_tab[j], addr, info[i].name)) {
++					info[i].type_cur = type_tab[j];
++					break;
++				}
++			}
++		}
++
++		if (info[i].flag)
++			addr[0] &= 0xFC;
++
++		if (addr_parse(ADDR_FMT_VAL, addr, info[i].flag))
++			return -1;
++		else {
++			info[i].addr = devm_kzalloc(&pdev->dev, ADDR_VAL_LEN, GFP_KERNEL);
++			memcpy(info[i].addr, addr, ADDR_VAL_LEN);
++		}
++	}
++	return 0;
++}
++
++static ssize_t summary_show(struct class *class,
++				struct class_attribute *attr, char *buffer)
++{
++	int i = 0, ret = 0;
++
++	ret += sprintf(&buffer[ret], "name cfg cur address\n");
++	for (i = 0; i < ARRAY_SIZE(info); i++) {
++		ret += sprintf(&buffer[ret],
++			"%4s  %d   %d  %02X:%02X:%02X:%02X:%02X:%02X\n",
++			info[i].name,   info[i].type_def, info[i].type_cur,
++			info[i].addr[0], info[i].addr[1], info[i].addr[2],
++			info[i].addr[3], info[i].addr[4], info[i].addr[5]);
++	}
++	return ret;
++}
++static CLASS_ATTR_RO(summary);
++
++ADDR_CLASS_ATTR_ADD(wifi);
++ADDR_CLASS_ATTR_ADD(bt);
++ADDR_CLASS_ATTR_ADD(eth);
++
++static struct attribute *addr_class_attrs[] = {
++	&class_attr_summary.attr,
++	&class_attr_addr_wifi.attr,
++	&class_attr_addr_bt.attr,
++	&class_attr_addr_eth.attr,
++	NULL
++};
++ATTRIBUTE_GROUPS(addr_class);
++
++static struct class addr_class = {
++	.name = "addr_mgt",
++	.owner = THIS_MODULE,
++	.class_groups = addr_class_groups,
++};
++
++static const struct of_device_id addr_mgt_ids[] = {
++	{ .compatible = "allwinner,sunxi-addr_mgt" },
++	{ /* Sentinel */ }
++};
++
++static int addr_mgt_probe(struct platform_device *pdev)
++{
++	int status;
++
++	ADDR_MGT_DBG("module version: %s", MODULE_CUR_VERSION);
++	status = class_register(&addr_class);
++	if (status < 0) {
++		ADDR_MGT_ERR("class register error, status: %d.", status);
++		return -1;
++	}
++
++	if (addr_init(pdev)) {
++		ADDR_MGT_ERR("failed to init addr.");
++		class_unregister(&addr_class);
++		return -1;
++	}
++	ADDR_MGT_DBG("success.");
++	return 0;
++}
++
++static int addr_mgt_remove(struct platform_device *pdev)
++{
++	class_unregister(&addr_class);
++	return 0;
++}
++
++static struct platform_driver addr_mgt_driver = {
++	.probe  = addr_mgt_probe,
++	.remove = addr_mgt_remove,
++	.driver = {
++		.owner = THIS_MODULE,
++		.name  = "sunxi-addr-mgt",
++		.of_match_table = addr_mgt_ids,
++	},
++};
++
++module_platform_driver_probe(addr_mgt_driver, addr_mgt_probe);
++
++MODULE_AUTHOR("Allwinnertech");
++MODULE_DESCRIPTION("Network MAC Addess Manager");
++MODULE_LICENSE("GPL");
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch

@@ -0,0 +1,28 @@
+From 70a0c21f9bc1eed754cce584fe382883dc412db0 Mon Sep 17 00:00:00 2001
+From: afaulkner420 <afaulkner420@gmail.com>
+Date: Fri, 25 Mar 2022 20:31:26 +0000
+Subject: [PATCH 08/11] uwe5622: bluetooth: Fix firmware init fail
+
+---
+ net/bluetooth/hci_core.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
+index c67390367..b2ee9b6a8 100644
+--- a/net/bluetooth/hci_core.c
++++ b/net/bluetooth/hci_core.c
+@@ -932,7 +932,11 @@ static int __hci_init(struct hci_dev *hdev)
+ 
+ 	err = __hci_req_sync(hdev, hci_init3_req, 0, HCI_INIT_TIMEOUT, NULL);
+ 	if (err < 0)
++#if defined(CONFIG_RK_WIFI_DEVICE_UWE5621) || defined(CONFIG_AW_WIFI_DEVICE_UWE5622)
++		;
++#else
+ 		return err;
++#endif
+ 
+ 	err = __hci_req_sync(hdev, hci_init4_req, 0, HCI_INIT_TIMEOUT, NULL);
+ 	if (err < 0)
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0010-drv-fix-incldue-path-for-unisocwcn.patch

@@ -0,0 +1,45 @@
+From bb564341bb6c64003abbf24fd5d5ef254060b040 Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Thu, 19 Jan 2023 10:46:28 +0100
+Subject: [PATCH] Fix incldue path for unisocwcn
+
+---
+ drivers/net/wireless/uwe5622/Makefile           | 4 +++-
+ drivers/net/wireless/uwe5622/unisocwcn/Makefile | 6 +++---
+ 2 files changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/net/wireless/uwe5622/Makefile b/drivers/net/wireless/uwe5622/Makefile
+index 313ea5123..e9a398584 100644
+--- a/drivers/net/wireless/uwe5622/Makefile
++++ b/drivers/net/wireless/uwe5622/Makefile
+@@ -2,7 +2,9 @@ obj-$(CONFIG_AW_WIFI_DEVICE_UWE5622) += unisocwcn/
+ obj-$(CONFIG_WLAN_UWE5622)    += unisocwifi/
+ obj-$(CONFIG_TTY_OVERY_SDIO)  += tty-sdio/
+ 
+-UNISOCWCN_DIR := $(shell cd $(src)/unisocwcn/ && /bin/pwd)
++mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
++UNISOCWCN_DIR := $(dir $(mkfile_path))/unisocwcn/
++
+ UNISOC_BSP_INCLUDE := $(UNISOCWCN_DIR)/include
+ export UNISOC_BSP_INCLUDE
+ 
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/Makefile b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
+index b62652f63..ae6e1e25a 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/Makefile
++++ b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
+@@ -119,9 +119,9 @@ ccflags-y += -DCONFIG_WCN_UTILS
+ 
+ #### include path ######
+ ccflags-y += -I$(src)/../tty-sdio
+-ccflags-y += -I$(src)/include/
+-ccflags-y += -I$(src)/platform/
+-ccflags-y += -I$(src)/platform/rf/
++ccflags-y += -I$(srctree)/$(src)/include/
++ccflags-y += -I$(srctree)/$(src)/platform/
++ccflags-y += -I$(srctree)/$(src)/platform/rf/
+ 
+ #### add cflag for Customer ######
+ ### ---------- Hisilicon start ---------- ###
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline.inc

@@ -0,0 +1,43 @@
+SECTION = "kernel"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
+COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
+
+inherit kernel
+
+require linux.inc
+
+LINUX_VERSION = "${PV}"
+
+# Since we're not using git, this doesn't make a difference, but we need to fill
+# in something or kernel-yocto.bbclass will fail.
+KBRANCH ?= "master"
+
+DEPENDS += "rsync-native"
+
+# Pull in the devicetree files into the rootfs
+RDEPENDS_${KERNEL_PACKAGE_NAME}-base += "kernel-devicetree"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+LINUX_VERSION ?= "${PV}"
+
+S = "${WORKDIR}/linux-${PV}"
+
+SRC_URI = "https://www.kernel.org/pub/linux/kernel/v5.x/linux-${PV}.tar.xz \
+	file://0001-dts-orange-pi-zero-Add-wifi-support.patch \
+	file://0002-dts-nanopi-neo-air-add-camera.patch \
+	file://0003-dts-allwinner-bananapi-m2-zreo-Enforce-consistent-MM.patch \
+	file://0004-i2c-mv64xxx-Add-atomic_xfer-method-to-driver.patch \
+	file://0005-i2c-mv64xxx-Remove-shutdown-method-from-driver.patch \
+	file://0006-orangepi-pc-plus-Added-mmc-aliases-to-have-consisten.patch \
+	file://defconfig \
+"
+
+SRC_URI:append:use-mailine-graphics = " file://drm.cfg"
+SRC_URI:append:bananapi = " file://axp20x.cfg"
+SRC_URI:append:bananapi-m2-zero = " file://axp20x.cfg"
+SRC_URI:append:cubietruck = " file://axp20x.cfg"
+SRC_URI:append:nanopi-neo-air = " file://cam500b.cfg"
+
+FILES_${KERNEL_PACKAGE_NAME}-base:append = " ${nonarch_base_libdir}/modules/${KERNEL_VERSION}/modules.builtin.modinfo"

recipes-kernel/linux/linux-mainline/0001-dts-orange-pi-zero-Add-wifi-support.patch

@@ -1,8 +1,8 @@
 diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-index 6713d0f2b3f4..ad0829e8f716 100644
+index 84cd9c061..917986cce 100644
 --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-@@ -80,19 +80,22 @@
+@@ -80,13 +80,15 @@
  		};
  	};
  
@@ -19,10 +19,16 @@ index 6713d0f2b3f4..ad0829e8f716 100644
  		gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
 +		startup-delay-us = <70000>;
 +		enable-active-high;
++
+ 	};
+ 
+ 	reg_vdd_cpux: vdd-cpux-regulator {
+@@ -106,10 +108,12 @@
+ 			  1300000 1>;
  	};
  
 -	wifi_pwrseq: wifi_pwrseq {
-+	pwrseq_wifi: pwrseq_wifi@0 {
++	pwrseq_wifi: pwrseq_wifi {
  		compatible = "mmc-pwrseq-simple";
 +		pinctrl-names = "default";
 +		pinctrl-0 = <&wifi_rst>;
@@ -32,10 +38,10 @@ index 6713d0f2b3f4..ad0829e8f716 100644
  	};
  };
  
-@@ -124,9 +127,11 @@
+@@ -140,9 +144,11 @@
+ };
+ 
  &mmc1 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc1_pins_a>;
 -	vmmc-supply = <&reg_vcc_wifi>;
 -	mmc-pwrseq = <&wifi_pwrseq>;
 +	vmmc-supply = <&reg_vcc3v3>;
@@ -46,7 +52,7 @@ index 6713d0f2b3f4..ad0829e8f716 100644
  	non-removable;
  	status = "okay";
  
-@@ -136,9 +141,30 @@
+@@ -152,6 +158,13 @@
  	 */
  	xr819: sdio_wifi@1 {
  		reg = <1>;
@@ -60,6 +66,11 @@ index 6713d0f2b3f4..ad0829e8f716 100644
  	};
  };
  
+@@ -208,3 +221,18 @@
+ 	status = "okay";
+ 	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ };
++
 +&pio {
 +	wifi_wake: wifi_wake {
 +		pins = "PG10";
@@ -74,6 +85,3 @@ index 6713d0f2b3f4..ad0829e8f716 100644
 +    };
 +};
 +
- &mmc1_pins_a {
- 	bias-pull-up;
- };

recipes-kernel/linux/linux-mainline/0002-dts-nanopi-neo-air-add-camera.patch

@@ -0,0 +1,101 @@
+diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+index cd3df12b65..33a161692f 100644
+--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+@@ -77,6 +77,39 @@
+ 		compatible = "mmc-pwrseq-simple";
+ 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ 	};
++
++        cam_xclk: cam-xclk {
++                #clock-cells = <0>;
++                compatible = "fixed-clock";
++                clock-frequency = <24000000>;
++                clock-output-names = "cam-xclk";
++        };
++
++        reg_cam_avdd: cam-avdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-avdd";
++                regulator-min-microvolt = <2800000>;
++                regulator-max-microvolt = <2800000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++        reg_cam_dovdd: cam-dovdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-dovdd";
++                regulator-min-microvolt = <1800000>;
++                regulator-max-microvolt = <1800000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++        reg_cam_dvdd: cam-dvdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-dvdd";
++                regulator-min-microvolt = <1500000>;
++                regulator-max-microvolt = <1500000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++
+ };
+ 
+ &mmc0 {
+@@ -141,3 +174,55 @@
+ 	/* USB VBUS is always on */
+ 	status = "okay";
+ };
++
++&csi {
++    status = "okay";
++
++    port {
++        #address-cells = <1>;
++        #size-cells = <0>;
++
++        /* Parallel bus endpoint */
++        csi_from_ov5640: endpoint {
++            remote-endpoint = <&ov5640_to_csi>;
++            bus-width = <8>;
++            data-shift = <2>;
++            hsync-active = <1>; /* Active high */
++            vsync-active = <0>; /* Active low */
++            data-active = <1>;  /* Active high */
++            pclk-sample = <1>;  /* Rising */
++        };
++    };
++};
++
++&i2c2 {
++   status = "okay";
++
++   ov5640: camera@3c {
++        compatible = "ovti,ov5640";
++        reg = <0x3c>;
++        clocks = <&cam_xclk>;
++        clock-names = "xclk";
++
++        reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
++        powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
++        AVDD-supply = <&reg_cam_avdd>;
++        DOVDD-supply = <&reg_cam_dovdd>;
++        DVDD-supply = <&reg_cam_dvdd>;
++
++        port {
++            ov5640_to_csi: endpoint {
++                remote-endpoint = <&csi_from_ov5640>;
++                bus-width = <8>;
++                data-shift = <2>;
++                hsync-active = <1>; /* Active high */
++                vsync-active = <0>; /* Active low */
++                data-active = <1>;  /* Active high */
++                pclk-sample = <1>;  /* Rising */
++            };
++        };
++    };
++};
++&i2c2_pins {
++   bias-pull-up;
++};
+

recipes-kernel/linux/linux-mainline/0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch

@@ -1,80 +0,0 @@
-From 4ca766a768e783ee5198f1935b7f46a5df9b4a35 Mon Sep 17 00:00:00 2001
-From: Jelle van der Waa <jelle@vdwaa.nl>
-Date: Tue, 23 Jan 2018 15:58:44 -0800
-Subject: [PATCH] ARM: dts: nanopi-neo-air: Add WiFi / eMMC
-
-Enable the WiFi (AP6212) chip and eMMC support for the NanoPi NEO Air.
-
-This patch was originally submitted by Jelle van der Waa. Martin Kelly
-modified it to compile on the latest kernel, fixed up some review
-comments from Maxime Ripard, and re-tested the patch.
-
-The patch has been reworked to add back eMMC support which has been left
-out at the last backport.
-
-Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
-Cc: linux-sunxi@googlegroups.com
-Cc: devicetree@vger.kernel.org
-Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
-Signed-off-by: Martin Kelly <mkelly@xevo.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Florin Sarbu <florin@resin.io>
----
- arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 34 +++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
-index 03ff6f8..a9331fe 100644
---- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
-@@ -72,6 +72,11 @@
- 			gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
- 		};
- 	};
-+
-+	wifi_pwrseq: wifi_pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-+	};
- };
- 
- &mmc0 {
-@@ -84,6 +89,35 @@
- 	status = "okay";
- };
- 
-+&mmc1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mmc1_pins_a>;
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+	mmc-pwrseq = <&wifi_pwrseq>;
-+	bus-width = <4>;
-+	non-removable;
-+	status = "okay";
-+
-+	brcmf: bcrmf@1 {
-+		reg = <1>;
-+		compatible = "brcm,bcm4329-fmac";
-+		interrupt-parent = <&pio>;
-+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
-+		interrupt-names = "host-wake";
-+	};
-+};
-+
-+&mmc2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mmc2_8bit_pins>;
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
- &uart0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&uart0_pins_a>;
--- 
-2.11.0
-

recipes-kernel/linux/linux-mainline/0003-dts-allwinner-bananapi-m2-zreo-Enforce-consistent-MM.patch

@@ -0,0 +1,28 @@
+From 9b4baa9b5aab0511c46a1ae95485e1a3ea984352 Mon Sep 17 00:00:00 2001
+From: matteolel <matteolel91@hotmail.it>
+Date: Fri, 9 Dec 2022 16:38:11 +0000
+Subject: [PATCH] dts: allwinner: bananapi-m2-zreo: Enforce consistent MMC
+ numbering
+
+Enforce MMC number (sometimes the order was wrong and the device does not boot).
+---
+ arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+index 8e8634ff2..37a2ed937 100644
+--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+@@ -20,6 +20,9 @@ / {
+ 	aliases {
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
++		mmc0 = &mmc0;
++		mmc1 = &mmc1;
++		mmc2 = &mmc2;
+ 	};
+ 
+ 	chosen {
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/0004-i2c-mv64xxx-Add-atomic_xfer-method-to-driver.patch

@@ -0,0 +1,145 @@
+From 544a8d75f3d6e60e160cd92dc56321484598a993 Mon Sep 17 00:00:00 2001
+From: Chris Morgan <macromorgan@hotmail.com>
+Date: Wed, 30 Mar 2022 12:16:57 -0500
+Subject: [PATCH] i2c: mv64xxx: Add atomic_xfer method to driver
+
+Add an atomic_xfer method to the driver so that it behaves correctly
+when controlling a PMIC that is responsible for device shutdown.
+
+The atomic_xfer method added is similar to the one from the i2c-rk3x
+driver. When running an atomic_xfer a bool flag in the driver data is
+set, the interrupt is not unmasked on transfer start, and the IRQ
+handler is manually invoked while waiting for pending transfers to
+complete.
+
+Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
+Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+Signed-off-by: Wolfram Sang <wsa@kernel.org>
+---
+ drivers/i2c/busses/i2c-mv64xxx.c | 52 ++++++++++++++++++++++++++++----
+ 1 file changed, 46 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
+index 424c53e4c513..103a05ecc3d6 100644
+--- a/drivers/i2c/busses/i2c-mv64xxx.c
++++ b/drivers/i2c/busses/i2c-mv64xxx.c
+@@ -150,6 +150,7 @@ struct mv64xxx_i2c_data {
+ 	/* Clk div is 2 to the power n, not 2 to the power n + 1 */
+ 	bool			clk_n_base_0;
+ 	struct i2c_bus_recovery_info	rinfo;
++	bool			atomic;
+ };
+ 
+ static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
+@@ -179,7 +180,10 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
+ 	u32	dir = 0;
+ 
+ 	drv_data->cntl_bits = MV64XXX_I2C_REG_CONTROL_ACK |
+-		MV64XXX_I2C_REG_CONTROL_INTEN | MV64XXX_I2C_REG_CONTROL_TWSIEN;
++			      MV64XXX_I2C_REG_CONTROL_TWSIEN;
++
++	if (!drv_data->atomic)
++		drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_INTEN;
+ 
+ 	if (msg->flags & I2C_M_RD)
+ 		dir = 1;
+@@ -409,7 +413,8 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
+ 	case MV64XXX_I2C_ACTION_RCV_DATA_STOP:
+ 		drv_data->msg->buf[drv_data->byte_posn++] =
+ 			readl(drv_data->reg_base + drv_data->reg_offsets.data);
+-		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
++		if (!drv_data->atomic)
++			drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
+ 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
+ 			drv_data->reg_base + drv_data->reg_offsets.control);
+ 		drv_data->block = 0;
+@@ -427,7 +432,8 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
+ 		drv_data->rc = -EIO;
+ 		fallthrough;
+ 	case MV64XXX_I2C_ACTION_SEND_STOP:
+-		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
++		if (!drv_data->atomic)
++			drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
+ 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
+ 			drv_data->reg_base + drv_data->reg_offsets.control);
+ 		drv_data->block = 0;
+@@ -575,6 +581,17 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
+ 		spin_unlock_irqrestore(&drv_data->lock, flags);
+ }
+ 
++static void mv64xxx_i2c_wait_polling(struct mv64xxx_i2c_data *drv_data)
++{
++	ktime_t timeout = ktime_add_ms(ktime_get(), drv_data->adapter.timeout);
++
++	while (READ_ONCE(drv_data->block) &&
++	       ktime_compare(ktime_get(), timeout) < 0) {
++		udelay(5);
++		mv64xxx_i2c_intr(0, drv_data);
++	}
++}
++
+ static int
+ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
+ 				int is_last)
+@@ -590,7 +607,11 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
+ 	mv64xxx_i2c_send_start(drv_data);
+ 	spin_unlock_irqrestore(&drv_data->lock, flags);
+ 
+-	mv64xxx_i2c_wait_for_completion(drv_data);
++	if (!drv_data->atomic)
++		mv64xxx_i2c_wait_for_completion(drv_data);
++	else
++		mv64xxx_i2c_wait_polling(drv_data);
++
+ 	return drv_data->rc;
+ }
+ 
+@@ -717,7 +738,7 @@ mv64xxx_i2c_functionality(struct i2c_adapter *adap)
+ }
+ 
+ static int
+-mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
++mv64xxx_i2c_xfer_core(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
+ {
+ 	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
+ 	int rc, ret = num;
+@@ -730,7 +751,7 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
+ 	drv_data->msgs = msgs;
+ 	drv_data->num_msgs = num;
+ 
+-	if (mv64xxx_i2c_can_offload(drv_data))
++	if (mv64xxx_i2c_can_offload(drv_data) && !drv_data->atomic)
+ 		rc = mv64xxx_i2c_offload_xfer(drv_data);
+ 	else
+ 		rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[0], num == 1);
+@@ -747,8 +768,27 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
+ 	return ret;
+ }
+ 
++static int
++mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
++{
++	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
++
++	drv_data->atomic = 0;
++	return mv64xxx_i2c_xfer_core(adap, msgs, num);
++}
++
++static int mv64xxx_i2c_xfer_atomic(struct i2c_adapter *adap,
++				   struct i2c_msg msgs[], int num)
++{
++	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
++
++	drv_data->atomic = 1;
++	return mv64xxx_i2c_xfer_core(adap, msgs, num);
++}
++
+ static const struct i2c_algorithm mv64xxx_i2c_algo = {
+ 	.master_xfer = mv64xxx_i2c_xfer,
++	.master_xfer_atomic = mv64xxx_i2c_xfer_atomic,
+ 	.functionality = mv64xxx_i2c_functionality,
+ };
+ 
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/0005-i2c-mv64xxx-Remove-shutdown-method-from-driver.patch

@@ -0,0 +1,56 @@
+From 09b343038e3470e4d0da45f0ee09fb42107e5314 Mon Sep 17 00:00:00 2001
+From: Chris Morgan <macromorgan@hotmail.com>
+Date: Fri, 25 Mar 2022 13:06:25 -0500
+Subject: [PATCH] i2c: mv64xxx: Remove shutdown method from driver
+
+When I attempt to shut down (or reboot) my R8 based NTC CHIP with this
+i2c driver I get the following error: "i2c i2c-0: mv64xxx: I2C bus
+locked, block: 1, time_left: 0". Reboots are successful but shutdowns
+freeze. If I comment out the shutdown routine the device both reboots
+and shuts down successfully without receiving this error (however it
+does receive a warning of missing atomic_xfer).
+
+It appears that very few i2c drivers have a shutdown method, I assume
+because these devices are often used to communicate with PMICs (such
+as in my case with the R8 based NTC CHIP). I'm proposing we simply
+remove this method so long as it doesn't cause trouble for others
+downstream. I'll work on an atomic_xfer method and submit that in
+a different patch.
+
+Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
+Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+Signed-off-by: Wolfram Sang <wsa@kernel.org>
+---
+ drivers/i2c/busses/i2c-mv64xxx.c | 9 ---------
+ 1 file changed, 9 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
+index 5c8e94b6cdb5..424c53e4c513 100644
+--- a/drivers/i2c/busses/i2c-mv64xxx.c
++++ b/drivers/i2c/busses/i2c-mv64xxx.c
+@@ -1047,14 +1047,6 @@ mv64xxx_i2c_remove(struct platform_device *pd)
+ 	return 0;
+ }
+ 
+-static void
+-mv64xxx_i2c_shutdown(struct platform_device *pd)
+-{
+-	pm_runtime_disable(&pd->dev);
+-	if (!pm_runtime_status_suspended(&pd->dev))
+-		mv64xxx_i2c_runtime_suspend(&pd->dev);
+-}
+-
+ static const struct dev_pm_ops mv64xxx_i2c_pm_ops = {
+ 	SET_RUNTIME_PM_OPS(mv64xxx_i2c_runtime_suspend,
+ 			   mv64xxx_i2c_runtime_resume, NULL)
+@@ -1065,7 +1057,6 @@ static const struct dev_pm_ops mv64xxx_i2c_pm_ops = {
+ static struct platform_driver mv64xxx_i2c_driver = {
+ 	.probe	= mv64xxx_i2c_probe,
+ 	.remove	= mv64xxx_i2c_remove,
+-	.shutdown = mv64xxx_i2c_shutdown,
+ 	.driver	= {
+ 		.name	= MV64XXX_I2C_CTLR_NAME,
+ 		.pm     = &mv64xxx_i2c_pm_ops,
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/0006-orangepi-pc-plus-Added-mmc-aliases-to-have-consisten.patch

@@ -0,0 +1,30 @@
+From 60ffeb194d08817efab0467e2b2d7eff502f3276 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Wed, 10 Jan 2024 08:37:32 +0100
+Subject: [PATCH] orangepi-pc-plus: Added mmc aliases to have consistent
+ devices
+
+It fix random issues with boot problem.
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+index babf4cf1b..8c9bd76f5 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+@@ -50,6 +50,9 @@ / {
+ 	aliases {
+ 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ 		ethernet1 = &rtl8189ftv;
++		mmc0 = &mmc0;
++		mmc1 = &mmc1;
++		mmc2 = &mmc2;
+ 	};
+ };
+ 
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/aarch64/defconfig

@@ -141,6 +141,11 @@ CONFIG_BT_LEDS=y
 # CONFIG_BT_DEBUGFS is not set
 CONFIG_BT_HCIUART=m
 CONFIG_BT_HCIUART_LL=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_PRIV=y
 CONFIG_CFG80211=m
 CONFIG_MAC80211=m
 CONFIG_MAC80211_LEDS=y
@@ -334,6 +339,7 @@ CONFIG_MFD_MAX77620=y
 CONFIG_MFD_SPMI_PMIC=y
 CONFIG_MFD_RK808=y
 CONFIG_MFD_SEC_CORE=y
+CONFIG_REGULATOR=y
 CONFIG_REGULATOR_AXP20X=y
 CONFIG_REGULATOR_FAN53555=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -494,6 +500,8 @@ CONFIG_VIRTIO_BALLOON=y
 CONFIG_VIRTIO_MMIO=y
 CONFIG_XEN_GNTDEV=y
 CONFIG_XEN_GRANT_DEV_ALLOC=y
+CONFIG_STAGING=y
+CONFIG_RTL8723BS=m
 CONFIG_COMMON_CLK_RK808=y
 CONFIG_COMMON_CLK_SCPI=y
 CONFIG_COMMON_CLK_CS2000_CP=y

recipes-kernel/linux/linux-mainline/arm/defconfig

@@ -485,8 +485,8 @@ CONFIG_CW1200_WLAN_SDIO=m
 CONFIG_CW1200_WLAN_SPI=m
 CONFIG_RSI_91X=m
 # CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_INPUT_MOUSE=y
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_SUN4I=y
 CONFIG_INPUT_MISC=y

recipes-kernel/linux/linux-mainline/axp20x.cfg

@@ -0,0 +1,4 @@
+CONFIG_MFD_AXP20X_I2C=y
+CONFIG_MFD_AXP20X=y
+CONFIG_IIO=y
+CONFIG_AXP20X_POWER=y

recipes-kernel/linux/linux-mainline/cam500b.cfg

@@ -0,0 +1,6 @@
+CONFIG_MEDIA_PLATFORM_SUPPORT=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+
+CONFIG_VIDEO_OV5640=m
+CONFIG_VIDEO_SUN6I_CSI=m
+CONFIG_VIDEO_V4L2=m

recipes-kernel/linux/linux-mainline/drm.cfg

@@ -0,0 +1,9 @@
+CONFIG_DRM=y
+CONFIG_DRM_SUN4I=y
+CONFIG_DRM_SUN8I_DW_HDMI=y
+CONFIG_DRM_SUN8I_MIXER=y
+CONFIG_IOMMU_SUPPORT=y
+CONFIG_DRM_LIMA=y
+CONFIG_DRM_PANFROST=y
+CONFIG_CMA=y
+CONFIG_DMA_CMA=y

recipes-kernel/linux/linux-mainline_4.19.46.bb

@@ -1,32 +0,0 @@
-SECTION = "kernel"
-DESCRIPTION = "Mainline Linux kernel"
-LICENSE = "GPLv2"
-LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
-COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
-
-inherit kernel
-
-require linux.inc
-
-# Since we're not using git, this doesn't make a difference, but we need to fill
-# in something or kernel-yocto.bbclass will fail.
-KBRANCH ?= "master"
-
-# Pull in the devicetree files into the rootfs
-RDEPENDS_${KERNEL_PACKAGE_NAME}-base += "kernel-devicetree"
-
-KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
-
-S = "${WORKDIR}/linux-${PV}"
-
-SRC_URI[md5sum] = "5e171996b176df3db2150bcb47d042a7"
-SRC_URI[sha256sum] = "097b52fe8a872259f4a3dba571b2eaf7b9863d9cde5399c6b316dec0ef57e67a"
-
-SRC_URI = "https://www.kernel.org/pub/linux/kernel/v4.x/linux-${PV}.tar.xz \
-        file://0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch \
-        file://defconfig \
-        "
-
-SRC_URI_append_orange-pi-zero += "\
-	file://0001-add-wifi-support.patch \
-	"

recipes-kernel/linux/linux-mainline_5.0.19.bb

@@ -1,32 +0,0 @@
-SECTION = "kernel"
-DESCRIPTION = "Mainline Linux kernel"
-LICENSE = "GPLv2"
-LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
-COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
-
-inherit kernel
-
-require linux.inc
-
-# Since we're not using git, this doesn't make a difference, but we need to fill
-# in something or kernel-yocto.bbclass will fail.
-KBRANCH ?= "master"
-
-# Pull in the devicetree files into the rootfs
-RDEPENDS_${KERNEL_PACKAGE_NAME}-base += "kernel-devicetree"
-
-KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
-
-S = "${WORKDIR}/linux-${PV}"
-
-SRC_URI[md5sum] = "52fb710109527b042278359526588da8"
-SRC_URI[sha256sum] = "0bf0d5c64dafc1184e9aafd2f3ebb77aa88ddee881a7766436258feaa214d9ec"
-
-SRC_URI = "https://www.kernel.org/pub/linux/kernel/v5.x/linux-${PV}.tar.xz \
-        file://0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch \
-        file://defconfig \
-        "
-
-SRC_URI_append_orange-pi-zero += "\
-	file://0001-add-wifi-support.patch \
-	"

recipes-kernel/linux/linux-mainline_5.10.2.bb

@@ -0,0 +1,8 @@
+require linux-mainline.inc
+
+DESCRIPTION = "Mainline Longterm Linux kernel"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
+
+SRC_URI[md5sum] = "0751179f60de73eb2cd93f161fa52fcf"
+SRC_URI[sha256sum] = "3b84e13abae26af17ebccc4d7212f5843a991127a73a320848d5c6942ef781a2"

recipes-kernel/linux/linux-mainline_5.15.35.bb

@@ -0,0 +1,23 @@
+require linux-mainline.inc
+
+DESCRIPTION = "Mainline Longterm Linux kernel"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
+
+SRC_URI[sha256sum] = "0a1a5ae2f30eb2b38215e59077f045aabd7f4e2857a881482f02ea48186105d8"
+
+
+# # orangepi-zero-2 support added only for 5.15 kernel so add it to this recipe not to inc file
+SRC_URI:append:orange-pi-zero2  = " \
+        file://defconfig \
+        file://0001-dts-add-h616-and-orangepizero2.patch \
+        file://0002-drv-add-dump_reg-and-sunxi-sysinfo-drivers.patch \
+        file://0003-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch \
+        file://0004-dts-add-sunxi-info-device-tree-node.patch \
+        file://0005-dts-add-addr_mgt-device-tree-node.patch \
+        file://0006-drv-modem-power-Power-manager-for-modems.patch \
+        file://0007-drv-add-sunxi-addr-driver-used-to-fix-uwe5622-bluetooth-.patch \
+        file://0008-drv-wireless-add-uwe5622-driver.patch \
+        file://0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch \
+        file://0010-drv-fix-incldue-path-for-unisocwcn.patch \
+"

recipes-kernel/linux/linux-mainline_5.2-rc2.bb

@@ -1,35 +0,0 @@
-SECTION = "kernel"
-DESCRIPTION = "Mainline Linux kernel"
-LICENSE = "GPLv2"
-LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
-COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
-
-inherit kernel
-
-require linux.inc
-
-# Since we're not using git, this doesn't make a difference, but we need to fill
-# in something or kernel-yocto.bbclass will fail.
-KBRANCH ?= "master"
-
-# Pull in the devicetree files into the rootfs
-RDEPENDS_${KERNEL_PACKAGE_NAME}-base += "kernel-devicetree"
-
-KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
-
-S = "${WORKDIR}/linux-${PV}"
-
-SRC_URI[md5sum] = "bf80c4ab5f475a2c0846340fb9eb6449"
-SRC_URI[sha256sum] = "8ec8258e75ebdcd8197328b8571435c246f55d7da7f6ed65e96aa8d4bff9a639"
-
-SRC_URI = "https://git.kernel.org/torvalds/t/linux-${PV}.tar.gz \
-        file://0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch \
-        file://defconfig \
-        "
-
-SRC_URI_append_orange-pi-zero += "\
-	file://0001-add-wifi-support.patch \
-	"
-
-FILES_${KERNEL_PACKAGE_NAME}-base_append = " ${nonarch_base_libdir}/modules/${KERNEL_VERSION}/modules.builtin.modinfo"
-

recipes-kernel/linux/linux-mainline_5.4.69.bb

@@ -0,0 +1,8 @@
+require linux-mainline.inc
+
+DESCRIPTION = "Mainline Longterm Linux kernel"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
+
+SRC_URI[md5sum] = "98c8187b801f006ba203db0669e307a5"
+SRC_URI[sha256sum] = "a8b31d716b397303a183e42ad525ff2871024a43e3ea530d0fdf73b7f9d27da7"