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	It is useful to get information about BL type and entry address that's why add some debug messages. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fb023b618a009009a0b564c24223cadc10ced5b3.1652871741.git.michal.simek@amd.com
		
			
				
	
	
		
			107 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			107 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright 2016 - 2017 Xilinx, Inc.
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|  *
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|  * Michal Simek <michal.simek@xilinx.com>
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| #include <asm/arch/hardware.h>
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| #include <asm/arch/sys_proto.h>
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| 
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| /*
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|  * atfhandoffparams
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|  * Parameter	bitfield	encoding
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|  * -----------------------------------------------------------------------------
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|  * Exec State	0	0 -> Aarch64, 1-> Aarch32
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|  * endianness	1	0 -> LE, 1 -> BE
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|  * secure (TZ)	2	0 -> Non secure, 1 -> secure
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|  * EL		3:4	00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3
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|  * CPU#		5:6	00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3
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|  */
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| 
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| #define FSBL_FLAGS_ESTATE_SHIFT		0
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| #define FSBL_FLAGS_ESTATE_MASK		(1 << FSBL_FLAGS_ESTATE_SHIFT)
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| #define FSBL_FLAGS_ESTATE_A64		0
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| #define FSBL_FLAGS_ESTATE_A32		1
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| 
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| #define FSBL_FLAGS_ENDIAN_SHIFT		1
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| #define FSBL_FLAGS_ENDIAN_MASK		(1 << FSBL_FLAGS_ENDIAN_SHIFT)
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| #define FSBL_FLAGS_ENDIAN_LE		0
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| #define FSBL_FLAGS_ENDIAN_BE		1
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| 
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| #define FSBL_FLAGS_TZ_SHIFT		2
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| #define FSBL_FLAGS_TZ_MASK		(1 << FSBL_FLAGS_TZ_SHIFT)
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| #define FSBL_FLAGS_NON_SECURE		0
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| #define FSBL_FLAGS_SECURE		1
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| 
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| #define FSBL_FLAGS_EL_SHIFT		3
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| #define FSBL_FLAGS_EL_MASK		(3 << FSBL_FLAGS_EL_SHIFT)
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| #define FSBL_FLAGS_EL0			0
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| #define FSBL_FLAGS_EL1			1
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| #define FSBL_FLAGS_EL2			2
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| #define FSBL_FLAGS_EL3			3
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| 
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| #define FSBL_FLAGS_CPU_SHIFT		5
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| #define FSBL_FLAGS_CPU_MASK		(3 << FSBL_FLAGS_CPU_SHIFT)
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| #define FSBL_FLAGS_A53_0		0
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| #define FSBL_FLAGS_A53_1		1
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| #define FSBL_FLAGS_A53_2		2
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| #define FSBL_FLAGS_A53_3		3
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| 
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| #define FSBL_MAX_PARTITIONS		8
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| 
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| /* Structure corresponding to each partition entry */
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| struct xfsbl_partition {
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| 	uint64_t entry_point;
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| 	uint64_t flags;
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| };
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| 
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| /* Structure for handoff parameters to ARM Trusted Firmware (ATF) */
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| struct xfsbl_atf_handoff_params {
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| 	uint8_t magic[4];
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| 	uint32_t num_entries;
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| 	struct xfsbl_partition partition[FSBL_MAX_PARTITIONS];
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| };
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| 
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| #ifdef CONFIG_SPL_ATF
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| struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry,
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| 					     uintptr_t bl33_entry,
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| 					     uintptr_t fdt_addr)
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| {
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| 	struct xfsbl_atf_handoff_params *atfhandoffparams;
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| 	u32 index = 0;
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| 
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| 	atfhandoffparams = (void *)CONFIG_SPL_TEXT_BASE;
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| 	atfhandoffparams->magic[0] = 'X';
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| 	atfhandoffparams->magic[1] = 'L';
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| 	atfhandoffparams->magic[2] = 'N';
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| 	atfhandoffparams->magic[3] = 'X';
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| 
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| 	debug("Creating handoff:\n");
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| 
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| 	if (bl32_entry) {
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| 		debug(" to BL32 at 0x%x EL-1, Secure\n", (u32)bl32_entry);
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| 		atfhandoffparams->partition[index].entry_point = bl32_entry;
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| 		atfhandoffparams->partition[index].flags = FSBL_FLAGS_EL1 << FSBL_FLAGS_EL_SHIFT |
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| 							   FSBL_FLAGS_SECURE << FSBL_FLAGS_TZ_SHIFT;
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| 		index++;
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| 	}
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| 
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| 	if (bl33_entry) {
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| 		debug(" to BL33 at 0x%x EL-2\n", (u32)bl33_entry);
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| 		atfhandoffparams->partition[index].entry_point = bl33_entry;
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| 		atfhandoffparams->partition[index].flags = FSBL_FLAGS_EL2 <<
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| 							   FSBL_FLAGS_EL_SHIFT;
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| 		index++;
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| 	}
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| 
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| 	atfhandoffparams->num_entries = index;
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| 
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| 	writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6);
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| 
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| 	return NULL;
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| }
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| #endif
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