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The supervisor binary interface (SBI) provides the necessary functions to implement the platform IPI functions riscv_send_ipi() and riscv_clear_ipi(). Use it to implement them. This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs running in supervisor mode. Support for machine mode is already available for CPUs that include the SiFive CLINT. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
26 lines
341 B
C
26 lines
341 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Fraunhofer AISEC,
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* Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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*/
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#include <common.h>
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#include <asm/sbi.h>
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int riscv_send_ipi(int hart)
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{
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ulong mask;
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mask = 1UL << hart;
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sbi_send_ipi(&mask);
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return 0;
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}
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int riscv_clear_ipi(int hart)
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{
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sbi_clear_ipi();
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return 0;
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}
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