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https://xff.cz/git/u-boot/
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438 lines
10 KiB
C
438 lines
10 KiB
C
/*
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* (C) Copyright 2005
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* Thomas.Lange@corelatus.se
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/au1x00.h>
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#include <asm/addrspace.h>
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#include <asm/mipsregs.h>
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#include <asm/io.h>
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#include <watchdog.h>
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#include "ee_access.h"
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static int wdi_status = 0;
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#define SDRAM_SIZE ((64*1024*1024)-(12*4096))
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#define SERIAL_LOG_BUFFER CKSEG1ADDR(SDRAM_SIZE + (8*4096))
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void inline log_serial_char(char c){
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char *serial_log_buffer = (char*)SERIAL_LOG_BUFFER;
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int serial_log_offset;
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u32 *serial_log_offsetp = (u32*)SERIAL_LOG_BUFFER;
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serial_log_offset = *serial_log_offsetp;
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*(serial_log_buffer + serial_log_offset) = c;
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serial_log_offset++;
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if(serial_log_offset >= 4096){
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serial_log_offset = 4;
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}
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*serial_log_offsetp = serial_log_offset;
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}
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void init_log_serial(void){
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char *serial_log_buffer = (char*)SERIAL_LOG_BUFFER;
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u32 *serial_log_offsetp = (u32*)SERIAL_LOG_BUFFER;
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/* Copy buffer from last run */
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memcpy(serial_log_buffer + 4096,
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serial_log_buffer,
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4096);
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memset(serial_log_buffer, 0, 4096);
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*serial_log_offsetp = 4;
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}
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void hw_watchdog_reset(void){
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volatile u32 *sys_outputset = (volatile u32*)SYS_OUTPUTSET;
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volatile u32 *sys_outputclear = (volatile u32*)SYS_OUTPUTCLR;
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if(wdi_status){
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*sys_outputset = GPIO_CPU_LED|GPIO_WDI;
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wdi_status = 0;
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}
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else{
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*sys_outputclear = GPIO_CPU_LED|GPIO_WDI;
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wdi_status = 1;
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}
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}
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phys_size_t initdram(int board_type)
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{
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/* Sdram is setup by assembler code */
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/* If memory could be changed, we should return the true value here */
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WATCHDOG_RESET();
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return (SDRAM_SIZE);
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}
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/* In cpu/mips/cpu.c */
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void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
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void set_ledcard(u32 value){
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/* Clock 24 bits to led card */
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int i;
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volatile u32 *sys_outputset = (volatile u32*)SYS_OUTPUTSET;
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volatile u32 *sys_outputclr = (volatile u32*)SYS_OUTPUTCLR;
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/* Start with known values */
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*sys_outputclr = GPIO_LEDCLK|GPIO_LEDD;
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for(i=0;i<24;i++){
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if(value&0x00800000){
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*sys_outputset = GPIO_LEDD;
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}
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else{
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*sys_outputclr = GPIO_LEDD;
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}
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udelay(1);
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*sys_outputset = GPIO_LEDCLK;
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udelay(1);
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*sys_outputclr = GPIO_LEDCLK;
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udelay(1);
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value<<=1;
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}
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/* Data is enable output */
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*sys_outputset = GPIO_LEDD;
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}
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int checkboard (void)
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{
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volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
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volatile u32 *sys_outputset = (volatile u32*)SYS_OUTPUTSET;
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volatile u32 *sys_outputclr = (volatile u32*)SYS_OUTPUTCLR;
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u32 proc_id;
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WATCHDOG_RESET();
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*sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
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proc_id = read_c0_prid();
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switch (proc_id >> 24) {
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case 0:
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puts ("Board: GTH2\n");
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printf ("CPU: Au1000 500 MHz, id: 0x%02x, rev: 0x%02x\n",
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(proc_id >> 8) & 0xFF, proc_id & 0xFF);
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break;
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default:
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printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
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}
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set_io_port_base(0);
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#ifdef CONFIG_IDE_PCMCIA
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/* PCMCIA is on a 36 bit physical address.
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We need to map it into a 32 bit addresses */
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write_one_tlb(20, /* index */
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0x01ffe000, /* Pagemask, 16 MB pages */
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CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
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0x3C000017, /* Lo0 */
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0x3C200017); /* Lo1 */
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write_one_tlb(21, /* index */
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0x01ffe000, /* Pagemask, 16 MB pages */
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CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
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0x3D000017, /* Lo0 */
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0x3D200017); /* Lo1 */
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write_one_tlb(22, /* index */
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0x01ffe000, /* Pagemask, 16 MB pages */
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CONFIG_SYS_PCMCIA_MEM_ADDR, /* Hi */
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0x3E000017, /* Lo0 */
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0x3E200017); /* Lo1 */
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#endif /* CONFIG_IDE_PCMCIA */
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/* Wait for GPIO ports to become stable */
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udelay(5000); /* FIXME */
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/* Release reset of ethernet PHY chips */
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/* Always do this, because linux does not know about it */
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*sys_outputset = GPIO_ERESET;
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/* Kill FPGA:s */
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*sys_outputclr = GPIO_CACONFIG|GPIO_DPACONFIG;
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udelay(2);
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*sys_outputset = GPIO_CACONFIG|GPIO_DPACONFIG;
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/* Turn front led yellow */
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set_ledcard(0x00100000);
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return 0;
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}
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#define POWER_OFFSET 0xF0000
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#define SW_WATCHDOG_REASON 13
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#define BOOTDATA_OFFSET 0xF8000
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#define MAX_ATTEMPTS 5
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#define FAILSAFE_BOOT 1
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#define SYSTEM_BOOT 2
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#define SYSTEM2_BOOT 3
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#define WRITE_FLASH16(a, d) \
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do \
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{ \
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*((volatile u16 *) (a)) = (d);\
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} while(0)
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static void write_bootdata (volatile u16 * addr, u8 System, u8 Count)
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{
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u16 data;
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volatile u16 *flash = (u16 *) (CONFIG_SYS_FLASH_BASE);
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switch(System){
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case FAILSAFE_BOOT:
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printf ("Setting failsafe boot in flash\n");
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break;
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case SYSTEM_BOOT:
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printf ("Setting system boot in flash\n");
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break;
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case SYSTEM2_BOOT:
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printf ("Setting system2 boot in flash\n");
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break;
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default:
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printf ("Invalid system data %u, setting failsafe\n", System);
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System = FAILSAFE_BOOT;
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}
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if ((Count < 1) | (Count > MAX_ATTEMPTS)) {
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printf ("Invalid boot count %u, setting 1\n", Count);
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Count = 1;
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}
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printf ("Boot attempt %d\n", Count);
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data = (System << 8) | Count;
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/* AMD 16 bit */
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WRITE_FLASH16 (&flash[0x555], 0xAAAA);
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WRITE_FLASH16 (&flash[0x2AA], 0x5555);
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WRITE_FLASH16 (&flash[0x555], 0xA0A0);
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WRITE_FLASH16 (addr, data);
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}
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static int random_system(void){
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/* EEPROM read failed. Just try to choose one
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system release and hope it works */
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/* FIXME */
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return(SYSTEM_BOOT);
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}
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static int switch_system(int old_system){
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u8 Rx[10];
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u8 Tx[5];
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int valid_release;
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if(old_system==FAILSAFE_BOOT){
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/* Find out which system release to use */
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/* Copy from nvram to scratchpad */
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Tx[0] = RECALL_MEMORY;
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Tx[1] = 7; /* Page */
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if (ee_do_cpu_command (Tx, 2, NULL, 0, 1)) {
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printf ("EE user page 7 recall failed\n");
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return (random_system());
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}
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Tx[0] = READ_SCRATCHPAD;
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if (ee_do_cpu_command (Tx, 2, Rx, 9, 1)) {
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printf ("EE user page 7 read failed\n");
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return (random_system());
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}
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/* Crc in 9:th byte */
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if (!ee_crc_ok (Rx, 8, *(Rx + 8))) {
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printf ("EE read failed, page 7. CRC error\n");
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return (random_system());
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}
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valid_release = Rx[7];
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if((valid_release==0xFF)|
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((valid_release&1) == 0)){
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return(SYSTEM_BOOT);
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}
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else{
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return(SYSTEM2_BOOT);
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}
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}
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else{
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return(FAILSAFE_BOOT);
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}
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}
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static void check_boot_tries (void)
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{
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/* Count the number of boot attemps
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switch system if too many */
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int i;
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volatile u16 *addr;
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volatile u16 data;
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u8 system = FAILSAFE_BOOT;
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u8 count;
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addr = (u16 *) (CONFIG_SYS_FLASH_BASE + BOOTDATA_OFFSET);
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if (*addr == 0xFFFF) {
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printf ("*** No bootdata exists. ***\n");
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write_bootdata (addr, FAILSAFE_BOOT, 1);
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} else {
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/* Search for latest written bootdata */
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i = 0;
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while ((*(addr + 1) != 0xFFFF) & (i < 8000)) {
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addr++;
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i++;
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}
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if (i >= 8000) {
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/* Whoa, dont write any more */
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printf ("*** No bootdata found. Not updating flash***\n");
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} else {
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/* See how many times we have tried to boot real system */
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data = *addr;
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system = data >> 8;
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count = data & 0xFF;
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if ((system != SYSTEM_BOOT) &
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(system != SYSTEM2_BOOT) &
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(system != FAILSAFE_BOOT)) {
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printf ("*** Wrong system %d\n", system);
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system = FAILSAFE_BOOT;
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count = 1;
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} else {
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switch (count) {
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case 0:
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case 1:
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case 2:
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case 3:
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case 4:
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/* Try same system again if needed */
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count++;
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break;
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case 5:
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/* Switch system and reset tries */
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count = 1;
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system = switch_system(system);
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printf ("***Too many boot attempts, switching system***\n");
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break;
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default:
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/* Switch system, start over and hope it works */
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printf ("***Unexpected data on addr 0x%x, %u***\n",
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(u32) addr, data);
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count = 1;
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system = switch_system(system);
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}
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}
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write_bootdata (addr + 1, system, count);
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}
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}
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switch(system){
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case FAILSAFE_BOOT:
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printf ("Booting failsafe system\n");
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setenv ("bootargs", "panic=1 root=/dev/hda7");
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setenv ("bootcmd", "ide reset;disk 0x81000000 0:5;run addmisc;bootm");
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break;
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case SYSTEM_BOOT:
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printf ("Using normal system\n");
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setenv ("bootargs", "panic=1 root=/dev/hda4");
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setenv ("bootcmd", "ide reset;disk 0x81000000 0:2;run addmisc;bootm");
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break;
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case SYSTEM2_BOOT:
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printf ("Using normal system2\n");
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setenv ("bootargs", "panic=1 root=/dev/hda9");
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setenv ("bootcmd", "ide reset;disk 0x81000000 0:8;run addmisc;bootm");
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break;
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default:
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printf ("Invalid system %d\n", system);
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printf ("Hanging\n");
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while(1);
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}
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}
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int misc_init_r(void){
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u8 Rx[80];
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u8 Tx[5];
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int page;
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int read = 0;
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WATCHDOG_RESET();
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if (ee_init_cpu_data ()) {
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printf ("EEPROM init failed\n");
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return (0);
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}
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/* Check which release to boot */
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check_boot_tries ();
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/* Read the pages where ethernet address is stored */
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for (page = EE_USER_PAGE_0; page <= EE_USER_PAGE_0 + 2; page++) {
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/* Copy from nvram to scratchpad */
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Tx[0] = RECALL_MEMORY;
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Tx[1] = page;
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if (ee_do_cpu_command (Tx, 2, NULL, 0, 1)) {
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printf ("EE user page %d recall failed\n", page);
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return (0);
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}
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Tx[0] = READ_SCRATCHPAD;
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if (ee_do_cpu_command (Tx, 2, Rx + read, 9, 1)) {
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printf ("EE user page %d read failed\n", page);
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return (0);
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}
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/* Crc in 9:th byte */
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if (!ee_crc_ok (Rx + read, 8, *(Rx + read + 8))) {
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printf ("EE read failed, page %d. CRC error\n", page);
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return (0);
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}
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read += 8;
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}
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/* Add eos after eth addr */
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Rx[17] = 0;
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printf ("Ethernet addr read from eeprom: %s\n\n", Rx);
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if ((Rx[2] != ':') |
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(Rx[5] != ':') |
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(Rx[8] != ':') | (Rx[11] != ':') | (Rx[14] != ':')) {
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printf ("*** ethernet addr invalid, using default ***\n");
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} else {
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setenv ("ethaddr", (char *)Rx);
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}
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return (0);
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}
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