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	Newer Intel SoCs have different ways of setting up cache-as-ram (CAR). Add support for these along with suitable configuration options. To make the code cleaner, adjust a few definitions in processor.h so that they can be used from assembler. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
		
			
				
	
	
	
		
			9.9 KiB
		
	
	
	
	
	
	
	
			
		
		
	
	
			9.9 KiB