Luis Araneda 3907eef1a3 spl: fit: display a message when an FPGA image is loaded ...

A message should be displayed if an image is loaded
to an FPGA, because the hardware might have changed,
and the user should be informed

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

2018-07-19 10:49:56 +02:00

14 KiB

Raw Blame History

View Raw