mirror of
https://xff.cz/git/u-boot/
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
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*/
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#ifndef _SYSTEM_MANAGER_GEN5_H_
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#define _SYSTEM_MANAGER_GEN5_H_
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#ifndef __ASSEMBLY__
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void sysmgr_pinmux_init(void);
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void sysmgr_config_warmrstcfgio(int enable);
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void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len);
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struct socfpga_system_manager {
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/* System Manager Module */
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u32 siliconid1; /* 0x00 */
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u32 siliconid2;
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u32 _pad_0x8_0xf[2];
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u32 wddbg; /* 0x10 */
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u32 bootinfo;
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u32 hpsinfo;
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u32 parityinj;
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/* FPGA Interface Group */
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u32 fpgaintfgrp_gbl; /* 0x20 */
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u32 fpgaintfgrp_indiv;
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u32 fpgaintfgrp_module;
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u32 _pad_0x2c_0x2f;
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/* Scan Manager Group */
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u32 scanmgrgrp_ctrl; /* 0x30 */
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u32 _pad_0x34_0x3f[3];
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/* Freeze Control Group */
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u32 frzctrl_vioctrl; /* 0x40 */
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u32 _pad_0x44_0x4f[3];
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u32 frzctrl_hioctrl; /* 0x50 */
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u32 frzctrl_src;
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u32 frzctrl_hwctrl;
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u32 _pad_0x5c_0x5f;
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/* EMAC Group */
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u32 emacgrp_ctrl; /* 0x60 */
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u32 emacgrp_l3master;
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u32 _pad_0x68_0x6f[2];
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/* DMA Controller Group */
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u32 dmagrp_ctrl; /* 0x70 */
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u32 dmagrp_persecurity;
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u32 _pad_0x78_0x7f[2];
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/* Preloader (initial software) Group */
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u32 iswgrp_handoff[8]; /* 0x80 */
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u32 _pad_0xa0_0xbf[8]; /* 0xa0 */
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/* Boot ROM Code Register Group */
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u32 romcodegrp_ctrl; /* 0xc0 */
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u32 romcodegrp_cpu1startaddr;
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u32 romcodegrp_initswstate;
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u32 romcodegrp_initswlastld;
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u32 romcodegrp_bootromswstate; /* 0xd0 */
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u32 __pad_0xd4_0xdf[3];
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/* Warm Boot from On-Chip RAM Group */
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u32 romcodegrp_warmramgrp_enable; /* 0xe0 */
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u32 romcodegrp_warmramgrp_datastart;
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u32 romcodegrp_warmramgrp_length;
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u32 romcodegrp_warmramgrp_execution;
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u32 romcodegrp_warmramgrp_crc; /* 0xf0 */
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u32 __pad_0xf4_0xff[3];
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/* Boot ROM Hardware Register Group */
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u32 romhwgrp_ctrl; /* 0x100 */
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u32 _pad_0x104_0x107;
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/* SDMMC Controller Group */
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u32 sdmmcgrp_ctrl;
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u32 sdmmcgrp_l3master;
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/* NAND Flash Controller Register Group */
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u32 nandgrp_bootstrap; /* 0x110 */
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u32 nandgrp_l3master;
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/* USB Controller Group */
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u32 usbgrp_l3master;
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u32 _pad_0x11c_0x13f[9];
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/* ECC Management Register Group */
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u32 eccgrp_l2; /* 0x140 */
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u32 eccgrp_ocram;
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u32 eccgrp_usb0;
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u32 eccgrp_usb1;
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u32 eccgrp_emac0; /* 0x150 */
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u32 eccgrp_emac1;
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u32 eccgrp_dma;
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u32 eccgrp_can0;
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u32 eccgrp_can1; /* 0x160 */
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u32 eccgrp_nand;
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u32 eccgrp_qspi;
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u32 eccgrp_sdmmc;
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u32 _pad_0x170_0x3ff[164];
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/* Pin Mux Control Group */
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u32 emacio[20]; /* 0x400 */
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u32 flashio[12]; /* 0x450 */
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u32 generalio[28]; /* 0x480 */
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u32 _pad_0x4f0_0x4ff[4];
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u32 mixed1io[22]; /* 0x500 */
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u32 mixed2io[8]; /* 0x558 */
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u32 gplinmux[23]; /* 0x578 */
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u32 gplmux[71]; /* 0x5d4 */
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u32 nandusefpga; /* 0x6f0 */
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u32 _pad_0x6f4;
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u32 rgmii1usefpga; /* 0x6f8 */
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u32 _pad_0x6fc_0x700[2];
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u32 i2c0usefpga; /* 0x704 */
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u32 sdmmcusefpga; /* 0x708 */
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u32 _pad_0x70c_0x710[2];
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u32 rgmii0usefpga; /* 0x714 */
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u32 _pad_0x718_0x720[3];
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u32 i2c3usefpga; /* 0x724 */
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u32 i2c2usefpga; /* 0x728 */
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u32 i2c1usefpga; /* 0x72c */
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u32 spim1usefpga; /* 0x730 */
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u32 _pad_0x734;
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u32 spim0usefpga; /* 0x738 */
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};
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#endif
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#define SYSMGR_SDMMC_SMPLSEL_SHIFT 3
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#define SYSMGR_BOOTINFO_BSEL_SHIFT 0
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#endif /* _SYSTEM_MANAGER_GEN5_H_ */
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