Tom Rini 55b3ba4c2b spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig ...

This is a little tricky since SoCFPGA has code to determine this as
runtime.  Introduce a guard variable for platforms to select if they
have a static value to use.  Then for ARCH_SOCFPGA, call
cm_get_qspi_controller_clk_hz() and otherwise continue the previous
behavior.

Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

2022-04-08 10:46:22 -04:00

..

include/mach

arm: socfpga: arria10: Enable double peripheral RBF configuration

2021-12-17 12:58:01 +08:00

board.c

arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function

2021-08-24 14:29:50 +08:00

clock_manager_agilex.c

arm: socfpga: Move Stratix10 and Agilex clock manager common code

2021-04-08 17:29:12 +08:00

clock_manager_arria10.c

…

clock_manager_gen5.c

…

clock_manager_n5x.c

arm: socfpga: Add clock manager for Intel N5X device

2021-08-25 13:32:50 +08:00

clock_manager_s10.c

arm: socfpga: Move Stratix10 and Agilex clock manager common code

2021-04-08 17:29:12 +08:00

clock_manager.c

arm: socfpga: Changed to store QSPI reference clock in kHz

2021-04-08 17:29:12 +08:00

firewall.c

…

fpga_manager.c

…

freeze_controller.c

…

Kconfig

keymile: Move sourcing of common Kconfig

2022-04-01 10:28:46 -04:00

lowlevel_init_soc64.S

armv8: Fix and simplify branch_if_master/branch_if_slave

2022-03-02 13:59:29 -05:00

mailbox_s10.c

arm: socfpga: Changed to store QSPI reference clock in kHz

2021-04-08 17:29:12 +08:00

Makefile

arm: socfpga: Enable Intel N5X device build

2021-08-25 15:26:38 +08:00

misc_arria10.c

arm: socfpga: arria10: Enable double peripheral RBF configuration

2021-12-17 12:58:01 +08:00

misc_gen5.c

common: Drop asm/global_data.h from common header

2021-02-02 15:33:42 -05:00

misc_soc64.c

spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig

2022-04-08 10:46:22 -04:00

misc.c

arm: socfpga: Get clock manager base address for Intel N5X device

2021-08-25 12:54:37 +08:00

mmu-arm64_s10.c

common: Drop asm/global_data.h from common header

2021-02-02 15:33:42 -05:00

pinmux_arria10.c

…

qts-filter-a10.sh

…

qts-filter.sh

…

reset_manager_arria10.c

common: Drop asm/global_data.h from common header

2021-02-02 15:33:42 -05:00

reset_manager_gen5.c

…

reset_manager_s10.c

common: Drop asm/global_data.h from common header

2021-02-02 15:33:42 -05:00

scan_manager.c

…

secure_reg_helper.c

arm: socfpga: Add secure register access helper functions for SoC 64bits

2021-01-15 17:48:36 +08:00

secure_vab.c

arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

2021-03-08 10:59:10 +08:00

smc_api.c

arm: socfpga: smc: Add function to get usercode

2021-04-08 17:29:13 +08:00

spl_a10.c

spl: mmc: extend spl_mmc_boot_mode() to take mmc argument

2022-04-04 23:24:17 +01:00

spl_agilex.c

arm: socfpga: Move Stratix10 and Agilex SPL common code

2021-04-08 17:29:11 +08:00

spl_gen5.c

spl: mmc: extend spl_mmc_boot_mode() to take mmc argument

2022-04-04 23:24:17 +01:00

spl_n5x.c

arm: socfpga: Add SPL for Intel N5X device

2021-08-25 14:43:29 +08:00

spl_s10.c

arm: socfpga: Move Stratix10 and Agilex SPL common code

2021-04-08 17:29:11 +08:00

spl_soc64.c

mmc: Rename MMC_SUPPORT to MMC

2021-09-04 11:42:41 -04:00

system_manager_gen5.c

…

system_manager_soc64.c

arm: socfpga: Add handoff data support for Intel N5X device

2021-08-24 17:13:35 +08:00

timer_s10.c

…

timer.c

…

vab.c

global: Convert simple_strtoul() with hex to hextoul()

2021-08-02 13:32:14 -04:00

wrap_handoff_soc64.c

arm: socfpga: Add handoff data support for Intel N5X device

2021-08-24 17:13:35 +08:00

wrap_iocsr_config.c

…

wrap_pinmux_config.c

…

wrap_pll_config_soc64.c

arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c

2021-04-08 17:29:12 +08:00

wrap_pll_config.c

…

wrap_sdram_config.c

…