u-boot-megous

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Daniel Schwierzeck 5ef337a037 MIPS: cache: make index base address configurable

The index base address used for the cache initialisation is currently
hard-coded to CKSEG0. Make this value configurable if a MIPS system
needs to have a different address (e.g. in SRAM or ScratchPad RAM).

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

2018-09-22 21:02:03 +02:00

cpu

MIPS: start.S: make boot config at offset 0x10 configurable

2018-09-22 20:59:22 +02:00

dts

dt: bcm6838: add pinctrl

2018-09-22 20:49:59 +02:00

include/asm

arch: types.h: factor out fixed width typedefs to int-ll64.h

2018-09-10 20:48:16 -04:00

lib

MIPS: cache: make index base address configurable