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	The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
		
			
				
	
	
		
			48 lines
		
	
	
		
			977 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			48 lines
		
	
	
		
			977 B
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright (C) 2016 Socionext Inc.
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|  */
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| 
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| #include <common.h>
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| #include <spl.h>
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| #include <linux/bitops.h>
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| #include <linux/io.h>
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| 
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| #include "../init.h"
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| #include "../sc64-regs.h"
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| #include "../sg-regs.h"
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| 
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| #define SDCTRL_EMMC_HW_RESET	0x59810280
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| 
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| void uniphier_ld11_clk_init(void)
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| {
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| 	/* if booted from a device other than USB, without stand-by MPU */
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| 	if ((readl(SG_PINMON0) & BIT(27)) &&
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| 	    uniphier_boot_device_raw() != BOOT_DEVICE_USB) {
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| 		writel(1, SG_ETPHYPSHUT);
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| 		writel(1, SG_ETPHYCNT);
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| 
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| 		udelay(1); /* wait for regulator level 1.1V -> 2.5V */
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| 
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| 		writel(3, SG_ETPHYCNT);
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| 		writel(3, SG_ETPHYPSHUT);
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| 		writel(7, SG_ETPHYCNT);
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| 	}
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| 
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| 	/* TODO: use "mmc-pwrseq-emmc" */
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| 	writel(1, SDCTRL_EMMC_HW_RESET);
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| 
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| #ifdef CONFIG_USB_EHCI_HCD
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| 	{
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| 		int ch;
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| 
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| 		for (ch = 0; ch < 3; ch++) {
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| 			void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
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| 
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| 			writel(0x82280600, phyctrl + 8 * ch);
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| 			writel(0x00000106, phyctrl + 8 * ch + 4);
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| 		}
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| 	}
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| #endif
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| }
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