Touchapnel devices are useful in u-boot for implementation of boot
menu user interfaces on tablets and other touch based devices.
This uclass implements start, stop and get_touches interface methods.
Signed-off-by: Ondrej Jirman <megous@megous.com>
The commit 3b804b370d ("mmc: rockchip_sdhci: Disable DMA mode using a
device tree property") and commit 2cc6cde647 ("mmc: rockchip_sdhci:
Limit number of blocks read in a single command") implemented a
workaround to fix loading a part of TF-A into SRAM from eMMC in SPL.
This has resulted in very slow read performance of FIT from eMMC in SPL
on RK3588.
Change to make use of a bounce buffer to significantly improve the read
performance when malloc_limit is large enough and use PIO mode as fall
back.
Also update the size of align_buffer to use SDHCI_DEFAULT_BOUNDARY_SIZE
instead of a hardcoded 512 * 1024.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://patchwork.ozlabs.org/patch/1895377/
UART pinctrl for serial is typically applied multiple times:
- in external TPL
- in SPL for DEBUG_UART in board_debug_uart_init()
- in SPL using pinctrl from DT
- in pre-reloc phase using pinctrl from DT
- after relocation using pinctrl from DT
Skip including UART pinctrl for the the pre-reloc phase to save time
during boot. On a Radxa ROCK 5B this reduce boot time by ~150 ms.
After this a warning may be shown with LOGLEVEL=5 (or higher), it is
safe to ignore this warning as device probe is successful even when
pinctrl cannot be applied:
ns16550_serial serial@feb50000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
UART pinctrl for serial is typically applied multiple times:
- in external TPL
- in SPL for DEBUG_UART in board_debug_uart_init()
- in SPL using pinctrl from DT
- in pre-reloc phase using pinctrl from DT
- after relocation using pinctrl from DT
Skip including UART pinctrl for the the pre-reloc phase to save time
during boot. On a Radxa ZERO 3W this reduce boot time by ~120 ms.
After this a warning may be shown with LOGLEVEL=5 (or higher), it is
safe to ignore this warning as device probe is successful even when
pinctrl cannot be applied:
ns16550_serial serial@fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
UART pinctrl for serial is typically applied multiple times:
- in external TPL
- in SPL using pinctrl from DT
- in pre-reloc phase using pinctrl from DT
- after relocation using pinctrl from DT
Skip including UART pinctrl for the the pre-reloc phase to save time
during boot. On a Radxa ROCK Pi S this reduce boot time by ~80 ms.
After this a warning may be shown with LOGLEVEL=5 (or higher), it is
safe to ignore this warning as device probe is successful even when
pinctrl cannot be applied:
ns16550_serial serial@ff0a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Initializing a clock driver to read a known static clock rate can take
some time at U-Boot proper pre-reloc phase.
Change to first try and read clock rate from DT to speed up boot time,
fall back to getting the clock rate from clock driver.
This help reduce boot time by around:
- ~35ms on a Radxa ROCK Pi 4 (RK3399)
- ~15ms on a Radxa ZERO 3W (RK3566)
Time that is wasted getting a static rate known at compile time.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Add aliases for gpio controllers to soc u-boot dtsi files that are
missing aliases in soc dtsi files to ensure dev_seq() return the
expected number when a gpio controller is included in SPL.
Also drop the aliases from rk3288-u-boot.dtsi, they are already part of
rk3288.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Add a request() ops that call pinctrl_gpio_request() when the required
gpio-ranges prop has been defined to signal pinctrl driver to use gpio
pinmux.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Use the pinctrl pin offset to get_gpio_mux() to remove the bank num
dependency and instead only use the bank num to assign a bank name.
Most Rockchip SoCs use all 32 pins of each gpio controller, meaning the
pinctrl pin offset typically is aligned to 32.
However, for gpio0 on RK3288 only 24 pins are used meaning the pinctrl
pin offset start at pin 24 for gpio1. Use DIV_ROUND_UP to get the 32 pin
aligned bank num.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Get pinctrl device from gpio-ranges phandle when the property exists,
fallback to get the first pinctrl device.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Implement gpio_request_enable() ops so that the gpio request() ops can
be implemented and a gpio requested pin automatically is pinmuxed for
gpio use, similar to Linux kernel.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Add get_pins_count(), get_pin_name() and get_pin_muxing() ops to support
the pinmux status cmd.
=> pinmux dev pinctrl
dev: pinctrl
=> pinmux status
GPIO0_A0 : gpio
GPIO0_A1 : func-1
GPIO0_A2 : gpio
GPIO0_A3 : gpio
GPIO0_A4 : func-1
GPIO0_A5 : gpio
GPIO0_A6 : gpio
GPIO0_A7 : func-1
GPIO0_B0 : gpio
GPIO0_B1 : func-1
GPIO0_B2 : func-1
GPIO0_B3 : gpio
[...]
The change to use ENOENT for unrouted pins also help hide a "Error -22"
message for unrouted pins using the gpio status -a cmd.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a way to get_gpio_mux() based on the pinctrl pin offset, use -1 as
banknum to use the pinctrl pin offset mode instead of bank pin offset.
This mode will be used by the gpio driver to ensure a pin used by gpio
request() and get_function() ops always refer to the same pinctrl pin.
Also add verify_config() of banknum and index to avoid an out of range
access of the pin_banks array, i.e. with gpio6 on rk3066a.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a pin_to_bank() helper that can locate a pin bank based on the pin
offset, to be used in get_gpio_mux() and gpio_request_enable() ops.
Reset ctrl->nr_pins to 0 so that pin_to_bank() can locate a bank after
the second probe in U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
The alignment hole caused by cmdidx in struct mmc_cmd cause strange
issues together with the peephole2 optimization on Amlogic SoCs.
Following was observed while working on SPL support for Amlogic SoCs.
sd_get_capabilities() normally issue a CMD55 followed by a CMD51.
However, on at least Amlogic S905 (Cortex-A53) and S905X3 (Cortex-A55),
CMD55 was instead followed by CMD8 (and a few reties) in SPL.
Code from the call site:
cmd.cmdidx = SD_CMD_APP_SEND_SCR; // 51
...
data.blocksize = 8;
...
err = mmc_send_cmd_retry(mmc, &cmd, &data, 3);
Running the code with MMC_TRACE enabled shows:
CMD_SEND:55
ARG 0x50480000
MMC_RSP_R1,5,6,7 0x00000920
CMD_SEND:8
ARG 0x00000000
RET -110
Removing the alignment hole by changing cmdidx from ushort to uint or
building with -fno-peephole2 flag seem to resolve this issue.
CMD_SEND:55
ARG 0x50480000
MMC_RSP_R1,5,6,7 0x00000920
CMD_SEND:51
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000920
Same issue was observed building U-Boot with gcc 8 - 13.
Remove this alignment hole by changing cmdidx from ushort to uint.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Remove the rockchip,rk3399-dwc3 compatible from the dwc3-of-simple
driver now that all boards have changed to use the dwc3-generic driver.
Also remove the amlogic,meson-gxl-dwc3 compatible, it is no longer in
use by any device tree in mainline linux or U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
dev_get_driver_ops() may return NULL when the udevice is invalid.
Move the ops check to top of functions to consistently return -ENOSYS
when ops is unimplemented and prevent trying to access uclass plat data,
also add missing NULL checks to suspend ops.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
(cherry picked from commit 4386ab9118)
On some boards a PMIC regulator is flagged with regulator-on-in-suspend
and does not define any suspend or max microvolt, e.g. on Radxa ROCK 3A:
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
This result in suspend_uV having the value -ENODATA after probe.
This negative voltage, -ENODATA, gets missinterpreted and result in an
unexpected voltage being set by autoset.
E.g. on Radxa ROCK 3A the vcc_ddr regulator by default have a normal and
suspend voltage value of 0.5v. However, due to this missinterpretation
the suspend voltage end up beind set to 0.5625v instead.
Fix this by skip calling regulator_set_suspend_value() in autoset and
also protect calling set value ops when input value is -ENODATA.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
(cherry picked from commit f417c14d88)
Until a live tree is used in U-Boot proper after relocation, use of
ofnode_get_parent() will trigger a call to the very expensive
fdt_parent_offset(), as detailed by the function documentation:
NOTE: This function is expensive, as it must scan the device tree
structure from the start to nodeoffset, *twice*.
Re-use the returned value from a single call instead of having to make
multiple calls for same node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 6f5b168661)
Until a live tree is used in U-Boot proper after relocation, use of
ofnode_get_parent() will trigger a call to the very expensive
fdt_parent_offset() as detailed by the function documentation:
NOTE: This function is expensive, as it must scan the device tree
structure from the start to nodeoffset, *twice*.
Re-use the returned value from a single call instead of having to make
multiple calls for same node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 445406afbb)
Use of fdt_parent_offset() is very expensive as detailed by the function
documentation:
NOTE: This function is expensive, as it must scan the device tree
structure from the start to nodeoffset, *twice*.
Re-use the returned value from a single call instead of having to make
multiple calls for same nodeoffset.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit d6330529a5)
bootstage_get_size() returns the total size of the data structure
including associated records.
When copying from gd->bootstage, only the allocation size of gd->bootstage
must be used. Otherwise too much memory is copied.
This bug caused no harm so far because gd->new_bootstage is always
large enough and reading beyond the allocation length of gd->bootstage
caused no problem due to the U-Boot memory layout.
Fix by using the correct size and perform the initial copy directly
in bootstage_relocate() to have the whole relocation process in the
same function.
Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 1779a58c66)
The SSCG is active with MDSEL[12] is not set. Previous commit
99c7e03119 ("clk: renesas: rcar-gen3: Replace SSCG caching
with MDSEL/PE caching") inverted the conditional assignment
of priv->sscg = !(cpg_mode & BIT(12)) during conversion from
(priv->sscg ? 16 : 0) to priv->cpg_mode & BIT(core->offset) ? 16 : 0;
Invert the assignment back to the correct state.
This fixes R8A77980, R8A77990, R8A77995 and R8A774C0.
Fixes: 99c7e03119 ("clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE caching")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The TF-A URL was updated, as a result the name of the
directory changed as part of the new git URL and not
all the referenced directories were updated.
Fixes: 0ec0207fe0 ("Update the ARM trusted firmware git URL")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Before
commit da3447d09f ("android: Fix ramdisk loading for bootimage v3+"),
the ramdisk was loaded from img_data.ramdisk_ptr, ignoring offset
provided via mkbootimg.
commit da3447d09f ("android: Fix ramdisk loading for bootimage v3+")
rightfully fixes this by switching to use img_data.ramdisk_addr instead.
However, it does not copy the ramdisk content to img_data.ramdisk_addr
in case we use boot image v2.
Because of this, we can no longer boot Android on Khadas vim3 board:
[ 3.940361] RAMDISK: Couldn't find valid RAM disk image starting at 0.
Add the missing memcpy() to fix the issue.
Fixes: da3447d09f ("android: Fix ramdisk loading for bootimage v3+")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The primary upstream URL for tf-a has moved, in some cases
things like tags are not always pushed to the old URL so
update the URLs to the primary upstream project URL.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Transfer initiation and completion for the non-zero Endpoints are
handled by cdns3_ep_run_transfer() and cdns3_transfer_completed()
respectively.
Failing to flush the cache associated with the TRB Pool within
cdns3_ep_run_transfer() results in the transfers never being initiated.
Similarly, failing to invalidate the cache associated with the TRB pool
within cdns3_transfer_completed() results in the transfers never being
completed.
Fix this.
Fixes: 7e91f6ccdc ("usb: Add Cadence USB3 host and gadget driver")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Marek Vasut <marex@denx.de>
The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet.
Remove any buck + 1 calculation to be more consistent in usage of the
buck variable across the different RK8xx variants in the driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Wrong POWER_EN reg is used to get and set enabled state for the RK806
buck 4 and 8 regulators, also wrong POWER_SLP_EN0 bit is used for
suspend state for the RK806 buck 1-8 regulators.
Fix this by not adding one to the zero based buck variable.
Fixes: f172575d92 ("power: rk8xx: add support for RK806")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
U-Boot is currently unable to automatically enable regulators which
contain DT property regulator-always-on or regulator-boot-on. There
is an ongoing work to add this functionality to regulator core code,
but until the proper solution lands, add this awful workaround code
to force these regulators on. This is specifically needed to assure
the VIO regulator used to supply ethernet magnetics is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Do not apply bitwise AND to register value and expected value, only
apply bitwise AND to register value and mask, and only then compare
the result with expected value that the function polls for.
Fixes: b49105320a ("stm32mp: psci: Implement PSCI system suspend and DRAM SSR")
Signed-off-by: Marek Vasut <marex@denx.de>
Update the TAMP_SMCR BKP..PROT fields to put first 10 registers
into protection zone 1 and next 5 into zone 2. This fixes use of
boot counter which is often in zone 3 and has to be updated from
Linux, which runs in NS.
Fixes: 73f7fc944c ("ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In lpddr4_start function error returned by lpddr4_enablepiinitiator
may go undetected due to overwrite of return code.
Add support to handle error in above case.
Reported-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Pull request doc-2024-10-rc6
Documentation:
* Correct function descriptions that are not Sphinx conformant.
* Correct incorrect dependency CONFIG_USB_USB_GADGET in the ums command
description.
* Add missing function names.
* Align names used in descriptions with function names.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Sphinx documentation build process cannot handle the interspersed
'private:' and 'public:' comments. Remove them.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
