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Commit Graph

63777 Commits

Author SHA1 Message Date
Ondrej Jirman
2f11a4fa77 video: sunxi: Support LVDS output on A83T
- Enable LVDS pins (PD18-PD27)
- De-assert LVDS interface reset line
- Enable sunxi_lcd platform device for A83T
- Really disable all interrupts
- A83T does have only a simple clock gate for TCON0 clock
  (no need to select source)
- Lifted some analog circuitry setup magic from the Linux driver

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
4ac85c4059 video: sunxi: Don't build HDMI code when HDMI is not enabled
This prevents compile errors for A83T build, that does not support
HDMI yet.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
6f46f5d294 video: pwm_backlight: Fix broken build when DM_REGULATOR is disabled
Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
a8d633a214 sunxi: A83T doesn not have display frontend
This was probably copy pasted in from sun6i header.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
dabe1ab71f sunxi: Add clock support for pll3 and pll_de for A83T SoC
This is needed in order to support DE2 on A83T. PLL3 is for TCON0.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
793cdbcc67 sunxi: Rename pll10 to pll_de to avoid confusion
A83T SoC has PLL_DE at pll9. Change the name to make it less
confusing when we'll add DE2 support for A83T.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
dfd34fe2d6 cmd: Add mydbg command (A83T SoC debugging helpers)
This can be used to dump various registers and do other kinds of
mischief when developing drivers.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
5e6609ba4d cmd: Split tmenu render/input
- so that we can show it quickly and do stuff "in the background"
  before accepting input from the user

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
7e8cb6057e cmd: Add tmenu command for touch menu user interface
Shows a menu of items that can be controlled using touch panel.
This is useful for touch based devices like tablets to select
alternative boot options (multi-boot).

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
d9f6e5f9a3 dts: Add touchscreen device connected to i2c0 on TBS A711 tablet
We don't have DM support for PMIC/GPIO/regulators, so this needs
to be handled via config options and some custom board initialization
code for now.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
db13e278ff input: Add support for edt,edt-ft5x06 touchpanel controller
This is a direct port of the Linux driver from Linux v4.18.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
4394d7fce4 power: axp818: Suport DCDC6 in AXP818 2020-04-13 19:02:04 +02:00
Ondrej Jirman
93fd146d81 power: axp818: Add support for configuring GPIO0 LDO voltage on AXP81x
To enable LDO on GPIO0 and set it to required voltage define
CONFIG_AXP_GPIO_LDO0_VOLT=<mV> in your defconfig. Eg. <mV> can
be 3100 for 3.1V.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
f87361e33d sunxi: Add support for i2c0 pinctrl/clock initialization on Allwinner A83T
To enable I2C0 on A83T add CONFIG_I2C0_ENABLE=y to defconfig and
enable appropriate node in device tree.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
386aa24eb4 cmd: Add 'touch' command to enumerate touchpanel devices
This command can be used to list and access devices with uclass
UCLASS_TOUCHPANEL.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
d2c56bec7f input: Implemented touchpanel uclass for touchpanel devices
Touchapnel devices are useful in u-boot for implementation of boot
menu user interfaces on tablets and other touch based devices.

This uclass implements start, stop and get_touches interface methods.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
168114540f cmd: Add ariscrun command for starting CPUS
CPUS is a power management co-processor on some Allwinner SoCs (H3,
A83T).

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
6e6ae90021 sunxi: Get rid of useless initializations and 500ms boot delay
CONFIG_SATAPWR and CONFIG_MACPWR, when not used are still defined
with value "", this causes useless 500ms delay during boot when
these are not needed.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
ddbaaa5ceb sunxi: preloader_console_init is only available if SERIAL_SUPPORT is enabled
Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
7e3ca21a02 sunxi: h3: Fix PLL1 setup to never use dividers
Kernel would lower the divider on first CLK change and cause the
lock up.
2020-04-13 19:02:04 +02:00
Ondrej Jirman
608b471818 sunxi: h3: Improve PLL lock detection on H3 2020-04-13 19:02:04 +02:00
Ondrej Jirman
9bdfcfba8a Use snprintf in confdata.c to avoid possible buffer overflow
And gcc8 warnings.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Ondrej Jirman
55d65910fe Disable new gcc8 warnings in Makefile
As I can't fix broken generated swig code.

Signed-off-by: Ondrej Jirman <megous@megous.com>
2020-04-13 19:02:04 +02:00
Tom Rini
36fec02b1f Prepare v2020.04
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-13 11:02:18 -04:00
Tom Rini
98985791b8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- Fixes DDR initialization failure on PowerPC boards like P3041DS,
  P4080DS
2020-04-12 08:10:13 -04:00
Tom Rini
995972ddbb Merge tag 'dm-pull9apr20' of git://git.denx.de/u-boot-dm
Fixes segfault in 'dm drivers' command
2020-04-10 11:40:28 -04:00
Biwen Li
159e7a224d Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"
This reverts commit 2a5d5d27ed.
The commit breaks uboot boot (hang in ddr init)
on many PowerPC boards like P3041DS, P4080DS

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-10 17:23:41 +05:30
Tom Rini
a7ae587f93 Merge tag 'mips-fixes-for-2020.04' of git://git.denx.de/u-boot-mips
- doc: fix code examples in qemu-mips.rst
- mips: vcoreiii: fix memtest and cache coherency issues
- cmd/go: fix cache coherency issues on MIPS
2020-04-09 19:23:48 -04:00
Ovidiu Panait
28888ca38e dm: dump.c: Refactor dm_dump_drivers prints
Refactor the printing sequence in dm_dump_drivers to make it more clear.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-09 15:12:34 -06:00
Ovidiu Panait
02197fa749 dm: dump.c: Fix segfault when entry->of_match is NULL
Currently, dm drivers command produces a segfault:
=> dm drivers
Driver                Compatible
--------------------------------
Segmentation fault (core dumped)

This is caused by a NULL pointer dereference of entry->of_match.
Add a check to prevent this.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2020-04-09 15:12:34 -06:00
Marek Vasut
31232de07e usb: Keep async schedule running only across mass storage xfers
Rather than keeping the asynchronous schedule running always, keep it
running only across USB mass storage transfers for now, as it seems
that keeping it running all the time interferes with certain control
transfers during device enumeration.

Note that running the async schedule all the time should not be an
issue, especially on EHCI HCD, as that one implements most of the
transfers using async schedule.

Note that we have usb_disable_asynch(), which however is utterly broken.
The usb_disable_asynch() blocks the USB core from doing async transfers
by setting a global flag. The async schedule should however be disabled
per USB controller. Moreover, setting a global flag does not prevent the
controller from using the async schedule, which e.g. the EHCI HCD does.

This patch implements additional callback to the controller, which
permits it to lock the async schedule and keep it running across
multiple transfers. Once the schedule is unlocked, it must also be
disabled. This thus prevents the async schedule from running outside
of the USB mass storage transfers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> [omap3_beagle, previously failing]
2020-04-09 15:26:59 -04:00
Ye Li
0db0ba6141 imx: Fix imx8m FIT script issue
The FIT config node has reversed ATF and u-boot: ATF is set to 'firmware' but
u-boot is set to 'loadables'.
This script can work previously because spl fit driver wrongly appends fdt to
all loadable images. With the issue fixed in commit 9d15d1d1c2 ("Revert
"common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"") the
u-boot in 'loadables' does not have fdt appended and fails to work.  So correct
the script by moving u-boot to 'firmware' and ATF to 'loadables'.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reported-by: Matt Porter <mporter@konsulko.com>
Tested-by: Matt Porter <mporter@konsulko.com>
2020-04-09 13:07:32 -04:00
Stefan Roese
fb9acad305 mips: cmd: go: Flush cache before jumping to app/image
It has been noticed on MT7628/88 platforms, that booting the RAM image
does not work reliably. Sometimes it works and sometimes not. Debugging
showed that this "might" be a cache related issue as very strange
errors occurred (e.g. output corrupted etc).

This patch adds a cache flush for the complete SDRAM area to the go cmd
before jumping to the entry point for the MIPS architecture. The
complete area is flushed as we don't know at this point, how big the
area of the "application" really is.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Mauro Condarelli <mc5686@mclink.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Mauro Condarelli <mc5686@mclink.it>
Cc: Weijie Gao <weijie.gao@mediatek.com>
2020-04-09 19:00:00 +02:00
Lars Povlsen
7048bb13b2 mips: vcoreiii: Fix cache coherency issues
This patch fixes an stability issue seen on some vcoreiii targets,
which was root caused to a cache inconsistency situation.

The inconsistency was caused by having kuseg pointing to NOR area but
used as a stack/gd/heap area during initialization, while only
relatively late remapping the RAM area into kuseg position.

The fix is to initialize the DDR right after the TLB setup, and then
remapping it into position before gd/stack/heap usage.

Reported-by: Ramin Seyed-Moussavi <ramin.moussavi@yacoub.de>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2020-04-09 18:55:59 +02:00
Lars Povlsen
ea14878931 mips: vcoreiii: Ajust CONFIG_SYS_MEMTEST_END
This patch ajust CONFIG_SYS_MEMTEST_END for vcoreiii-based systems to
avoid overwriting the relocated u-boot. The former setting was too
agressive with networking etc. enabled on some platforms.

Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2020-04-09 18:55:59 +02:00
Heinrich Schuchardt
bfaa54f912 doc: board: qemu-mips.rst: fix code examples
Code sections should be syntax highlighted as bash.
Comment lines in code should start with a hash sign ('#') but code lines
should not.
Most commands can be executed as normal users. Prepend those commands
requiring elevated authorization with 'sudo'.
dd does not have a parameter cout.
sfdisk does not have a -C parameter on Debian Buster.
Provide the necessary input to sfdisk.
Creating a partition of length zero makes no sense.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-09 18:55:59 +02:00
Alex Nemirovsky
47a1933aa7 MIPS: allow override of get_tbclk()
Allow SoC or board layers with reconfigurable cpu clocks
capabilties to do implementation specific lookups and service
get_tbclk() requests.

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-04-09 18:55:59 +02:00
Alex Nemirovsky
ebdc278954 MIPS: allow override of flush_dcache_range()
Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-04-09 18:55:59 +02:00
Sean Anderson
97c7ac214e cmd: Add test and fix bugs for dm drivers
Add a test for the dm drivers command. Also fix a null pointer dereference
revealed by said test.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-09 09:18:56 -04:00
Tom Rini
dfd5321bec Merge tag 'u-boot-imx-20200408' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2020.04
-----------------

- mx7dsabre: Fix ramdisk_addr* for distro boot
- Toradex boards

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/671988124
2020-04-08 12:06:39 -04:00
Jan Kiszka
c94f405ce9 mx7dsabre: Fix ramdisk_addr* for distro boot
Overlapped with fdt_addr*, thus corrupted the latter when using both.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-04-07 10:43:25 +02:00
Igor Opaniuk
eb719060ab ARM: dts: imx8qxp-colibri: dm-pre-proper for pd_dma nodes
pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:41:10 +02:00
Igor Opaniuk
8fe92b8045 ARM: dts: imx8qm-apalis: dm-pre-proper for pd_dma nodes
pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:41:07 +02:00
Igor Opaniuk
67c8e2826b ARM: dts: imx8qxp-colibri: replace dm-spl with dm-pre-proper
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:41:02 +02:00
Igor Opaniuk
99897dd80d ARM: dts: imx8qm-apalis: replace dm-spl with dm-pre-proper
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:40:56 +02:00
Igor Opaniuk
1efb80c4fc colibri_imx6: set gpr1 ENET_CLK_SEL
This fixes the issue when PHY auto negotiation never completes.

Fixes: 431cd76dd8("colibri_imx6: migrate to DM_ETH")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:40:19 +02:00
Tom Rini
0965d2ac93 Prepare v2020.04-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-06 17:44:14 -04:00
Chee Hong Ang
32d630fc1d clk: socfpga: Read the clock parent's register base in probe function
This commit (82de42fa14) calls child's
ofdata_to_platdata() method before the parent is probed in dm core.
This has caused the driver no longer able to get the correct parent
clock's register base in the ofdata_to_platdata() method because the
parent clocks will only be probed after the child's ofdata_to_platdata().
To resolve this, the clock parent's register base will only be retrieved
by the child in probe() method instead of ofdata_to_platdata().

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-05 19:07:13 -04:00
Marek Vasut
a667cd8dd3 ARM: dts: stm32: Temporarily drop cd-gpios from AV96 DT
The card-detect GPIO and any other GPIO access currently doesn't work in
U-Boot SPL on any STM32 platform and crashes the SPL. To work around this
problem on AV96 right before release, remove the cd-gpios from DT. This
patch must be reverted right after release, once the proper fix for the
GPIO driver, "gpio: stm32: support gpio ops in SPL", is applied.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-04-05 19:07:13 -04:00
Tom Rini
74bf17db39 Merge branch 'master' of git://git.denx.de/u-boot-sh
- net: sh_eth: Init the hardware before PHY access
2020-04-04 19:20:45 -04:00