Orange Pi 3 has 2 GiB of DRAM, that sometime get misdetected
as 4 GiB, due to false negative result from mctl_mem_matches()
when detecting number of column address bits. This leads to
u-boot detecting more address bits than there are and the
boot process hangs shortly after.
In mctl_mem_matches() we need to wait for each write to finish,
separately. Without this, the check is not reliable for some
unknown reason, probably having to do with unpredictable memory
access ordering.
Patch was made with help from André Przywara, who noticed that
my original idea about detection failing due to read-back from
cache without involving DRAM was false, because data cache is
still of at the time of the DRAM size autodetection.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Cc: André Przywara <andre.przywara@arm.com>
The DRAM controller manual suggests to first program the PHY
initialisation parameters to the PHY_PIR register, and then set bit 0 to
trigger the initialisation. This is also used in boot0.
Follow this recommendation by setting bit 0 in a separate step.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Using memcpy() is, however tempting, not a good idea: It depends on the
specific implementation of memcpy, also lacks barriers. In this
particular case the first registers were written using 64-bit writes,
and the last register using four separate single-byte writes.
Replace the memcpy with a proper loop using the writel() accessor.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This is useful for boot scripts to be able to decide whether to
boot or not and whether to notify the user of what is wrong.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Device tree is slightly different from Linux kernel one, because of
different ABI for display timings between u-boot and Linux.
Signed-off-by: Ondrej Jirman <megous@megous.com>
- Enable LVDS pins (PD18-PD27)
- De-assert LVDS interface reset line
- Enable sunxi_lcd platform device for A83T
- Really disable all interrupts
- A83T does have only a simple clock gate for TCON0 clock
(no need to select source)
- Lifted some analog circuitry setup magic from the Linux driver
Signed-off-by: Ondrej Jirman <megous@megous.com>
A83T SoC has PLL_DE at pll9. Change the name to make it less
confusing when we'll add DE2 support for A83T.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Shows a menu of items that can be controlled using touch panel.
This is useful for touch based devices like tablets to select
alternative boot options (multi-boot).
Signed-off-by: Ondrej Jirman <megous@megous.com>
We don't have DM support for PMIC/GPIO/regulators, so this needs
to be handled via config options and some custom board initialization
code for now.
Signed-off-by: Ondrej Jirman <megous@megous.com>
To enable LDO on GPIO0 and set it to required voltage define
CONFIG_AXP_GPIO_LDO0_VOLT=<mV> in your defconfig. Eg. <mV> can
be 3100 for 3.1V.
Signed-off-by: Ondrej Jirman <megous@megous.com>
To enable I2C0 on A83T add CONFIG_I2C0_ENABLE=y to defconfig and
enable appropriate node in device tree.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Touchapnel devices are useful in u-boot for implementation of boot
menu user interfaces on tablets and other touch based devices.
This uclass implements start, stop and get_touches interface methods.
Signed-off-by: Ondrej Jirman <megous@megous.com>
