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arm: dts: dra7x: Non-functional changes sync with v6.3-rc6

Browse Source 
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.

Signed-off-by: Andrew Davis <afd@ti.com>
This commit is contained in:
Andrew Davis
2023-04-11 13:25:06 -05:00
committed by Tom Rini
parent 211b3d7263
commit f8ae3e605b
14 changed files with 226 additions and 220 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/dts/am571x-idk.dts
View File

@@ -74,17 +74,17 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
};

8
arch/arm/dts/am572x-idk-common.dtsi
View File

@@ -81,20 +81,20 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};

8
arch/arm/dts/am57xx-beagle-x15-common.dtsi
View File

@@ -568,20 +568,20 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};

4
arch/arm/dts/am57xx-idk-common.dtsi
View File

@@ -437,7 +437,7 @@
status = "okay";
spi-max-frequency = <76800000>;
m25p80@0 {
flash@0 {
compatible = "s25fl256s1", "jedec,spi-nor";
spi-max-frequency = <76800000>;
reg = <0>;
@@ -453,7 +453,7 @@
*/
partition@0 {
label = "QSPI.SPL";
reg = <0x00000000 0x000040000>;
reg = <0x00000000 0x00040000>;
};
partition@1 {
label = "QSPI.u-boot";

12
arch/arm/dts/dra7-evm-common.dtsi
View File

@@ -129,7 +129,7 @@
status = "okay";
spi-max-frequency = <76800000>;
m25p80@0 {
flash@0 {
compatible = "s25fl256s1";
spi-max-frequency = <76800000>;
reg = <0>;
@@ -145,7 +145,7 @@
*/
partition@0 {
label = "QSPI.SPL";
reg = <0x00000000 0x000010000>;
reg = <0x00000000 0x00010000>;
};
partition@1 {
label = "QSPI.SPL.backup1";
@@ -236,20 +236,20 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};

4
arch/arm/dts/dra7-evm.dts
View File

@@ -312,7 +312,7 @@
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
p1 {
hdmi-audio-hog {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
@@ -416,7 +416,7 @@
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
reg = <0x00000000 0x00020000>;
};
partition@1 {
label = "NAND.SPL.backup1";

16
arch/arm/dts/dra7.dtsi
View File

@@ -132,7 +132,7 @@
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
ocp: ocp {
compatible = "ti,dra7-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -355,7 +355,13 @@
};
};
axi@1 {
/*
* Register access seems to have complex dependencies and also
* seems to need an enabled phy. See the TRM chapter for "Table
* 26-678. Main Sequence PCIe Controller Global Initialization"
* and also dra7xx_pcie_probe().
*/
axi1: target-module@51800000 {
compatible = "simple-bus";
#size-cells = <1>;
#address-cells = <1>;
@@ -370,8 +376,8 @@
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
<0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
@@ -2110,4 +2116,4 @@
temperature = <120000>; /* milli Celsius */
};
/include/ "dra7xx-clocks.dtsi"
#include "dra7xx-clocks.dtsi"

2
arch/arm/dts/dra71-evm.dts
View File

@@ -157,7 +157,7 @@
};
&pcf_hdmi {
p0 {
hdmi-i2c-disable-hog {
/*
* PM_OEn to High: Disable routing I2C3 to PM_I2C
* With this PM_SEL(p3) should not matter

14
arch/arm/dts/dra72-evm-common.dtsi
View File

@@ -269,7 +269,7 @@
*/
lines-initial-states = <0x0f2b>;
p1 {
hdmi-audio-hog {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
@@ -340,7 +340,7 @@
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
reg = <0x00000000 0x00020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
@@ -438,7 +438,7 @@
status = "okay";
spi-max-frequency = <76800000>;
m25p80@0 {
flash@0 {
compatible = "s25fl256s1";
spi-max-frequency = <76800000>;
reg = <0>;
@@ -454,7 +454,7 @@
*/
partition@0 {
label = "QSPI.SPL";
reg = <0x00000000 0x000010000>;
reg = <0x00000000 0x00010000>;
};
partition@1 {
label = "QSPI.SPL.backup1";
@@ -546,17 +546,17 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
};

2
arch/arm/dts/dra72-evm-tps65917.dtsi
View File

@@ -5,7 +5,7 @@
/*
* Integrated Power Management Chip
* http://www.ti.com/lit/ds/symlink/tps65917-q1.pdf
* https://www.ti.com/lit/ds/symlink/tps65917-q1.pdf
*/
&tps65917 {

6
arch/arm/dts/dra72x.dtsi
View File

@@ -29,12 +29,12 @@
};
&mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";
@@ -42,7 +42,7 @@
};
&mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";

8
arch/arm/dts/dra74x.dtsi
View File

@@ -98,12 +98,12 @@
};
&mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";
@@ -111,12 +111,12 @@
};
&mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";

4
arch/arm/dts/dra76-evm.dts
View File

@@ -271,7 +271,7 @@
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
p1 {
hdmi-audio-hog {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
@@ -379,7 +379,7 @@
&qspi {
spi-max-frequency = <96000000>;
m25p80@0 {
flash@0 {
spi-max-frequency = <96000000>;
};
};

352
arch/arm/dts/dra7xx-clocks.dtsi
View File

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