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usb: dwc3-uniphier: Use dwc3-generic instead of xhci-dwc3
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable to use dwc3-generic. This driver calls the exported dwc3-generic functions and redefine the SoC-dependent operations to fit dwc3-generic. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Kunihiko Hayashi
committed by
Marek Vasut
Marek Vasut
parent
7a888de4b5
commit
ec01e0ba2c
@@ -55,7 +55,9 @@ config USB_DWC3_MESON_GXL
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config USB_DWC3_UNIPHIER
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bool "DesignWare USB3 Host Support on UniPhier Platforms"
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depends on ARCH_UNIPHIER && USB_XHCI_DWC3
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depends on ARCH_UNIPHIER && USB_DWC3
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select USB_DWC3_GENERIC
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select PHY_UNIPHIER_USB3
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help
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Support of USB2/3 functionality in Socionext UniPhier platforms.
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Say 'Y' here if you have one such device.
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@@ -4,14 +4,17 @@
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*
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* Copyright (C) 2016-2017 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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* Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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*/
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <dm/lists.h>
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include <linux/usb/gadget.h>
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#include "core.h"
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#include "gadget.h"
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#include "dwc3-generic.h"
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#define UNIPHIER_PRO4_DWC3_RESET 0x40
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#define UNIPHIER_PRO4_DWC3_RESET_XIOMMU BIT(5)
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@@ -27,8 +30,11 @@
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#define UNIPHIER_PXS2_DWC3_RESET 0x00
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#define UNIPHIER_PXS2_DWC3_RESET_XLINK BIT(15)
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static int uniphier_pro4_dwc3_init(void __iomem *regs)
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static void uniphier_pro4_dwc3_init(struct udevice *dev, int index,
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enum usb_dr_mode mode)
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{
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struct dwc3_glue_data *glue = dev_get_plat(dev);
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void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE);
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u32 tmp;
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tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
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@@ -36,11 +42,14 @@ static int uniphier_pro4_dwc3_init(void __iomem *regs)
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tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
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writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);
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return 0;
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unmap_physmem(regs, MAP_NOCACHE);
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}
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static int uniphier_pro5_dwc3_init(void __iomem *regs)
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static void uniphier_pro5_dwc3_init(struct udevice *dev, int index,
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enum usb_dr_mode mode)
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{
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struct dwc3_glue_data *glue = dev_get_plat(dev);
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void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE);
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u32 tmp;
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tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET);
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@@ -49,72 +58,97 @@ static int uniphier_pro5_dwc3_init(void __iomem *regs)
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tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU;
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writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET);
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return 0;
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unmap_physmem(regs, MAP_NOCACHE);
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}
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static int uniphier_pxs2_dwc3_init(void __iomem *regs)
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static void uniphier_pxs2_dwc3_init(struct udevice *dev, int index,
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enum usb_dr_mode mode)
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{
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struct dwc3_glue_data *glue = dev_get_plat(dev);
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void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE);
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u32 tmp;
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tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET);
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tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK;
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writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET);
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unmap_physmem(regs, MAP_NOCACHE);
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}
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static int dwc3_uniphier_glue_get_ctrl_dev(struct udevice *dev, ofnode *node)
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{
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struct udevice *child;
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const char *name;
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ofnode subnode;
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/*
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* "controller reset" belongs to glue logic, and it should be
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* accessible in .glue_configure() before access to the controller
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* begins.
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*/
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ofnode_for_each_subnode(subnode, dev_ofnode(dev)) {
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name = ofnode_get_name(subnode);
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if (!strncmp(name, "reset", 5))
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device_bind_driver_to_node(dev, "uniphier-reset",
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name, subnode, &child);
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}
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/* Get controller node that is placed separately from the glue node */
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*node = ofnode_by_compatible(dev_ofnode(dev->parent),
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"socionext,uniphier-dwc3");
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return 0;
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}
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static int uniphier_dwc3_probe(struct udevice *dev)
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{
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fdt_addr_t base;
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void __iomem *regs;
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int (*init)(void __iomem *regs);
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int ret;
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static const struct dwc3_glue_ops uniphier_pro4_dwc3_ops = {
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.glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev,
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.glue_configure = uniphier_pro4_dwc3_init,
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};
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base = dev_read_addr(dev);
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if (base == FDT_ADDR_T_NONE)
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return -EINVAL;
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static const struct dwc3_glue_ops uniphier_pro5_dwc3_ops = {
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.glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev,
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.glue_configure = uniphier_pro5_dwc3_init,
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};
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regs = ioremap(base, SZ_32K);
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if (!regs)
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return -ENOMEM;
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init = (typeof(init))dev_get_driver_data(dev);
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ret = init(regs);
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if (ret)
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dev_err(dev, "failed to init glue layer\n");
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iounmap(regs);
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return ret;
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}
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static const struct dwc3_glue_ops uniphier_pxs2_dwc3_ops = {
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.glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev,
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.glue_configure = uniphier_pxs2_dwc3_init,
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};
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static const struct udevice_id uniphier_dwc3_match[] = {
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{
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.compatible = "socionext,uniphier-pro4-dwc3",
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.data = (ulong)uniphier_pro4_dwc3_init,
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.compatible = "socionext,uniphier-pro4-dwc3-glue",
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.data = (ulong)&uniphier_pro4_dwc3_ops,
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},
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{
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.compatible = "socionext,uniphier-pro5-dwc3",
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.data = (ulong)uniphier_pro5_dwc3_init,
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.compatible = "socionext,uniphier-pro5-dwc3-glue",
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.data = (ulong)&uniphier_pro5_dwc3_ops,
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},
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{
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.compatible = "socionext,uniphier-pxs2-dwc3",
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.data = (ulong)uniphier_pxs2_dwc3_init,
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.compatible = "socionext,uniphier-pxs2-dwc3-glue",
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.data = (ulong)&uniphier_pxs2_dwc3_ops,
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},
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{
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.compatible = "socionext,uniphier-ld20-dwc3",
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.data = (ulong)uniphier_pxs2_dwc3_init,
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.compatible = "socionext,uniphier-ld20-dwc3-glue",
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.data = (ulong)&uniphier_pxs2_dwc3_ops,
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},
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{
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.compatible = "socionext,uniphier-pxs3-dwc3",
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.data = (ulong)uniphier_pxs2_dwc3_init,
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.compatible = "socionext,uniphier-pxs3-dwc3-glue",
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.data = (ulong)&uniphier_pxs2_dwc3_ops,
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},
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{
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.compatible = "socionext,uniphier-nx1-dwc3-glue",
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.data = (ulong)&uniphier_pxs2_dwc3_ops,
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},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(usb_xhci) = {
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U_BOOT_DRIVER(dwc3_uniphier_wrapper) = {
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.name = "uniphier-dwc3",
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.id = UCLASS_SIMPLE_BUS,
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.of_match = uniphier_dwc3_match,
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.probe = uniphier_dwc3_probe,
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.bind = dwc3_glue_bind,
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.probe = dwc3_glue_probe,
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.remove = dwc3_glue_remove,
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.plat_auto = sizeof(struct dwc3_glue_data),
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};
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