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Rockchip: video: edp: Change interrupt polarity configuration

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The linux code is setting polarity configuration to 3 but
uboot code is setting it to 1. Change the configuration to match the
linux configuration

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
This commit is contained in:
Arnaud Patard (Rtp)
2021-03-05 11:27:48 +01:00
committed by Anatolij Gustschin
parent 04d67ceb1c
commit ead61b8f73
1 changed files with 3 additions and 1 deletions
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4
arch/arm/include/asm/arch-rockchip/edp_rk3288.h
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@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00);
/* int_ctl */
#define SOFT_INT_CTRL (0x1 << 2)
#define INT_POL (0x1 << 0)
#define INT_POL1 (0x1 << 1)
#define INT_POL0 (0x1 << 0)
#define INT_POL (INT_POL0 | INT_POL1)
/* sys_ctl_1 */
#define DET_STA (0x1 << 2)