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video: rockchip: dw_mipi_dsi: Sync calculations with Linux

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This was all weird and broken.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
This commit is contained in:
Ondrej Jirman
2023-05-22 23:32:47 +02:00
parent dfd0e5d876
commit d198b47344
2 changed files with 4 additions and 2 deletions
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2
drivers/clk/rockchip/clk_rk3399.c
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@@ -976,6 +976,8 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
case PCLK_WDT:
rate = rk3399_alive_get_clk(priv->cru);
break;
case SCLK_DPHY_PLL:
return 24000000;
default:
log_debug("Unknown clock %lu\n", clk->id);
return -ENOENT;

4
drivers/video/rockchip/dw_mipi_dsi_rockchip.c
View File

@@ -521,8 +521,8 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
mpclk = DIV_ROUND_UP(timings->pixelclock.typ, 1000);
if (mpclk) {
/* take 1 / 0.8, since mbps must big than bandwidth of RGB */
tmp = (mpclk * (bpp / lanes) * 10 / 8) / 1000;
/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
tmp = (mpclk * (bpp / lanes) * 10 / 9) / 1000;
if (tmp < max_mbps)
target_mbps = tmp;
else