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arm: mach-k3: j721s2_init: Support less than max DDR controllers

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The number of DDR controllers to be initialised and used should depend
on the device tree with the constraint of the maximum number of
controllers the device supports. Since J721S2 has multiple (2)
controllers, instead of hardcoding the number of probes, move to
depending on the device tree UCLASS_RAM nodes present.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
This commit is contained in:
Neha Malcom Francis
2024-01-30 15:53:56 +05:30
committed by Tom Rini
parent 4312a1dfca
commit 94cfc6fc96
1 changed files with 1 additions and 1 deletions
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arch/arm/mach-k3/j721s2_init.c
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@@ -228,7 +228,7 @@ void k3_mem_init(void)
panic("DRAM 0 init failed: %d\n", ret);
ret = uclass_next_device_err(&dev);
if (ret)
if (ret && ret != -ENODEV)
panic("DRAM 1 init failed: %d\n", ret);
}
spl_enable_cache();