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https://xff.cz/git/u-boot/
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ARM: dts: renesas: Remove leftovers after OF_UPSTREAM conversion
Remove leftover DTSI files after OF_UPSTREAM conversion. Those are no longer used and no longer necessary, remove them. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Marek Vasut
File diff suppressed because it is too large
Load Diff
@@ -1,29 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Salvator-X board
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*
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* Copyright (C) 2015-2016 Renesas Electronics Corp.
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*/
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#include "salvator-common.dtsi"
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/ {
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model = "Renesas Salvator-X board";
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compatible = "renesas,salvator-x";
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};
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&extal_clk {
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clock-frequency = <16666666>;
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};
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&i2c4 {
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clock-frequency = <400000>;
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versaclock5: clock-generator@6a {
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compatible = "idt,5p49v5923";
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reg = <0x6a>;
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#clock-cells = <1>;
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clocks = <&x23_clk>;
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clock-names = "xin";
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};
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};
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@@ -1,85 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Salvator-X 2nd version board
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*
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* Copyright (C) 2015-2017 Renesas Electronics Corp.
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*/
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#include "salvator-common.dtsi"
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/ {
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model = "Renesas Salvator-X 2nd version board";
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compatible = "renesas,salvator-xs";
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};
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&extal_clk {
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clock-frequency = <16640000>;
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};
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&i2c4 {
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clock-frequency = <400000>;
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versaclock6: clock-generator@6a {
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compatible = "idt,5p49v6901";
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reg = <0x6a>;
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#clock-cells = <1>;
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clocks = <&x23_clk>;
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clock-names = "xin";
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};
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};
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#ifdef SOC_HAS_SATA
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&pca9654 {
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pcie-sata-switch-hog {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_HIGH>;
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output-low; /* enable SATA by default */
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line-name = "PCIE/SATA switch";
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};
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};
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/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
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#endif /* SOC_HAS_SATA */
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#ifdef SOC_HAS_USB2_CH3
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&ehci3 {
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dr_mode = "otg";
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status = "okay";
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};
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&hsusb3 {
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dr_mode = "otg";
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status = "okay";
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};
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&ohci3 {
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dr_mode = "otg";
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status = "okay";
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};
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&pfc {
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/*
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* - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
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* (when SW31 is the default setting on Salvator-XS).
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* - If SW31 is the default setting, you cannot use USB2.0 ch3 on
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* r8a77951 with Salvator-XS.
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* Hence the SW31 setting must be changed like 2) below.
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* 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
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* - Connect GP6_3[01] to ADV7842.
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* 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
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* - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
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* - Connect GP6_{04,21} to ADV7842.
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*/
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usb2_ch3_pins: usb2_ch3 {
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groups = "usb2_ch3";
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function = "usb2_ch3";
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};
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};
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&usb2_phy3 {
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pinctrl-0 = <&usb2_ch3_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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#endif /* SOC_HAS_USB2_CH3 */
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@@ -1,85 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree for ULCB + Audio Graph Card
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*
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* Copyright (C) 2022 Renesas Electronics Corp.
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*/
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/*
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* (A) CPU0 <-----> ak4613
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* (B) CPU1 -----> HDMI
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*
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* (A) aplay -D plughw:0,0 xxx.wav
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* (B) aplay -D plughw:0,1 xxx.wav
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*
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* (A) arecord -D plughw:0,0 xxx.wav
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*/
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/ {
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sound_card: sound {
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compatible = "audio-graph-card";
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label = "rcar-sound";
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dais = <&rsnd_port0 /* (A) CPU0 <-> ak4613 */
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&rsnd_port1 /* (B) CPU1 -> HDMI */
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>;
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};
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};
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&ak4613 {
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#sound-dai-cells = <0>;
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port {
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/*
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* (A) CPU0 <-> ak4613
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*/
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ak4613_endpoint: endpoint {
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remote-endpoint = <&rsnd_for_ak4613>;
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};
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};
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};
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&hdmi0 {
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ports {
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port@2 {
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/*
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* (B) CPU1 -> HDMI
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*/
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dw_hdmi0_snd_in: endpoint {
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remote-endpoint = <&rsnd_for_hdmi>;
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};
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};
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};
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};
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&rcar_sound {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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rsnd_port0: port@0 {
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/*
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* (A) CPU0 <-> ak4613
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*/
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reg = <0>;
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rsnd_for_ak4613: endpoint {
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remote-endpoint = <&ak4613_endpoint>;
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bitclock-master;
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frame-master;
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playback = <&ssi0>, <&src0>, <&dvc0>;
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capture = <&ssi1>, <&src1>, <&dvc1>;
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};
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};
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rsnd_port1: port@1 {
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/*
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* (B) CPU1 -> HDMI
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*/
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reg = <1>;
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rsnd_for_hdmi: endpoint {
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remote-endpoint = <&dw_hdmi0_snd_in>;
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bitclock-master;
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frame-master;
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playback = <&ssi2>;
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};
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};
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};
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};
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@@ -1,26 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree for ULCB + Audio Graph Card2
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*
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* Copyright (C) 2022 Renesas Electronics Corp.
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*/
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/*
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* (A) CPU0 <----> ak4613
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* (B) CPU1 ----> HDMI
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*
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* (A) aplay -D plughw:0,0 xxx.wav
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* (B) aplay -D plughw:0,1 xxx.wav
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*
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* (A) arecord -D plughw:0,0 xxx.wav
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*/
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#include "ulcb-audio-graph-card.dtsi"
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&sound_card {
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compatible = "audio-graph-card2";
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/delete-property/ dais;
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links = <&rsnd_port0 /* (A) CPU0 <-> ak4613 */
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&rsnd_port1 /* (B) CPU1 -> HDMI */
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>;
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};
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@@ -1,509 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the R-Car Gen3 ULCB board
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2016 Cogent Embedded, Inc.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Renesas R-Car Gen3 ULCB board";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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i2c7 = &i2c_dvfs;
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serial0 = &scif2;
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ethernet0 = &avb;
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mmc0 = &sdhi2;
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mmc1 = &sdhi0;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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stdout-path = "serial0:115200n8";
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};
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audio_clkout: audio-clkout {
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/*
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* This is same as <&rcar_sound 0>
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* but needed to avoid cs2000/rcar_sound probe dead-lock
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*/
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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};
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hdmi0-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi0_con: endpoint {
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remote-endpoint = <&rcar_dw_hdmi0_out>;
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};
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};
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};
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keyboard {
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compatible = "gpio-keys";
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key-1 {
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linux,code = <KEY_1>;
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label = "SW3";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led5 {
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gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
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};
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led6 {
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gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
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};
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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x12_clk: x12 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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x23_clk: x23-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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};
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&a57_0 {
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cpu-supply = <&dvfs>;
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};
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&audio_clk_a {
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clock-frequency = <22579200>;
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy0>;
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-id0022.1622",
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"ethernet-phy-ieee802.3-c22";
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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};
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};
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&du {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&extal_clk {
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clock-frequency = <16666666>;
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&hdmi0 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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rcar_dw_hdmi0_out: endpoint {
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remote-endpoint = <&hdmi0_con>;
|
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};
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};
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port@2 {
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reg = <2>;
|
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};
|
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};
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <100000>;
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ak4613: codec@10 {
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compatible = "asahi-kasei,ak4613";
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reg = <0x10>;
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clocks = <&rcar_sound 3>;
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asahi-kasei,in1-single-end;
|
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asahi-kasei,in2-single-end;
|
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asahi-kasei,out1-single-end;
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asahi-kasei,out2-single-end;
|
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asahi-kasei,out3-single-end;
|
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asahi-kasei,out4-single-end;
|
||||
asahi-kasei,out5-single-end;
|
||||
asahi-kasei,out6-single-end;
|
||||
};
|
||||
|
||||
cs2000: clk-multiplier@4f {
|
||||
#clock-cells = <0>;
|
||||
compatible = "cirrus,cs2000-cp";
|
||||
reg = <0x4f>;
|
||||
clocks = <&audio_clkout>, <&x12_clk>;
|
||||
clock-names = "clk_in", "ref_clk";
|
||||
|
||||
assigned-clocks = <&cs2000>;
|
||||
assigned-clock-rates = <24576000>; /* 1/1 divide */
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
versaclock5: clock-generator@6a {
|
||||
compatible = "idt,5p49v5925";
|
||||
reg = <0x6a>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&x23_clk>;
|
||||
clock-names = "xin";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_dvfs {
|
||||
status = "okay";
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
pmic: pmic@30 {
|
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pinctrl-0 = <&irq0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
compatible = "rohm,bd9571mwv";
|
||||
reg = <0x30>;
|
||||
interrupt-parent = <&intc_ex>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
rohm,ddr-backup-power = <0xf>;
|
||||
rohm,rstbmode-pulse;
|
||||
|
||||
regulators {
|
||||
dvfs: dvfs {
|
||||
regulator-name = "dvfs";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1030000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "rohm,br24t01", "atmel,24c01";
|
||||
reg = <0x50>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pfc {
|
||||
pinctrl-0 = <&scif_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
avb_pins: avb {
|
||||
mux {
|
||||
groups = "avb_link", "avb_mdio", "avb_mii";
|
||||
function = "avb";
|
||||
};
|
||||
|
||||
pins_mdio {
|
||||
groups = "avb_mdio";
|
||||
drive-strength = <24>;
|
||||
};
|
||||
|
||||
pins_mii_tx {
|
||||
pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
|
||||
"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
|
||||
drive-strength = <12>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2 {
|
||||
groups = "i2c2_a";
|
||||
function = "i2c2";
|
||||
};
|
||||
|
||||
irq0_pins: irq0 {
|
||||
groups = "intc_ex_irq0";
|
||||
function = "intc_ex";
|
||||
};
|
||||
|
||||
scif2_pins: scif2 {
|
||||
groups = "scif2_data_a";
|
||||
function = "scif2";
|
||||
};
|
||||
|
||||
scif_clk_pins: scif_clk {
|
||||
groups = "scif_clk_a";
|
||||
function = "scif_clk";
|
||||
};
|
||||
|
||||
sdhi0_pins: sd0 {
|
||||
groups = "sdhi0_data4", "sdhi0_ctrl";
|
||||
function = "sdhi0";
|
||||
power-source = <3300>;
|
||||
};
|
||||
|
||||
sdhi0_pins_uhs: sd0_uhs {
|
||||
groups = "sdhi0_data4", "sdhi0_ctrl";
|
||||
function = "sdhi0";
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
sdhi2_pins: sd2 {
|
||||
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
|
||||
function = "sdhi2";
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
sound_pins: sound {
|
||||
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
|
||||
function = "ssi";
|
||||
};
|
||||
|
||||
sound_clk_pins: sound-clk {
|
||||
groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
|
||||
"audio_clkout_a", "audio_clkout3_a";
|
||||
function = "audio_clk";
|
||||
};
|
||||
|
||||
usb1_pins: usb1 {
|
||||
groups = "usb1";
|
||||
function = "usb1";
|
||||
};
|
||||
};
|
||||
|
||||
&rcar_sound {
|
||||
pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* audio_clkout0/1/2/3 */
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <12288000 11289600>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
/* update <audio_clk_b> to <cs2000> */
|
||||
clocks = <&cpg CPG_MOD 1005>,
|
||||
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
|
||||
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
|
||||
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
|
||||
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
|
||||
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
|
||||
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
|
||||
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
|
||||
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
|
||||
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
|
||||
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
|
||||
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
|
||||
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
|
||||
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
|
||||
<&audio_clk_a>, <&cs2000>,
|
||||
<&audio_clk_c>,
|
||||
<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
|
||||
};
|
||||
|
||||
&rpc {
|
||||
/* Left disabled. To be enabled by firmware when unlocked. */
|
||||
|
||||
flash@0 {
|
||||
compatible = "cypress,hyperflash", "cfi-flash";
|
||||
reg = <0>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bootparam@0 {
|
||||
reg = <0x00000000 0x040000>;
|
||||
read-only;
|
||||
};
|
||||
bl2@40000 {
|
||||
reg = <0x00040000 0x140000>;
|
||||
read-only;
|
||||
};
|
||||
cert_header_sa6@180000 {
|
||||
reg = <0x00180000 0x040000>;
|
||||
read-only;
|
||||
};
|
||||
bl31@1c0000 {
|
||||
reg = <0x001c0000 0x040000>;
|
||||
read-only;
|
||||
};
|
||||
tee@200000 {
|
||||
reg = <0x00200000 0x440000>;
|
||||
read-only;
|
||||
};
|
||||
uboot@640000 {
|
||||
reg = <0x00640000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
dtb@740000 {
|
||||
reg = <0x00740000 0x080000>;
|
||||
};
|
||||
kernel@7c0000 {
|
||||
reg = <0x007c0000 0x1400000>;
|
||||
};
|
||||
user@1bc0000 {
|
||||
reg = <0x01bc0000 0x2440000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rwdt {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&scif2 {
|
||||
pinctrl-0 = <&scif2_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&scif_clk {
|
||||
clock-frequency = <14745600>;
|
||||
};
|
||||
|
||||
&sdhi0 {
|
||||
pinctrl-0 = <&sdhi0_pins>;
|
||||
pinctrl-1 = <&sdhi0_pins_uhs>;
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
|
||||
vmmc-supply = <&vcc_sdhi0>;
|
||||
vqmmc-supply = <&vccq_sdhi0>;
|
||||
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhi2 {
|
||||
/* used for on-board 8bit eMMC */
|
||||
pinctrl-0 = <&sdhi2_pins>;
|
||||
pinctrl-1 = <&sdhi2_pins>;
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
|
||||
vmmc-supply = <®_3p3v>;
|
||||
vqmmc-supply = <®_1p8v>;
|
||||
bus-width = <8>;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
non-removable;
|
||||
full-pwr-cycle-in-suspend;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
shared-pin;
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* For sound-test.
|
||||
*
|
||||
* We can switch Audio Card for testing
|
||||
*
|
||||
* #include "ulcb-simple-audio-card.dtsi"
|
||||
* #include "ulcb-simple-audio-card-mix+split.dtsi"
|
||||
* #include "ulcb-audio-graph-card.dtsi"
|
||||
* #include "ulcb-audio-graph-card-mix+split.dtsi"
|
||||
* #include "ulcb-audio-graph-card2-mix+split.dtsi"
|
||||
*/
|
||||
#include "ulcb-audio-graph-card2.dtsi"
|
||||
Reference in New Issue
Block a user