1
0
mirror of https://xff.cz/git/u-boot/ synced 2025-10-26 16:13:55 +01:00
- Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
- fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
This commit is contained in:
Tom Rini
2020-11-16 10:50:32 -05:00
11 changed files with 64 additions and 16 deletions

View File

@@ -4,4 +4,5 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common-u-boot.dtsi"
#include "meson-khadas-vim3-u-boot.dtsi"

View File

@@ -4,8 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common-u-boot.dtsi"
/ {
aliases {
spi0 = &spifc;

View File

@@ -4,4 +4,5 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-sm1-u-boot.dtsi"
#include "meson-khadas-vim3-u-boot.dtsi"

View File

@@ -4,7 +4,7 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common-u-boot.dtsi"
#include "meson-sm1-u-boot.dtsi"
&ethmac {
snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;

View File

@@ -4,4 +4,4 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common-u-boot.dtsi"
#include "meson-sm1-u-boot.dtsi"

View File

@@ -0,0 +1,20 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common-u-boot.dtsi"
&sd_emmc_a {
compatible = "amlogic,meson-sm1-mmc";
};
&sd_emmc_b {
compatible = "amlogic,meson-sm1-mmc";
};
&sd_emmc_c {
compatible = "amlogic,meson-sm1-mmc";
};

View File

@@ -38,6 +38,7 @@ static const struct meson_gx_soc_id {
{ "G12A", 0x28 },
{ "G12B", 0x29 },
{ "SM1", 0x2b },
{ "A1", 0x2c },
};
static const struct meson_gx_package_id {
@@ -65,7 +66,11 @@ static const struct meson_gx_package_id {
{ "S905X2", 0x28, 0x40, 0xf0 },
{ "A311D", 0x29, 0x10, 0xf0 },
{ "S922X", 0x29, 0x40, 0xf0 },
{ "S905X3", 0x2b, 0x5, 0xf },
{ "S905D3", 0x2b, 0x4, 0xf5 },
{ "S905X3", 0x2b, 0x5, 0xf5 },
{ "S905X3", 0x2b, 0x10, 0x3f },
{ "S905D3", 0x2b, 0x30, 0x3f },
{ "A113L", 0x2c, 0x0, 0xf8 },
};
DECLARE_GLOBAL_DATA_PTR;

View File

@@ -13,9 +13,17 @@
#include <mmc.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/sd_emmc.h>
#include <linux/delay.h>
#include <linux/log2.h>
#include "meson_gx_mmc.h"
bool meson_gx_mmc_is_compatible(struct udevice *dev,
enum meson_gx_mmc_compatible family)
{
enum meson_gx_mmc_compatible compat = dev_get_driver_data(dev);
return compat == family;
}
static inline void *get_regbase(const struct mmc *mmc)
{
@@ -42,6 +50,8 @@ static void meson_mmc_config_clock(struct mmc *mmc)
if (!mmc->clock)
return;
/* TOFIX This should use the proper clock taken from DT */
/* 1GHz / CLK_MAX_DIV = 15,9 MHz */
if (mmc->clock > 16000000) {
clk = SD_EMMC_CLKSRC_DIV2;
@@ -52,8 +62,16 @@ static void meson_mmc_config_clock(struct mmc *mmc)
}
clk_div = DIV_ROUND_UP(clk, mmc->clock);
/* 180 phase core clock */
meson_mmc_clk |= CLK_CO_PHASE_180;
/*
* SM1 SoCs doesn't work fine over 50MHz with CLK_CO_PHASE_180
* If CLK_CO_PHASE_270 is used, it's more stable than other.
* Other SoCs use CLK_CO_PHASE_180 by default.
* It needs to find what is a proper value about each SoCs.
*/
if (meson_gx_mmc_is_compatible(mmc->dev, MMC_COMPATIBLE_SM1))
meson_mmc_clk |= CLK_CO_PHASE_270;
else
meson_mmc_clk |= CLK_CO_PHASE_180;
/* 180 phase tx clock */
meson_mmc_clk |= CLK_TX_PHASE_000;
@@ -308,8 +326,9 @@ int meson_mmc_bind(struct udevice *dev)
}
static const struct udevice_id meson_mmc_match[] = {
{ .compatible = "amlogic,meson-gx-mmc" },
{ .compatible = "amlogic,meson-axg-mmc" },
{ .compatible = "amlogic,meson-gx-mmc", .data = MMC_COMPATIBLE_GX },
{ .compatible = "amlogic,meson-axg-mmc", .data = MMC_COMPATIBLE_GX },
{ .compatible = "amlogic,meson-sm1-mmc", .data = MMC_COMPATIBLE_SM1 },
{ /* sentinel */ }
};

View File

@@ -3,14 +3,16 @@
* (C) Copyright 2016 Carlo Caione <carlo@caione.org>
*/
#ifndef __SD_EMMC_H__
#define __SD_EMMC_H__
#ifndef __MESON_GX_MMC_H__
#define __MESON_GX_MMC_H__
#include <mmc.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif
enum meson_gx_mmc_compatible {
MMC_COMPATIBLE_GX,
MMC_COMPATIBLE_SM1,
};
#define SDIO_PORT_A 0
#define SDIO_PORT_B 1

View File

@@ -66,10 +66,10 @@ struct phy_meson_g12a_usb2_priv {
static int phy_meson_g12a_usb2_power_on(struct phy *phy)
{
#if CONFIG_IS_ENABLED(DM_REGULATOR)
struct udevice *dev = phy->dev;
struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev);
#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (priv->phy_supply) {
int ret = regulator_set_enable(priv->phy_supply, true);
if (ret)
@@ -82,10 +82,10 @@ static int phy_meson_g12a_usb2_power_on(struct phy *phy)
static int phy_meson_g12a_usb2_power_off(struct phy *phy)
{
#if CONFIG_IS_ENABLED(DM_REGULATOR)
struct udevice *dev = phy->dev;
struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev);
#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (priv->phy_supply) {
int ret = regulator_set_enable(priv->phy_supply, false);
if (ret) {

View File

@@ -379,7 +379,9 @@ static int meson_dw_hdmi_probe(struct udevice *dev)
struct meson_dw_hdmi *priv = dev_get_priv(dev);
struct reset_ctl_bulk resets;
struct clk_bulk clocks;
#if CONFIG_IS_ENABLED(DM_REGULATOR)
struct udevice *supply;
#endif
int ret;
priv->dev = dev;