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Merge tag 'u-boot-amlogic-20201116' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Clock fix MMC driver for SM1 based platforms - sync SOC Ids from Linux 5.10-rc1 - fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
This commit is contained in:
@@ -4,4 +4,5 @@
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12-common-u-boot.dtsi"
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#include "meson-khadas-vim3-u-boot.dtsi"
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@@ -4,8 +4,6 @@
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12-common-u-boot.dtsi"
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/ {
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aliases {
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spi0 = &spifc;
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@@ -4,4 +4,5 @@
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-sm1-u-boot.dtsi"
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#include "meson-khadas-vim3-u-boot.dtsi"
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@@ -4,7 +4,7 @@
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12-common-u-boot.dtsi"
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#include "meson-sm1-u-boot.dtsi"
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ðmac {
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snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
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@@ -4,4 +4,4 @@
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12-common-u-boot.dtsi"
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#include "meson-sm1-u-boot.dtsi"
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20
arch/arm/dts/meson-sm1-u-boot.dtsi
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20
arch/arm/dts/meson-sm1-u-boot.dtsi
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@@ -0,0 +1,20 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12-common-u-boot.dtsi"
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&sd_emmc_a {
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compatible = "amlogic,meson-sm1-mmc";
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};
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&sd_emmc_b {
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compatible = "amlogic,meson-sm1-mmc";
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};
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&sd_emmc_c {
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compatible = "amlogic,meson-sm1-mmc";
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};
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@@ -38,6 +38,7 @@ static const struct meson_gx_soc_id {
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{ "G12A", 0x28 },
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{ "G12B", 0x29 },
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{ "SM1", 0x2b },
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{ "A1", 0x2c },
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};
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static const struct meson_gx_package_id {
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@@ -65,7 +66,11 @@ static const struct meson_gx_package_id {
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{ "S905X2", 0x28, 0x40, 0xf0 },
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{ "A311D", 0x29, 0x10, 0xf0 },
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{ "S922X", 0x29, 0x40, 0xf0 },
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{ "S905X3", 0x2b, 0x5, 0xf },
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{ "S905D3", 0x2b, 0x4, 0xf5 },
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{ "S905X3", 0x2b, 0x5, 0xf5 },
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{ "S905X3", 0x2b, 0x10, 0x3f },
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{ "S905D3", 0x2b, 0x30, 0x3f },
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{ "A113L", 0x2c, 0x0, 0xf8 },
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};
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DECLARE_GLOBAL_DATA_PTR;
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@@ -13,9 +13,17 @@
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#include <mmc.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/sd_emmc.h>
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#include <linux/delay.h>
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#include <linux/log2.h>
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#include "meson_gx_mmc.h"
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bool meson_gx_mmc_is_compatible(struct udevice *dev,
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enum meson_gx_mmc_compatible family)
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{
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enum meson_gx_mmc_compatible compat = dev_get_driver_data(dev);
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return compat == family;
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}
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static inline void *get_regbase(const struct mmc *mmc)
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{
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@@ -42,6 +50,8 @@ static void meson_mmc_config_clock(struct mmc *mmc)
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if (!mmc->clock)
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return;
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/* TOFIX This should use the proper clock taken from DT */
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/* 1GHz / CLK_MAX_DIV = 15,9 MHz */
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if (mmc->clock > 16000000) {
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clk = SD_EMMC_CLKSRC_DIV2;
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@@ -52,8 +62,16 @@ static void meson_mmc_config_clock(struct mmc *mmc)
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}
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clk_div = DIV_ROUND_UP(clk, mmc->clock);
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/* 180 phase core clock */
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meson_mmc_clk |= CLK_CO_PHASE_180;
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/*
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* SM1 SoCs doesn't work fine over 50MHz with CLK_CO_PHASE_180
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* If CLK_CO_PHASE_270 is used, it's more stable than other.
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* Other SoCs use CLK_CO_PHASE_180 by default.
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* It needs to find what is a proper value about each SoCs.
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*/
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if (meson_gx_mmc_is_compatible(mmc->dev, MMC_COMPATIBLE_SM1))
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meson_mmc_clk |= CLK_CO_PHASE_270;
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else
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meson_mmc_clk |= CLK_CO_PHASE_180;
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/* 180 phase tx clock */
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meson_mmc_clk |= CLK_TX_PHASE_000;
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@@ -308,8 +326,9 @@ int meson_mmc_bind(struct udevice *dev)
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}
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static const struct udevice_id meson_mmc_match[] = {
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{ .compatible = "amlogic,meson-gx-mmc" },
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{ .compatible = "amlogic,meson-axg-mmc" },
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{ .compatible = "amlogic,meson-gx-mmc", .data = MMC_COMPATIBLE_GX },
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{ .compatible = "amlogic,meson-axg-mmc", .data = MMC_COMPATIBLE_GX },
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{ .compatible = "amlogic,meson-sm1-mmc", .data = MMC_COMPATIBLE_SM1 },
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{ /* sentinel */ }
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};
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@@ -3,14 +3,16 @@
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* (C) Copyright 2016 Carlo Caione <carlo@caione.org>
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*/
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#ifndef __SD_EMMC_H__
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#define __SD_EMMC_H__
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#ifndef __MESON_GX_MMC_H__
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#define __MESON_GX_MMC_H__
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#include <mmc.h>
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#endif
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enum meson_gx_mmc_compatible {
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MMC_COMPATIBLE_GX,
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MMC_COMPATIBLE_SM1,
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};
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#define SDIO_PORT_A 0
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#define SDIO_PORT_B 1
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@@ -66,10 +66,10 @@ struct phy_meson_g12a_usb2_priv {
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static int phy_meson_g12a_usb2_power_on(struct phy *phy)
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{
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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struct udevice *dev = phy->dev;
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struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev);
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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if (priv->phy_supply) {
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int ret = regulator_set_enable(priv->phy_supply, true);
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if (ret)
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@@ -82,10 +82,10 @@ static int phy_meson_g12a_usb2_power_on(struct phy *phy)
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static int phy_meson_g12a_usb2_power_off(struct phy *phy)
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{
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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struct udevice *dev = phy->dev;
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struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev);
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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if (priv->phy_supply) {
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int ret = regulator_set_enable(priv->phy_supply, false);
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if (ret) {
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@@ -379,7 +379,9 @@ static int meson_dw_hdmi_probe(struct udevice *dev)
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struct meson_dw_hdmi *priv = dev_get_priv(dev);
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struct reset_ctl_bulk resets;
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struct clk_bulk clocks;
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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struct udevice *supply;
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#endif
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int ret;
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priv->dev = dev;
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