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board: stm32mp1: correct the property name for eth

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Use the correct name for STMicroelectronics phys config properties,
replace '_' by '-':
  "st,eth_clk_sel" => "st,eth-clk-sel"
  "st,eth-ref-clk-sel" => st,eth-clk-sel"

These property name are aligned with the upstreamed Linux kernel binding:
 linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml

See Linux kernel commit "dt-bindings: net: stmmac: add phys config
properties" merged in v5.1-rc1.

This patch allow to reuse the kernel device tree directly in U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Patrick Delaunay
2021-06-04 18:25:55 +02:00
committed by Patrice Chotard
parent 2dc41fccf3
commit 486808e354
2 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
board/dhelectronics/dh_stm32mp1/board.c
View File

@@ -660,11 +660,11 @@ int board_interface_eth_init(struct udevice *dev,
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
dev_read_bool(dev, "st,eth_ref_clk_sel");
dev_read_bool(dev, "st,eth-ref-clk-sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);

4
board/st/stm32mp1/stm32mp1.c
View File

@@ -733,11 +733,11 @@ int board_interface_eth_init(struct udevice *dev,
bool eth_ref_clk_sel_reg = false;
/* Gigabit Ethernet 125MHz clock selection. */
eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
/* Ethernet 50Mhz RMII clock selection */
eth_ref_clk_sel_reg =
dev_read_bool(dev, "st,eth_ref_clk_sel");
dev_read_bool(dev, "st,eth-ref-clk-sel");
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);