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am33xx: Correct gpmc_cfg->irqstatus/enable

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Based on our usage of the GPMC, either with NOR or NAND we do not need
to be setting the irqstatus or irqenable bits and should clear them like
we have historically.

Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
Tom Rini
2013-07-18 15:13:02 -04:00
parent ace4275eb3
commit 392bba4ad0
1 changed files with 2 additions and 2 deletions
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4
arch/arm/cpu/armv7/am33xx/mem.c
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@@ -69,8 +69,8 @@ void gpmc_init(void)
#endif
/* global settings */
writel(0x00000008, &gpmc_cfg->sysconfig);
writel(0x00000100, &gpmc_cfg->irqstatus);
writel(0x00000100, &gpmc_cfg->irqenable);
writel(0x00000000, &gpmc_cfg->irqstatus);
writel(0x00000000, &gpmc_cfg->irqenable);
writel(0x00000012, &gpmc_cfg->config);
/*
* Disable the GPMC0 config set by ROM code