dany/u-boot-megous
1
0
Fork 0
mirror of https://xff.cz/git/u-boot/ synced 2025-11-01 19:05:51 +01:00
Code Issues Packages Projects Releases Wiki Activity

ARM: imx: imx8m: Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options

Browse Source 
Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options for iMX8M SoCs
in case they should be operated faster, e.g. to improve boot time.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Marek Vasut
2022-01-25 03:48:06 +01:00
committed by Stefano Babic
parent 66e90be99f
commit 2c9d2acefa
1 changed files with 20 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
arch/arm/mach-imx/imx8m/clock_imx8mm.c
View File

@@ -248,6 +248,26 @@ int intpll_configure(enum pll_clocks pll, ulong freq)
pll_div_ctl_val = INTPLL_MAIN_DIV_VAL(0x12c) |
INTPLL_PRE_DIV_VAL(3) | INTPLL_POST_DIV_VAL(1);
break;
case MHZ(1400):
/* 24 * 0x15e / 3 / 2 ^ 1 */
pll_div_ctl_val = INTPLL_MAIN_DIV_VAL(0x15e) |
INTPLL_PRE_DIV_VAL(3) | INTPLL_POST_DIV_VAL(1);
break;
case MHZ(1500):
/* 24 * 0x177 / 3 / 2 ^ 1 */
pll_div_ctl_val = INTPLL_MAIN_DIV_VAL(0x177) |
INTPLL_PRE_DIV_VAL(3) | INTPLL_POST_DIV_VAL(1);
break;
case MHZ(1600):
/* 24 * 0xc8 / 3 / 2 ^ 0 */
pll_div_ctl_val = INTPLL_MAIN_DIV_VAL(0xc8) |
INTPLL_PRE_DIV_VAL(3) | INTPLL_POST_DIV_VAL(0);
break;
case MHZ(1800):
/* 24 * 0xe1 / 3 / 2 ^ 0 */
pll_div_ctl_val = INTPLL_MAIN_DIV_VAL(0xe1) |
INTPLL_PRE_DIV_VAL(3) | INTPLL_POST_DIV_VAL(0);
break;
case MHZ(2000):
/* 24 * 0xfa / 3 / 2 ^ 0 */
pll_div_ctl_val = INTPLL_MAIN_DIV_VAL(0xfa) |