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arch: arm: dts: ls1046a: sync serial nodes with Linux
Pick up the serial node descriptions from Linux v6.3 for the ls1046ardb and ls1046afrwy boards and their dependencies. Including the fsl,qoriq-clockgen.h and arm-gic.h headers forces us to change the include directives to explicitly go through the C preprocessor for all boards in the ls1046a SoC family. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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@@ -7,17 +7,37 @@
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*/
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/dts-v1/;
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/include/ "fsl-ls1046a.dtsi"
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#include "fsl-ls1046a.dtsi"
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/ {
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model = "LS1046A FRWY Board";
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aliases {
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spi0 = &qspi;
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serial0 = &duart0;
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serial1 = &duart1;
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serial2 = &duart2;
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serial3 = &duart3;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&duart2 {
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status = "okay";
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};
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&duart3 {
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status = "okay";
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};
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&qspi {
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status = "okay";
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@@ -7,7 +7,7 @@
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* Mingkai Hu <Mingkai.hu@nxp.com>
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*/
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/include/ "fsl-ls1046a.dtsi"
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#include "fsl-ls1046a.dtsi"
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/ {
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model = "LS1046A QDS Board";
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@@ -9,17 +9,29 @@
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*/
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/dts-v1/;
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/include/ "fsl-ls1046a.dtsi"
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#include "fsl-ls1046a.dtsi"
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/ {
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model = "LS1046A RDB Board";
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aliases {
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spi0 = &qspi;
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serial0 = &duart0;
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serial1 = &duart1;
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serial2 = &duart2;
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serial3 = &duart3;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&qspi {
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status = "okay";
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@@ -8,7 +8,9 @@
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* Mingkai Hu <mingkai.hu@nxp.com>
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*/
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/include/ "skeleton64.dtsi"
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#include "skeleton64.dtsi"
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#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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compatible = "fsl,ls1046a";
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@@ -222,29 +224,37 @@
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duart0: serial@21c0500 {
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x00 0x21c0500 0x0 0x100>;
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interrupts = <0 54 0x4>;
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clocks = <&clockgen 4 0>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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duart1: serial@21c0600 {
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x00 0x21c0600 0x0 0x100>;
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interrupts = <0 54 0x4>;
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clocks = <&clockgen 4 0>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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duart2: serial@21d0500 {
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x0 0x21d0500 0x0 0x100>;
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interrupts = <0 55 0x4>;
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clocks = <&clockgen 4 0>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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duart3: serial@21d0600 {
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x0 0x21d0600 0x0 0x100>;
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interrupts = <0 55 0x4>;
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clocks = <&clockgen 4 0>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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status = "disabled";
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};
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lpuart0: serial@2950000 {
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