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mirror of https://xff.cz/git/u-boot/ synced 2026-04-12 02:50:01 +02:00

arch: arm: dts: ls1046a: sync serial nodes with Linux

Pick up the serial node descriptions from Linux v6.3 for the ls1046ardb
and ls1046afrwy boards and their dependencies. Including the
fsl,qoriq-clockgen.h and arm-gic.h headers forces us to change the include
directives to explicitly go through the C preprocessor for all boards in
the ls1046a SoC family.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Camelia Groza
2023-06-16 16:18:35 +03:00
committed by Peng Fan
parent 3240f090fd
commit 250f745ae8
4 changed files with 54 additions and 12 deletions

View File

@@ -7,17 +7,37 @@
*/
/dts-v1/;
/include/ "fsl-ls1046a.dtsi"
#include "fsl-ls1046a.dtsi"
/ {
model = "LS1046A FRWY Board";
aliases {
spi0 = &qspi;
serial0 = &duart0;
serial1 = &duart1;
serial2 = &duart2;
serial3 = &duart3;
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&duart2 {
status = "okay";
};
&duart3 {
status = "okay";
};
&qspi {
status = "okay";

View File

@@ -7,7 +7,7 @@
* Mingkai Hu <Mingkai.hu@nxp.com>
*/
/include/ "fsl-ls1046a.dtsi"
#include "fsl-ls1046a.dtsi"
/ {
model = "LS1046A QDS Board";

View File

@@ -9,17 +9,29 @@
*/
/dts-v1/;
/include/ "fsl-ls1046a.dtsi"
#include "fsl-ls1046a.dtsi"
/ {
model = "LS1046A RDB Board";
aliases {
spi0 = &qspi;
serial0 = &duart0;
serial1 = &duart1;
serial2 = &duart2;
serial3 = &duart3;
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&qspi {
status = "okay";

View File

@@ -8,7 +8,9 @@
* Mingkai Hu <mingkai.hu@nxp.com>
*/
/include/ "skeleton64.dtsi"
#include "skeleton64.dtsi"
#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "fsl,ls1046a";
@@ -222,29 +224,37 @@
duart0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0500 0x0 0x100>;
interrupts = <0 54 0x4>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>;
status = "disabled";
};
duart1: serial@21c0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0600 0x0 0x100>;
interrupts = <0 54 0x4>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>;
status = "disabled";
};
duart2: serial@21d0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0500 0x0 0x100>;
interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>;
status = "disabled";
};
duart3: serial@21d0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0600 0x0 0x100>;
interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>;
status = "disabled";
};
lpuart0: serial@2950000 {