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mirror of https://xff.cz/git/u-boot/ synced 2025-08-31 08:12:06 +02:00

Add support for AXP805 on H6

This commit is contained in:
Ondrej Jirman
2019-07-21 08:33:52 +02:00
parent 2d112c0ee1
commit 2294329d17
8 changed files with 408 additions and 5 deletions

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@@ -215,6 +215,7 @@ enum sunxi_gpio_number {
#define SUN8I_A23_GPL_R_TWI 3
#define SUN8I_GPL_R_UART 2
#define SUN50I_GPL_R_TWI 2
#define SUN50I_H6_GPL_R_TWI 3
#define SUN9I_GPN_R_RSB 3

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@@ -303,6 +303,7 @@ config MACH_SUN50I_H6
select FIT
select SPL_LOAD_FIT
select DRAM_SUN50I_H6
select DM_I2C
endchoice
@@ -704,7 +705,7 @@ config I2C3_ENABLE
See I2C0_ENABLE help text.
endif
if SUNXI_GEN_SUN6I
if SUNXI_GEN_SUN6I || MACH_SUN50I_H6
config R_I2C_ENABLE
bool "Enable the PRCM I2C/TWI controller"
# This is used for the pmic on H3

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@@ -92,3 +92,23 @@ unsigned int clock_get_pll6(void)
/* The register defines PLL6-4X, not plain PLL6 */
return 24000000 / 4 * n / div1 / div2;
}
int clock_twi_onoff(int port, int state)
{
uint8_t* prcm_base = (uint8_t*)SUNXI_PRCM_BASE;
/* we only need port 5 on H6 (for AXP pmic) and enable */
if (port == 5 && state) {
//SUNXI_R_TWI_BASE
// reg 0x010 apb2 config/enable register
/* enable r_i2c clk and reset */
setbits_le32(prcm_base + 0x19c, BIT(0)); /* clk gate */
setbits_le32(prcm_base + 0x19c, BIT(16)); /* reset gate */
return 0;
}
return -1;
}

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@@ -17,6 +17,7 @@
#define AXP152_I2C_ADDR 0x30
#define AXP209_I2C_ADDR 0x34
#define AXP805_I2C_ADDR 0x36
#define AXP221_CHIP_ADDR 0x68
#define AXP221_CTRL_ADDR 0x3e
@@ -40,8 +41,8 @@ int pmic_bus_init(void)
p2wi_init();
ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
AXP221_INIT_DATA);
# elif defined CONFIG_MACH_SUN8I_R40
/* Nothing. R40 uses the AXP221s in I2C mode */
# elif defined CONFIG_MACH_SUN8I_R40 || defined CONFIG_MACH_SUN50I_H6
/* Nothing. R40 and H6 uses the AXP221s in I2C mode */
ret = 0;
# else
ret = rsb_init();
@@ -64,6 +65,8 @@ int pmic_bus_read(u8 reg, u8 *data)
return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1);
#elif defined CONFIG_AXP209_POWER
return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
#elif defined CONFIG_AXP809_POWER && defined CONFIG_MACH_SUN50I_H6
return i2c_read(AXP805_I2C_ADDR, reg, 1, data, 1);
#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
# ifdef CONFIG_MACH_SUN6I
return p2wi_read(reg, data);
@@ -81,6 +84,8 @@ int pmic_bus_write(u8 reg, u8 data)
return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1);
#elif defined CONFIG_AXP209_POWER
return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
#elif defined CONFIG_AXP809_POWER && defined CONFIG_MACH_SUN50I_H6
return i2c_write(AXP805_I2C_ADDR, reg, 1, &data, 1);
#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
# ifdef CONFIG_MACH_SUN6I
return p2wi_write(reg, data);

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@@ -184,12 +184,14 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_R_I2C_ENABLE
#ifdef CONFIG_MACH_SUN50I
clock_twi_onoff(5, 1);
#ifdef CONFIG_MACH_SUN50I
sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
#elif defined CONFIG_MACH_SUN50I_H6
sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN50I_H6_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN50I_H6_GPL_R_TWI);
#else
clock_twi_onoff(5, 1);
sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
#endif

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@@ -46,6 +46,13 @@ config AXP221_POWER
Select this to enable support for the axp221/axp223 pmic found on most
A23 and A31 boards.
config AXP806_POWER
bool "axp806 pmic support"
depends on MACH_SUN50I_H6
select AXP_PMIC_BUS
---help---
Say y here to enable support for the axp806 pmic found on H6 boards.
config AXP809_POWER
bool "axp809 pmic support"
depends on MACH_SUN9I

308
drivers/power/axp806.c Normal file
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@@ -0,0 +1,308 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* AXP806 driver
*
*
* (C) Copyright 2019 Ondrej Jirman <megous@megous.com>
*
* Based on axp809.c
* (C) Copyright 2016 Chen-Yu Tsai <wens@csie.org>
*/
#include <common.h>
#include <errno.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pmic_bus.h>
#include <axp_pmic.h>
/*
static const struct regulator_linear_range axp806_dcdca_ranges[] = {
REGULATOR_LINEAR_RANGE(600000,
AXP806_DCDCA_600mV_START,
AXP806_DCDCA_600mV_END,
10000),
REGULATOR_LINEAR_RANGE(1120000,
AXP806_DCDCA_1120mV_START,
AXP806_DCDCA_1120mV_END,
20000),
};
static const struct regulator_linear_range axp806_dcdcd_ranges[] = {
REGULATOR_LINEAR_RANGE(600000,
AXP806_DCDCD_600mV_START,
AXP806_DCDCD_600mV_END,
20000),
REGULATOR_LINEAR_RANGE(1600000,
AXP806_DCDCD_1600mV_START,
AXP806_DCDCD_1600mV_END,
100000),
};
static const struct regulator_desc axp806_regulators[] = {
AXP_DESC_RANGES(AXP806, DCDCA, "dcdca", "vina",
axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES,
AXP806_DCDCA_V_CTRL, AXP806_DCDCA_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCA_MASK),
AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50,
AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCB_MASK),
AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc",
axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES,
AXP806_DCDCC_V_CTRL, AXP806_DCDCC_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCC_MASK),
AXP_DESC_RANGES(AXP806, DCDCD, "dcdcd", "vind",
axp806_dcdcd_ranges, AXP806_DCDCD_NUM_VOLTAGES,
AXP806_DCDCD_V_CTRL, AXP806_DCDCD_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCD_MASK),
AXP_DESC(AXP806, DCDCE, "dcdce", "vine", 1100, 3400, 100,
AXP806_DCDCE_V_CTRL, AXP806_DCDCE_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCE_MASK),
AXP_DESC(AXP806, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
AXP806_ALDO1_V_CTRL, AXP806_ALDO1_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO1_MASK),
AXP_DESC(AXP806, ALDO2, "aldo2", "aldoin", 700, 3400, 100,
AXP806_ALDO2_V_CTRL, AXP806_ALDO2_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO2_MASK),
AXP_DESC(AXP806, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
AXP806_ALDO3_V_CTRL, AXP806_ALDO3_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO3_MASK),
AXP_DESC(AXP806, BLDO1, "bldo1", "bldoin", 700, 1900, 100,
AXP806_BLDO1_V_CTRL, AXP806_BLDO1_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO1_MASK),
AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100,
AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO2_MASK),
AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100,
AXP806_BLDO3_V_CTRL, AXP806_BLDO3_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO3_MASK),
AXP_DESC(AXP806, BLDO4, "bldo4", "bldoin", 700, 1900, 100,
AXP806_BLDO4_V_CTRL, AXP806_BLDO4_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO4_MASK),
AXP_DESC(AXP806, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
AXP806_CLDO1_V_CTRL, AXP806_CLDO1_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO1_MASK),
AXP_DESC_RANGES(AXP806, CLDO2, "cldo2", "cldoin",
axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
AXP806_CLDO2_V_CTRL, AXP806_CLDO2_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO2_MASK),
AXP_DESC(AXP806, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
AXP806_CLDO3_V_CTRL, AXP806_CLDO3_V_CTRL_MASK,
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO3_MASK),
AXP_DESC_SW(AXP806, SW, "sw", "swin",
AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_SW_MASK),
};
*/
static u8 axp806_mvolt_to_cfg(int mvolt, int min, int max, int div)
{
if (mvolt < min)
mvolt = min;
else if (mvolt > max)
mvolt = max;
return (mvolt - min) / div;
}
int axp_set_dcdc1(unsigned int mvolt)
{
int ret;
u8 cfg = axp806_mvolt_to_cfg(mvolt, 1600, 3400, 100);
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC1_EN);
ret = pmic_bus_write(AXP806_DCDC1_CTRL, cfg);
if (ret)
return ret;
ret = pmic_bus_setbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_DC1SW_EN);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC1_EN);
}
int axp_set_dcdc2(unsigned int mvolt)
{
int ret;
u8 cfg = axp806_mvolt_to_cfg(mvolt, 600, 1540, 20);
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC2_EN);
ret = pmic_bus_write(AXP806_DCDC2_CTRL, cfg);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC2_EN);
}
int axp_set_dcdc3(unsigned int mvolt)
{
int ret;
u8 cfg = axp806_mvolt_to_cfg(mvolt, 600, 1860, 20);
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC3_EN);
ret = pmic_bus_write(AXP806_DCDC3_CTRL, cfg);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC3_EN);
}
int axp_set_dcdc4(unsigned int mvolt)
{
int ret;
u8 cfg = axp806_mvolt_to_cfg(mvolt, 600, 1540, 20);
if (mvolt >= 1540)
cfg = 0x30 + axp806_mvolt_to_cfg(mvolt, 1800, 2600, 100);
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC4_EN);
ret = pmic_bus_write(AXP806_DCDC5_CTRL, cfg);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC4_EN);
}
int axp_set_dcdc5(unsigned int mvolt)
{
int ret;
u8 cfg = axp806_mvolt_to_cfg(mvolt, 1000, 2550, 50);
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC5_EN);
ret = pmic_bus_write(AXP806_DCDC5_CTRL, cfg);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_DCDC5_EN);
}
int axp_set_aldo(int aldo_num, unsigned int mvolt)
{
int ret;
u8 cfg;
if (aldo_num < 1 || aldo_num > 3)
return -EINVAL;
if (mvolt == 0 && aldo_num == 3)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_ALDO3_EN);
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
cfg = axp806_mvolt_to_cfg(mvolt, 700, 3300, 100);
ret = pmic_bus_write(AXP806_ALDO1_CTRL + (aldo_num - 1), cfg);
if (ret)
return ret;
if (aldo_num == 3)
return pmic_bus_setbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_ALDO3_EN);
return pmic_bus_setbits(AXP806_OUTPUT_CTRL1,
AXP806_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
}
/* TODO: re-work other AXP drivers to consolidate ALDO functions. */
int axp_set_aldo1(unsigned int mvolt)
{
return axp_set_aldo(1, mvolt);
}
int axp_set_aldo2(unsigned int mvolt)
{
return axp_set_aldo(2, mvolt);
}
int axp_set_aldo3(unsigned int mvolt)
{
return axp_set_aldo(3, mvolt);
}
int axp_set_dldo(int dldo_num, unsigned int mvolt)
{
u8 cfg = axp806_mvolt_to_cfg(mvolt, 700, 3300, 100);
int ret;
if (dldo_num < 1 || dldo_num > 2)
return -EINVAL;
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1));
if (dldo_num == 1 && mvolt > 3300)
cfg += 1 + axp806_mvolt_to_cfg(mvolt, 3400, 4200, 200);
ret = pmic_bus_write(AXP806_DLDO1_CTRL + (dldo_num - 1), cfg);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1));
}
int axp_set_eldo(int eldo_num, unsigned int mvolt)
{
int ret;
u8 cfg = axp806_mvolt_to_cfg(mvolt, 700, 3300, 100);
if (eldo_num < 1 || eldo_num > 3)
return -EINVAL;
if (mvolt == 0)
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1));
ret = pmic_bus_write(AXP806_ELDO1_CTRL + (eldo_num - 1), cfg);
if (ret)
return ret;
return pmic_bus_setbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1));
}
int axp_set_sw(bool on)
{
if (on)
return pmic_bus_setbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_SWOUT_EN);
return pmic_bus_clrbits(AXP806_OUTPUT_CTRL2,
AXP806_OUTPUT_CTRL2_SWOUT_EN);
}
int axp_init(void)
{
return pmic_bus_init();
}
int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
pmic_bus_write(AXP806_SHUTDOWN, AXP806_SHUTDOWN_POWEROFF);
/* infinite loop during shutdown */
while (1) {}
/* not reached */
return 0;
}

59
include/axp806.h Normal file
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@@ -0,0 +1,59 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2019 Ondrej Jirman <megous@megous.com>
*
* X-Powers AXP806 Power Management IC driver
*/
#define AXP806_CHIP_ID 0x03
#define AXP806_OUTPUT_CTRL1 0x10
#define AXP806_OUTPUT_CTRL1_DC5LDO_EN (1 << 0)
#define AXP806_OUTPUT_CTRL1_DCDC1_EN (1 << 1)
#define AXP806_OUTPUT_CTRL1_DCDC2_EN (1 << 2)
#define AXP806_OUTPUT_CTRL1_DCDC3_EN (1 << 3)
#define AXP806_OUTPUT_CTRL1_DCDC4_EN (1 << 4)
#define AXP806_OUTPUT_CTRL1_DCDC5_EN (1 << 5)
#define AXP806_OUTPUT_CTRL1_ALDO1_EN (1 << 6)
#define AXP806_OUTPUT_CTRL1_ALDO2_EN (1 << 7)
#define AXP806_OUTPUT_CTRL2 0x12
#define AXP806_OUTPUT_CTRL2_ELDO1_EN (1 << 0)
#define AXP806_OUTPUT_CTRL2_ELDO2_EN (1 << 1)
#define AXP806_OUTPUT_CTRL2_ELDO3_EN (1 << 2)
#define AXP806_OUTPUT_CTRL2_DLDO1_EN (1 << 3)
#define AXP806_OUTPUT_CTRL2_DLDO2_EN (1 << 4)
#define AXP806_OUTPUT_CTRL2_ALDO3_EN (1 << 5)
#define AXP806_OUTPUT_CTRL2_SWOUT_EN (1 << 6)
#define AXP806_OUTPUT_CTRL2_DC1SW_EN (1 << 7)
#define AXP806_DLDO1_CTRL 0x15
#define AXP806_DLDO2_CTRL 0x16
#define AXP806_ELDO1_CTRL 0x19
#define AXP806_ELDO2_CTRL 0x1a
#define AXP806_ELDO3_CTRL 0x1b
#define AXP806_DC5LDO_CTRL 0x1c
#define AXP806_DCDC1_CTRL 0x21
#define AXP806_DCDC2_CTRL 0x22
#define AXP806_DCDC3_CTRL 0x23
#define AXP806_DCDC4_CTRL 0x24
#define AXP806_DCDC5_CTRL 0x25
#define AXP806_ALDO1_CTRL 0x28
#define AXP806_ALDO2_CTRL 0x29
#define AXP806_ALDO3_CTRL 0x2a
#define AXP806_SHUTDOWN 0x32
#define AXP806_SHUTDOWN_POWEROFF (1 << 7)
/* For axp_gpio.c */
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5)
#define AXP_VBUS_IPSOUT 0x30
#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2)
#define AXP_MISC_CTRL 0x8f
#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4)
#define AXP_GPIO0_CTRL 0x90
#define AXP_GPIO1_CTRL 0x92
#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */
#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */
#define AXP_GPIO_STATE 0x94
#define AXP_GPIO_STATE_OFFSET 0