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sf: Respect maximum SPI write size

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Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2013-03-11 06:08:06 +00:00
parent 0c456cee95
commit 1e566bc6db
1 changed files with 8 additions and 2 deletions
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10
drivers/mtd/spi/spi_flash.c
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@@ -87,6 +87,9 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
for (actual = 0; actual < len; actual += chunk_len) {
chunk_len = min(len - actual, page_size - byte_addr);
if (flash->spi->max_write_size)
chunk_len = min(chunk_len, flash->spi->max_write_size);
cmd[1] = page_addr >> 8;
cmd[2] = page_addr;
cmd[3] = byte_addr;
@@ -111,8 +114,11 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
if (ret)
break;
page_addr++;
byte_addr = 0;
byte_addr += chunk_len;
if (byte_addr == page_size) {
page_addr++;
byte_addr = 0;
}
}
debug("SF: program %s %zu bytes @ %#x\n",