orange-pi-zero2: Added wifi firmware

Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Add UWE5622 wifi driver and required firmwmare
2025-07-16 13:59:46 +02:00 · 2023-02-02 20:35:35 +01:00 · 2023-02-02 20:35:35 +01:00 · 2023-02-02 20:35:35 +01:00 · 2023-02-02 20:35:30 +01:00 · 2023-01-31 08:38:29 +01:00
60 changed files with 225613 additions and 183 deletions
--- a/classes/sdcard_image-sunxi.bbclass
+++ b/classes/sdcard_image-sunxi.bbclass
@ -13,8 +13,11 @@ inherit image_types
 #
 #

+# Use an uncompressed ext4 by default as rootfs
+SDIMG_ROOTFS_TYPE ?= "ext4"
+
 # This image depends on the rootfs image
-IMAGE_TYPEDEP_sunxi-sdimg = "${SDIMG_ROOTFS_TYPE}"
+IMAGE_TYPEDEP:sunxi-sdimg = "${SDIMG_ROOTFS_TYPE}"

 # Boot partition volume id
 BOOTDD_VOLUME_ID ?= "boot"
@ -25,8 +28,6 @@ BOOT_SPACE ?= "40960"
 # First partition begin at sector 2048 : 2048*1024 = 2097152
 IMAGE_ROOTFS_ALIGNMENT = "2048"

-# Use an uncompressed ext4 by default as rootfs
-SDIMG_ROOTFS_TYPE ?= "ext4"
 SDIMG_ROOTFS = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.${SDIMG_ROOTFS_TYPE}"

 do_image_sunxi_sdimg[depends] += " \
@ -40,7 +41,7 @@ do_image_sunxi_sdimg[depends] += " \
 # SD card image name
 SDIMG = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.sunxi-sdimg"

-IMAGE_CMD_sunxi-sdimg () {
+IMAGE_CMD:sunxi-sdimg () {

 	# Align partitions
 	BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE} + ${IMAGE_ROOTFS_ALIGNMENT} - 1)
@ -120,7 +121,7 @@ IMAGE_CMD_sunxi-sdimg () {
 }

 # write uboot.itb for arm64 boards
-IMAGE_CMD_sunxi-sdimg_append_sun50i () {
+IMAGE_CMD_sunxi-sdimg:append:sun50i () {
 	if [ -e "${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY}" ]
 	then
 		dd if=${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY} of=${SDIMG} bs=1024 seek=40 conv=notrunc
--- a/conf/layer.conf
+++ b/conf/layer.conf
@ -12,6 +12,6 @@ BBFILE_PRIORITY_meta-sunxi = "10"
 # cause compatibility issues with other layers
 LAYERVERSION_meta-sunxi = "1"

-LAYERDEPENDS_meta-sunxi = "core openembedded-layer"
+LAYERDEPENDS_meta-sunxi = "core meta-python"

-LAYERSERIES_COMPAT_meta-sunxi = "zeus dunfell gatesgarth hardknott"
+LAYERSERIES_COMPAT_meta-sunxi = "honister kirkstone"
--- a/conf/machine/include/hardware/ap6212a.inc
+++ b/conf/machine/include/hardware/ap6212a.inc
@ -1,5 +1,5 @@
 # Include for boards with AMPAK 6212A Wifi / Bluetooth module
 # https://linux-sunxi.org/Wifi#Ampak

-MACHINE_EXTRA_RRECOMMENDS_append = " kernel-module-brcmfmac"
-MACHINE_EXTRA_RDEPENDS_append = " linux-firmware-bcm43430"
+MACHINE_EXTRA_RRECOMMENDS:append = " kernel-module-brcmfmac"
+MACHINE_EXTRA_RDEPENDS:append = " linux-firmware-bcm43430"
--- a/conf/machine/include/sun4i.inc
+++ b/conf/machine/include/sun4i.inc
@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa8.inc
+require conf/machine/include/arm/armv7a/tune-cortexa8.inc

 SOC_FAMILY = "sun4i"
--- a/conf/machine/include/sun50i.inc
+++ b/conf/machine/include/sun50i.inc
@ -1,6 +1,6 @@
 require conf/machine/include/sunxi64.inc

 DEFAULTTUNE ?= "cortexa53-crypto"
-require conf/machine/include/tune-cortexa53.inc
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc

 SOC_FAMILY = "sun50i"
--- a/conf/machine/include/sun5i.inc
+++ b/conf/machine/include/sun5i.inc
@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa8.inc
+require conf/machine/include/arm/armv7a/tune-cortexa8.inc

 SOC_FAMILY = "sun5i"
--- a/conf/machine/include/sun7i.inc
+++ b/conf/machine/include/sun7i.inc
@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa7.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc

 SOC_FAMILY = "sun7i"
--- a/conf/machine/include/sun8i.inc
+++ b/conf/machine/include/sun8i.inc
@ -1,5 +1,5 @@
 require conf/machine/include/sunxi.inc
 require conf/machine/include/sunxi-mali.inc
-require conf/machine/include/tune-cortexa7.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc

 SOC_FAMILY = "sun8i"
--- a/conf/machine/include/sunxi-mali-driver.inc
+++ b/conf/machine/include/sunxi-mali-driver.inc
@ -4,7 +4,7 @@ PREFERRED_PROVIDER_virtual/libgles1 ?= "sunxi-mali"
 PREFERRED_PROVIDER_virtual/libgles2 ?= "sunxi-mali"
 PREFERRED_PROVIDER_virtual/egl ?= "sunxi-mali"

-PACKAGECONFIG_remove_pn-xserver-xorg = "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'glamor', '', d)}"
+PACKAGECONFIG:remove:pn-xserver-xorg = "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'glamor', '', d)}"

 XSERVER += "sunxi-mali \
            sunxi-mali-dev"
--- a/conf/machine/include/sunxi.inc
+++ b/conf/machine/include/sunxi.inc
@ -9,13 +9,12 @@ MACHINE_SOCARCH_SUFFIX_sun4i = "-sun4i"

 PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
 XSERVER = "xserver-xorg \
-           xf86-video-fbturbo \
           xf86-input-evdev \
           xf86-input-mouse \
           xf86-input-keyboard"

 PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
-PREFERRED_VERSION_linux-mainline ?= "5.4.%"
+PREFERRED_VERSION_linux-mainline ?= "5.15.%"
 PREFERRED_PROVIDER_u-boot ?= "u-boot"
 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"

--- a/conf/machine/include/sunxi64.inc
+++ b/conf/machine/include/sunxi64.inc
@ -19,7 +19,7 @@ UBOOT_LOCALVERSION = "-g${@d.getVar('SRCPV', True).partition('+')[2][0:7]}"
 UBOOT_ENTRYPOINT ?= "0x40008000"
 UBOOT_LOADADDRESS ?= "0x400080OB00"

-UBOOT_BINARY ?= "u-boot.itb"
+#UBOOT_BINARY ?= "u-boot.itb"
 SPL_BINARY ?= "spl/sunxi-spl.bin"

 SERIAL_CONSOLE ?= "115200 ttyS0"
--- a/conf/machine/nanopi-duo2.conf
+++ b/conf/machine/nanopi-duo2.conf
@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: nanopi-duo2
+#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi Duo2, based on the Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-nanopi-duo2.dtb"
+UBOOT_MACHINE = "nanopi_duo2_defconfig"
+
--- a/conf/machine/nanopi-r1.conf
+++ b/conf/machine/nanopi-r1.conf
@ -0,0 +1,8 @@
+#@TYPE: Machine
+#@NAME: NanoPi R1
+#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi R1, based on #the Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-nanopi-r1.dtb"
+UBOOT_MACHINE = "nanopi_r1_defconfig"
--- a/conf/machine/orange-pi-one-plus.conf
+++ b/conf/machine/orange-pi-one-plus.conf
@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: orange-pi-one-plus
+#@DESCRIPTION: Machine configuration for the Orange Pi One Plus, based on Allwinner H6 CPU
+
+
+require conf/machine/include/sun50i.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h6-orangepi-one-plus.dtb"
+UBOOT_MACHINE = "orangepi_one_plus_defconfig"
--- a/conf/machine/orange-pi-pc2.conf
+++ b/conf/machine/orange-pi-pc2.conf
@ -0,0 +1,8 @@
+#@TYPE: Machine
+#@NAME: orangepi-pc2
+#@DESCRIPTION: Machine configuration for the orangepi-pc2, based on Allwinner A64 CPU
+
+require conf/machine/include/sun50i.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h5-orangepi-pc2.dtb"
+UBOOT_MACHINE = "orangepi_pc2_defconfig"
--- a/conf/machine/orange-pi-r1.conf
+++ b/conf/machine/orange-pi-r1.conf
@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: orange-pi-r1
+#@DESCRIPTION: Machine configuration for the orange-pi-r1, base on allwinner H2+ CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h2-plus-orangepi-r1.dtb"
+UBOOT_MACHINE = "orangepi_r1_defconfig"
+
--- a/conf/machine/orange-pi-zero2.conf
+++ b/conf/machine/orange-pi-zero2.conf
@ -0,0 +1,14 @@
+#@TYPE: Machine
+#@NAME: orange-pi-zero-2
+#@DESCRIPTION: Machine configuration for the orange-pi-zero-2, based on Allwinner H616 CPU
+
+require conf/machine/include/sun50i.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h616-orangepi-zero2.dtb"
+UBOOT_MACHINE = "orangepi_zero2_defconfig"
+
+# as for now neither graphics nor audio is supported
+MACHINE_FEATURES:remove = "alsa x11"
+MACHINE_FEATURES:append = "bluetooth wifi"
+
+MACHINE_EXTRA_RRECOMMENDS = "uwe5622-firmware"
--- a/recipes-bsp/atf/atf-sunxi/0001-Use-same-type-as-in-declaration.patch
+++ b/recipes-bsp/atf/atf-sunxi/0001-Use-same-type-as-in-declaration.patch
@ -0,0 +1,26 @@
+From 087b9306659effac870b4794c0f775ce3d7208c5 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Wed, 13 Apr 2022 08:09:29 +0200
+Subject: [PATCH] Use same type as in declaration
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ services/std_svc/psci/psci_common.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c
+index 75f52f538..918a719f6 100644
+--- a/services/std_svc/psci/psci_common.c
+++ b/services/std_svc/psci/psci_common.c
+@@ -261,7 +261,7 @@ void psci_acquire_afflvl_locks(int start_afflvl,
+  ******************************************************************************/
+ void psci_release_afflvl_locks(int start_afflvl,
+ 			       int end_afflvl,
+-			       aff_map_node_t *mpidr_nodes[])
+			       mpidr_aff_map_nodes_t mpidr_nodes)
+ {
+ 	int level;
+ 
+-- 
+2.25.1
+
--- a/recipes-bsp/atf/atf-sunxi_git.bb
+++ b/recipes-bsp/atf/atf-sunxi_git.bb
@ -1,16 +1,18 @@
 DESCRIPTION = "ARM Trusted Firmware Allwinner"
-LICENSE = "BSD"
+LICENSE = "BSD-3-Clause"
 LIC_FILES_CHKSUM = "file://license.md;md5=829bdeb34c1d9044f393d5a16c068371"

-SRC_URI = "git://github.com/apritzel/arm-trusted-firmware;nobranch=1"
+SRC_URI = "git://github.com/apritzel/arm-trusted-firmware;nobranch=1;protocol=https"
 SRCREV = "aa75c8da415158a94b82a430b2b40000778e851f"

+SRC_URI:append = " file://0001-Use-same-type-as-in-declaration.patch"
+
 S = "${WORKDIR}/git"
 B = "${WORKDIR}/build"

 COMPATIBLE_MACHINE = "(sun50i)"

-PLATFORM_sun50i = "sun50iw1p1"
+PLATFORM:sun50i = "sun50iw1p1"

 LDFLAGS[unexport] = "1"

--- a/recipes-bsp/sunxi-board-fex/sunxi-board-fex.bb
+++ b/recipes-bsp/sunxi-board-fex/sunxi-board-fex.bb
@ -9,9 +9,9 @@ PR = "r0"

 COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i)"

-SRC_URI = "git://github.com/linux-sunxi/sunxi-boards.git;protocol=git"
+SRC_URI = "git://github.com/linux-sunxi/sunxi-boards.git;protocol=https;branch=master"
 # Increase PV with SRCREV change
-SRCREV = "496ef0fbd166cc2395daa76dd3c359357420963d"
+SRCREV = "af5f938ea14a3614d35ad3d9ab51a5d392117444"

 S = "${WORKDIR}/git"

--- a/recipes-bsp/u-boot/files/0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch
+++ b/recipes-bsp/u-boot/files/0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch
@ -1,20 +1,21 @@
-From b1e4b9672d7bdd4a6a4d08b1514b46af25996cc8 Mon Sep 17 00:00:00 2001
+From 6a64d90ca4d976c16a2e102dbad0848e4d29776c Mon Sep 17 00:00:00 2001
 From: Florin Sarbu <florin@resin.io>
 Date: Wed, 12 Sep 2018 14:22:49 +0200
 Subject: [PATCH] nanopi_neo_air_defconfig: Enable eMMC support

 Upstream-status: Pending
 Signed-off-by: Florin Sarbu <florin@resin.io>
+
 ---
 configs/nanopi_neo_air_defconfig | 1 +
 1 file changed, 1 insertion(+)

 diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig
-index baaccf145e..77fa1489e4 100644
+index 806d95c1cc..8899cc3a15 100644
 --- a/configs/nanopi_neo_air_defconfig
 +++ b/configs/nanopi_neo_air_defconfig
-@@ -9,3 +9,4 @@ CONFIG_CONSOLE_MUX=y
- CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air"
+@@ -9,3 +9,4 @@ CONFIG_DRAM_CLK=408
+ CONFIG_CONSOLE_MUX=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2
--- a/recipes-bsp/u-boot/files/0002-Added-nanopi-r1-board-support.patch
+++ b/recipes-bsp/u-boot/files/0002-Added-nanopi-r1-board-support.patch
@ -0,0 +1,167 @@
+From 767a05572ef5b93c2e157749b1754cbe261ee43d Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Fri, 8 Apr 2022 11:33:53 +0200
+Subject: [PATCH] Added nanopi-r1 board support
+
+Patch taken from : https://github.com/armbian/build/blob/master/patch/u-boot/u-boot-sunxi/add-nanopi-r1-and-duo2.patch
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ arch/arm/dts/Makefile               |   1 +
+ arch/arm/dts/sun8i-h3-nanopi-r1.dts | 102 ++++++++++++++++++++++++++++++++++++
+ configs/nanopi_r1_defconfig         |  22 ++++++++
+ 3 files changed, 125 insertions(+)
+ create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts
+ create mode 100644 configs/nanopi_r1_defconfig
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 9fb3868..6743e32 100644
+--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
+@@ -600,6 +600,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
+ 	sun8i-h3-nanopi-m1-plus.dtb \
+ 	sun8i-h3-nanopi-neo.dtb \
+ 	sun8i-h3-nanopi-neo-air.dtb \
+	sun8i-h3-nanopi-r1.dtb \
+ 	sun8i-h3-orangepi-2.dtb \
+ 	sun8i-h3-orangepi-lite.dtb \
+ 	sun8i-h3-orangepi-one.dtb \
+diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+new file mode 100644
+index 0000000..9c3c574
+--- /dev/null
+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun8i-h3-nanopi.dtsi"
+
+/ {
+	model = "FriendlyARM NanoPi R1";
+	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
+
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		enable-active-high;
+		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+	};
+
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&pio {
+	gmac_power_pin_nanopi: gmac_power_pin@0 {
+		pins = "PD6";
+		function = "gpio_out";
+	};
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_8bit_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <8>;
+	non-removable;
+	cap-mmc-hw-reset;
+	status = "okay";
+};
+
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-supply = <&reg_gmac_3v3>;
+	phy-handle = <&ext_rgmii_phy>;
+	phy-mode = "rgmii";
+
+	status = "okay";
+};
+
+&external_mdio {
+	ext_rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <7>;
+	};
+};
+diff --git a/configs/nanopi_r1_defconfig b/configs/nanopi_r1_defconfig
+new file mode 100644
+index 0000000..e028b41
+--- /dev/null
+++ b/configs/nanopi_r1_defconfig
+@@ -0,0 +1,22 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=408
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MACPWR="PD6"
+# CONFIG_VIDEO_DE2 is not set
+CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CLK_FREQ=480000000
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-r1"
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+-- 
+2.7.4
+
--- a/recipes-bsp/u-boot/files/0003-Add-nanopi-duo2-board-support.patch
+++ b/recipes-bsp/u-boot/files/0003-Add-nanopi-duo2-board-support.patch
@ -0,0 +1,28 @@
+diff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig
+new file mode 100644
+index 0000000..1e51018
+--- /dev/null
+++ b/configs/nanopi_duo2_defconfig
+@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SYS_TEXT_BASE=0x4a000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=408
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+# CONFIG_VIDEO_DE2 is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-duo2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL=y
+CONFIG_SYS_CLK_FREQ=480000000
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SPL_SPI_SUNXI=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+
--- a/recipes-bsp/u-boot/files/0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch
+++ b/recipes-bsp/u-boot/files/0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch
@ -0,0 +1,32 @@
+From eb31a4a141bf401f92426bd053a965022e47290d Mon Sep 17 00:00:00 2001
+From: Chris Morgan <macromorgan@hotmail.com>
+Date: Fri, 7 Jan 2022 11:52:54 -0600
+Subject: [PATCH] i2c: mvtwsi: Add compatible string for allwinner,
+ sun4i-a10-i2c
+
+This adds a compatible string for the Allwinner Sun4i-A10 I2C
+controller. Without this, boards based on the R8 and A13 (at a
+minimum) fail to boot.
+
+Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
+Acked-by: Akash Gajjar <gajjar04akash@gmail.com>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+---
+ drivers/i2c/mvtwsi.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
+index bad4b1484f..f48a4f25aa 100644
+--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
+@@ -900,6 +900,7 @@ static const struct dm_i2c_ops mvtwsi_i2c_ops = {
+ static const struct udevice_id mvtwsi_i2c_ids[] = {
+ 	{ .compatible = "marvell,mv64xxx-i2c", },
+ 	{ .compatible = "marvell,mv78230-i2c", },
+	{ .compatible = "allwinner,sun4i-a10-i2c", },
+ 	{ .compatible = "allwinner,sun6i-a31-i2c", },
+ 	{ /* sentinel */ }
+ };
+-- 
+2.34.1
+
--- a/recipes-bsp/u-boot/u-boot-sunxi.bb
+++ b/recipes-bsp/u-boot/u-boot-sunxi.bb
@ -2,7 +2,7 @@ DESCRIPTION = "U-Boot port for sunxi"

 require recipes-bsp/u-boot/u-boot.inc

-LICENSE = "GPLv2"
+LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263"

 # No patches for other machines yet
@ -19,7 +19,7 @@ UBOOT_MACHINE_olinuxino-a10s = "A10s-OLinuXino-Micro_config"
 UBOOT_MACHINE_meleg = "Mele_A1000G_config"

 SRC_URI = " \
-	git://github.com/linux-sunxi/u-boot-sunxi.git;protocol=git;branch=sunxi \
+	git://github.com/linux-sunxi/u-boot-sunxi.git;protocol=https;branch=sunxi \
 	file://0001-gcc5-fixes.patch \
 	file://0002-gcc6-fixes.patch \
 	file://0003-No-gcc-version-specific-includes.patch \
--- a/recipes-bsp/u-boot/u-boot_%.bbappend
+++ b/recipes-bsp/u-boot/u-boot_%.bbappend
@ -1,29 +1,32 @@
-FILESEXTRAPATHS_prepend_sunxi := "${THISDIR}/files:"
+FILESEXTRAPATHS:prepend:sunxi := "${THISDIR}/files:"

-DEPENDS_append_sunxi = " bc-native dtc-native swig-native python3-native flex-native bison-native "
-DEPENDS_append_sun50i = " atf-sunxi "
+DEPENDS:append:sunxi = " bc-native dtc-native swig-native python3-native flex-native bison-native "
+DEPENDS:append:sun50i = " atf-sunxi "

-COMPATIBLE_MACHINE_sunxi = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
+COMPATIBLE_MACHINE:sunxi = "(sun4i|sun5i|sun7i|sun8i|sun50i)"

-DEFAULT_PREFERENCE_sun4i="1"
-DEFAULT_PREFERENCE_sun5i="1"
-DEFAULT_PREFERENCE_sun7i="1"
-DEFAULT_PREFERENCE_sun8i="1"
-DEFAULT_PREFERENCE_sun50i="1"
+DEFAULT_PREFERENCE:sun4i = "1"
+DEFAULT_PREFERENCE:sun5i = "1"
+DEFAULT_PREFERENCE:sun7i = "1"
+DEFAULT_PREFERENCE:sun8i = "1"
+DEFAULT_PREFERENCE:sun50i = "1"

-SRC_URI_append_sunxi = " \
-           file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
-           file://boot.cmd \
-           "
+SRC_URI:append:sunxi = " \
+        file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
+	file://0002-Added-nanopi-r1-board-support.patch \
+	file://0003-Add-nanopi-duo2-board-support.patch \
+	file://0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch \
+        file://boot.cmd \
+"

-UBOOT_ENV_SUFFIX_sunxi = "scr"
-UBOOT_ENV_sunxi = "boot"
+UBOOT_ENV_SUFFIX:sunxi = "scr"
+UBOOT_ENV:sunxi = "boot"

-EXTRA_OEMAKE_append_sunxi = ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" '
-EXTRA_OEMAKE_append_sun50i = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin "
+EXTRA_OEMAKE:append:sunxi = ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" '
+EXTRA_OEMAKE:append:sun50i = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin SCP=/dev/null"

 do_compile_sun50i[depends] += "atf-sunxi:do_deploy"

-do_compile_append_sunxi() {
+do_compile:append:sunxi() {
    ${B}/tools/mkimage -C none -A arm -T script -d ${WORKDIR}/boot.cmd ${WORKDIR}/${UBOOT_ENV_BINARY}
 }
--- a/recipes-devtools/python/pya20_0.2.12.bb
+++ b/recipes-devtools/python/pya20_0.2.12.bb
@ -1,7 +1,7 @@
 DESCRIPTION = "A module to control Allwinner GPIO,SPI and I2C channels"
 HOMEPAGE = "https://pypi.python.org/pypi/pyA20"
 SECTION = "devel/python"
-LICENSE = "GPLv3"
+LICENSE = "GPL-3.0-only"
 LIC_FILES_CHKSUM = "file://PKG-INFO;md5=4e584373bb0f46ef1e423cb7df37847d"
 DEPENDS = "python3"

@ -15,7 +15,7 @@ S = "${WORKDIR}/pyA20-${PV}"

 inherit distutils3

-do_compile_prepend() { 
+do_compile:prepend() { 
 cp ${WORKDIR}/mapping.h ${S}/pyA20/gpio/mapping.h
 }

--- a/recipes-graphics/libgles/sunxi-mali_git.bb
+++ b/recipes-graphics/libgles/sunxi-mali_git.bb
@ -21,7 +21,7 @@ python __anonymous() {
        raise bb.parse.SkipPackage("%s-%s ONLY supports hardfp mode for now" % (pkgn, pkgv))
 }

-SRCREV_pn-${PN} = "d343311efc8db166d8371b28494f0f27b6a58724"
+SRCREV = "d343311efc8db166d8371b28494f0f27b6a58724"
 SRC_URI = "gitsm://github.com/linux-sunxi/sunxi-mali.git \
           file://0001-Add-EGLSyncKHR-EGLTimeKHR-and-GLChar-definition.patch \
           file://0002-Add-missing-GLchar-definition.patch \
@ -92,13 +92,13 @@ do_install() {
 # Packages like xf86-video-fbturbo dlopen() libUMP.so, so we do need to ship the .so files in ${PN}
 PACKAGES =+ "${PN}-test"

-RPROVIDES_${PN} += "libGLESv2.so libEGL.so libGLESv2.so libGLESv1_CM.so libMali.so"
-RDEPENDS_${PN}-test = "${PN}"
+RPROVIDES:${PN} += "libGLESv2.so libEGL.so libGLESv2.so libGLESv1_CM.so libMali.so"
+RDEPENDS:${PN}-test = "${PN}"

-FILES_${PN} += "${libdir}/lib*.so"
-FILES_${PN}-dev = "${includedir} ${libdir}/pkgconfig/*"
-FILES_${PN}-test = "${bindir}/sunximali-test"
+FILES:${PN} += "${libdir}/lib*.so"
+FILES:${PN}-dev = "${includedir} ${libdir}/pkgconfig/*"
+FILES:${PN}-test = "${bindir}/sunximali-test"

 # These are closed binaries generated elsewhere so don't check ldflags & text relocations
-INSANE_SKIP_${PN} = "dev-so ldflags textrel"
-INSANE_SKIP_${PN}-test = "dev-so ldflags textrel"
+INSANE_SKIP:${PN} = "dev-so ldflags textrel"
+INSANE_SKIP:${PN}-test = "dev-so ldflags textrel"
--- a/recipes-graphics/libump/libump_git.bb
+++ b/recipes-graphics/libump/libump_git.bb
@ -1,14 +1,14 @@
 DESCRIPTION = "Unified Memory Provider userspace API source code needed for xf86-video-mali compilation"

-LICENSE = "Apache-2"
+LICENSE = "Apache-2.0"
 LIC_FILES_CHKSUM = "file://debian/copyright;md5=edf7fb6071cae7ec80d537a05ee17198"

 inherit autotools

 PV = "r4p0-00rel0+git${SRCPV}"
-SRCREV_pn-${PN} = "ec0680628744f30b8fac35e41a7bd8e23e59c39f"
+SRCREV = "ec0680628744f30b8fac35e41a7bd8e23e59c39f"

-SRC_URI = "git://github.com/linux-sunxi/libump.git"
+SRC_URI = "git://github.com/linux-sunxi/libump.git;protocol=https;branch=master"

 S = "${WORKDIR}/git"

--- a/recipes-graphics/mesa/mesa-gl_%.bbappend
+++ b/recipes-graphics/mesa/mesa-gl_%.bbappend
@ -0,0 +1 @@
+PACKAGECONFIG:class-target = "opengl x11 gallium"
--- a/recipes-graphics/mesa/mesa_%.bbappend
+++ b/recipes-graphics/mesa/mesa_%.bbappend
@ -1,5 +1,5 @@
 # Enable lima and panfrost Mesa drivers
-PACKAGECONFIG_append_use-mailine-graphics = " lima panfrost"
+PACKAGECONFIG:append:use-mailine-graphics = " lima panfrost"
 # Enable KMS renderonly Mesa support
 # See https://cgit.freedesktop.org/mesa/mesa/commit/?id=2b780fe89300199f2334539aa1678e9b68f0434f
-GALLIUMDRIVERS_append_use-mailine-graphics = ",kmsro"
+GALLIUMDRIVERS:append:use-mailine-graphics = ",kmsro"
--- a/recipes-graphics/tslib/tslib_1.1.bbappend.disabled
+++ b/recipes-graphics/tslib/tslib_1.1.bbappend.disabled
@ -1,4 +1,4 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"

 SRC_URI += "file://tslib.patch"

--- a/recipes-graphics/xorg-xserver/libdri2_git.bb
+++ b/recipes-graphics/xorg-xserver/libdri2_git.bb
@ -1,6 +1,6 @@
 DESCRIPTION = "Library for the DRI2 extension to the X Window System"

-LICENSE = "MIT-X"
+LICENSE = "MIT-CMU"
 LIC_FILES_CHKSUM = "file://COPYING;md5=827da9afab1f727f2a66574629e0f39c"

 DEPENDS = "libdrm libxext libxfixes xorgproto"
@ -9,7 +9,7 @@ PE = "1"
 PV = "1.0.0+git${SRCPV}"
 SRC_URI = "git://github.com/robclark/libdri2.git;protocol=http;branch=master"

-SRCREV_pn-${PN} = "4f1eef3183df2b270c3d5cbef07343ee5127a6a4"
+SRCREV = "4f1eef3183df2b270c3d5cbef07343ee5127a6a4"

 S = "${WORKDIR}/git"

--- a/recipes-graphics/xorg-xserver/xf86-video-fbturbo_git.bb
+++ b/recipes-graphics/xorg-xserver/xf86-video-fbturbo_git.bb
@ -2,14 +2,14 @@ require recipes-graphics/xorg-driver/xorg-driver-video.inc

 DESCRIPTION = "X.Org X server -- A10/A13 display driver"

-LICENSE = "MIT-X"
+LICENSE = "MIT-CMU"
 LIC_FILES_CHKSUM = "file://COPYING;md5=f91dc3ee5ce59eb4b528e67e98a31266"

 DEPENDS += "sunxi-mali libump xorgproto"

 PE = "3"
 PV = "0.5.1+git${SRCPV}"
-SRCREV_pn-${PN} = "e094e3c8f9004ca3347694bd05b99d136e8621b9"
+SRCREV = "e094e3c8f9004ca3347694bd05b99d136e8621b9"

 SRC_URI = "git://github.com/ssvb/xf86-video-fbturbo.git;protocol=http;branch=master \
           file://20-fbturbo.conf"
@ -18,9 +18,9 @@ S = "${WORKDIR}/git"

 CFLAGS += " -I${STAGING_INCDIR}/xorg "

-do_install_append() {
+do_install:append() {
    install -d ${D}${datadir}/X11/xorg.conf.d
    install -m 0644 ${WORKDIR}/20-fbturbo.conf ${D}${datadir}/X11/xorg.conf.d
 }

-FILES_${PN} += "${datadir}/X11/xorg.conf.d/20-fbturbo.conf"
+FILES:${PN} += "${datadir}/X11/xorg.conf.d/20-fbturbo.conf"
--- a/recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend
+++ b/recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend
@ -1 +1 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
--- a/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend
+++ b/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend
@ -0,0 +1 @@
+DEPENDS += "libxshmfence"
--- a/recipes-kernel/linux-firmware/linux-firmware_%.bbappend
+++ b/recipes-kernel/linux-firmware/linux-firmware_%.bbappend
@ -6,7 +6,7 @@
 # WARNING: The following commit is required for NVRAM files to be included in
 # linux-firmware-bcm43430 package:
 # http://git.openembedded.org/openembedded-core/commit/?id=dde0f79f32fa6bab045ef60199903f74c4cc3393
-do_install_append() {
+do_install:append() {
 	ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.xunlong,orangepi-zero-plus2.txt
 	ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.xunlong,orangepi-zero-plus2-h3.txt
 	ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.friendlyarm,nanopi-neo-plus2.txt
--- a/recipes-kernel/linux/linux-mainline.inc
+++ b/recipes-kernel/linux/linux-mainline.inc
@ -1,5 +1,6 @@
 SECTION = "kernel"
-LICENSE = "GPLv2"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
 COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)"

 inherit kernel
@ -20,13 +21,12 @@ KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
 S = "${WORKDIR}/linux-${PV}"

 SRC_URI = "https://www.kernel.org/pub/linux/kernel/v5.x/linux-${PV}.tar.xz \
-	file://0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch \
 	file://0001-dts-orange-pi-zero-Add-wifi-support.patch \
 	file://defconfig \
 "

-SRC_URI_append_use-mailine-graphics = " file://drm.cfg"
-SRC_URI_append_bananapi = " file://axp20x.cfg"
-SRC_URI_append_cubietruck = " file://axp20x.cfg"
+SRC_URI:append:use-mailine-graphics = " file://drm.cfg"
+SRC_URI:append:bananapi = " file://axp20x.cfg"
+SRC_URI:append:cubietruck = " file://axp20x.cfg"

-FILES_${KERNEL_PACKAGE_NAME}-base_append = " ${nonarch_base_libdir}/modules/${KERNEL_VERSION}/modules.builtin.modinfo"
+FILES_${KERNEL_PACKAGE_NAME}-base:append = " ${nonarch_base_libdir}/modules/${KERNEL_VERSION}/modules.builtin.modinfo"
--- a/recipes-kernel/linux/linux-mainline/0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch
+++ b/recipes-kernel/linux/linux-mainline/0003-ARM-dts-nanopi-neo-air-Add-WiFi-eMMC.patch
@ -1,80 +0,0 @@
-From 4ca766a768e783ee5198f1935b7f46a5df9b4a35 Mon Sep 17 00:00:00 2001
-From: Jelle van der Waa <jelle@vdwaa.nl>
-Date: Tue, 23 Jan 2018 15:58:44 -0800
-Subject: [PATCH] ARM: dts: nanopi-neo-air: Add WiFi / eMMC
-
-Enable the WiFi (AP6212) chip and eMMC support for the NanoPi NEO Air.
-
-This patch was originally submitted by Jelle van der Waa. Martin Kelly
-modified it to compile on the latest kernel, fixed up some review
-comments from Maxime Ripard, and re-tested the patch.
-
-The patch has been reworked to add back eMMC support which has been left
-out at the last backport.
-
-Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
-Cc: linux-sunxi@googlegroups.com
-Cc: devicetree@vger.kernel.org
-Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
-Signed-off-by: Martin Kelly <mkelly@xevo.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Florin Sarbu <florin@resin.io>
---
- arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 34 +++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
-index 03ff6f8..a9331fe 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
-@@ -72,6 +72,11 @@
- 			gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
- 		};
- 	};
-+
-+	wifi_pwrseq: wifi_pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-+	};
- };
- 
- &mmc0 {
-@@ -84,6 +89,35 @@
- 	status = "okay";
- };
- 
-+&mmc1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mmc1_pins_a>;
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+	mmc-pwrseq = <&wifi_pwrseq>;
-+	bus-width = <4>;
-+	non-removable;
-+	status = "okay";
-+
-+	brcmf: bcrmf@1 {
-+		reg = <1>;
-+		compatible = "brcm,bcm4329-fmac";
-+		interrupt-parent = <&pio>;
-+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
-+		interrupt-names = "host-wake";
-+	};
-+};
-+
-+&mmc2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mmc2_8bit_pins>;
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
- &uart0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&uart0_pins_a>;
-- 
-2.11.0
-
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0001-dts-add-h616-and-orangepizero2.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0001-dts-add-h616-and-orangepizero2.patch
@ -0,0 +1,907 @@
+From 4de4213f698a5962f839f671e4dec247baa35d5b Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Wed, 25 Jan 2023 20:30:15 +0100
+Subject: [PATCH] Add device tree from master
+
+---
+ arch/arm64/boot/dts/allwinner/Makefile        |   1 +
+ .../allwinner/sun50i-h616-orangepi-zero2.dts  | 261 ++++++++
+ .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 590 ++++++++++++++++++
+ include/dt-bindings/clock/sun6i-rtc.h         |  10 +
+ 4 files changed, 862 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+ create mode 100644 include/dt-bindings/clock/sun6i-rtc.h
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index a96d9d2d8..471822f5f 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -37,3 +37,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
+\ No newline at end of file
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+new file mode 100644
+index 000000000..e92055145
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -0,0 +1,261 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "OrangePi Zero2";
+	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
+
+	aliases {
+		ethernet0 = &emac0;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+			default-state = "on";
+		};
+
+		led-1 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+		};
+	};
+
+	reg_vcc5v: vcc5v {
+		/* board wide 5V supply directly from the USB-C socket */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_vcc33_wifi: vcc33-wifi {
+		/* Always on 3.3V regulator for WiFi and BT */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc33-wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc5v>;
+	};
+
+	reg_vcc_wifi_io: vcc-wifi-io {
+		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-wifi-io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc33_wifi>;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rtc 1>;
+		clock-names = "osc32k-out";
+		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
+		post-power-on-delay-ms = <200>;
+	};
+};
+
+&emac0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ext_rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_dcdce>;
+	allwinner,rx-delay-ps = <3100>;
+	allwinner,tx-delay-ps = <700>;
+	status = "okay";
+};
+
+&mmc1 {
+	vmmc-supply = <&reg_vcc33_wifi>;
+	vqmmc-supply = <&reg_vcc_wifi_io>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	mmc-ddr-1_8v;
+	status = "okay";
+
+	uwe-bsp {
+		compatible = "unisoc,uwe_bsp";
+		keep-power-on;
+		data-irq;
+		//adma-tx;
+		adma-rx;
+		//blksz-512;
+		status = "okay";
+	};
+};
+
+&mdio0 {
+	ext_rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_dcdce>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
+	bus-width = <4>;
+	status = "okay";
+};
+
+&r_rsb {
+	status = "okay";
+
+	axp305: pmic@745 {
+		compatible = "x-powers,axp305", "x-powers,axp805",
+			     "x-powers,axp806";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = <0x745>;
+
+		x-powers,self-working-mode;
+		vina-supply = <&reg_vcc5v>;
+		vinb-supply = <&reg_vcc5v>;
+		vinc-supply = <&reg_vcc5v>;
+		vind-supply = <&reg_vcc5v>;
+		vine-supply = <&reg_vcc5v>;
+		aldoin-supply = <&reg_vcc5v>;
+		bldoin-supply = <&reg_vcc5v>;
+		cldoin-supply = <&reg_vcc5v>;
+
+		regulators {
+			reg_aldo1: aldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-sys";
+			};
+
+			reg_aldo2: aldo2 {	/* 3.3V on headers */
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc3v3-ext";
+			};
+
+			reg_aldo3: aldo3 {	/* 3.3V on headers */
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc3v3-ext2";
+			};
+
+			reg_bldo1: bldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc1v8";
+			};
+
+			bldo2 {
+				/* unused */
+			};
+
+			bldo3 {
+				/* unused */
+			};
+
+			bldo4 {
+				/* unused */
+			};
+
+			cldo1 {
+				/* reserved */
+			};
+
+			cldo2 {
+				/* unused */
+			};
+
+			cldo3 {
+				/* unused */
+			};
+
+			reg_dcdca: dcdca {
+				regulator-always-on;
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-name = "vdd-cpu";
+			};
+
+			reg_dcdcc: dcdcc {
+				regulator-always-on;
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <990000>;
+				regulator-name = "vdd-gpu-sys";
+			};
+
+			reg_dcdcd: dcdcd {
+				regulator-always-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-name = "vdd-dram";
+			};
+
+			reg_dcdce: dcdce {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-eth-mmc";
+			};
+
+			sw {
+				/* unused */
+			};
+		};
+	};
+};
+
+&pio {
+	vcc-pc-supply = <&reg_aldo1>;
+	vcc-pf-supply = <&reg_aldo1>;
+	vcc-pg-supply = <&reg_bldo1>;
+	vcc-ph-supply = <&reg_aldo1>;
+	vcc-pi-supply = <&reg_aldo1>;
+};
+
+&spi0  {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+new file mode 100644
+index 000000000..ab344ea8a
+--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -0,0 +1,590 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Arm Ltd.
+// based on the H6 dtsi, which is:
+//   Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun50i-h616-ccu.h>
+#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
+#include <dt-bindings/reset/sun50i-h616-ccu.h>
+#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+
+/ {
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <0>;
+			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+		};
+
+		cpu1: cpu@1 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <1>;
+			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+		};
+
+		cpu2: cpu@2 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <2>;
+			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+		};
+
+		cpu3: cpu@3 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <3>;
+			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/*
+		 * 256 KiB reserved for Trusted Firmware-A (BL31).
+		 * This is added by BL31 itself, but some bootloaders fail
+		 * to propagate this into the DTB handed to kernels.
+		 */
+		secmon@40000000 {
+			reg = <0x0 0x40000000 0x0 0x40000>;
+			no-map;
+		};
+	};
+
+	osc24M: osc24M-clk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "osc24M";
+	};
+
+	pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		arm,no-tick-in-suspend;
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x0 0x40000000>;
+
+		syscon: syscon@3000000 {
+			compatible = "allwinner,sun50i-h616-system-control";
+			reg = <0x03000000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			sram_c: sram@28000 {
+				compatible = "mmio-sram";
+				reg = <0x00028000 0x30000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x00028000 0x30000>;
+			};
+		};
+
+		ccu: clock@3001000 {
+			compatible = "allwinner,sun50i-h616-ccu";
+			reg = <0x03001000 0x1000>;
+			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
+			clock-names = "hosc", "losc", "iosc";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		watchdog: watchdog@30090a0 {
+			compatible = "allwinner,sun50i-h616-wdt",
+				     "allwinner,sun6i-a31-wdt";
+			reg = <0x030090a0 0x20>;
+			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc24M>;
+		};
+
+		pio: pinctrl@300b000 {
+			compatible = "allwinner,sun50i-h616-pinctrl";
+			reg = <0x0300b000 0x400>;
+			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
+			clock-names = "apb", "hosc", "losc";
+			gpio-controller;
+			#gpio-cells = <3>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+
+			ext_rgmii_pins: rgmii-pins {
+				pins = "PI0", "PI1", "PI2", "PI3", "PI4",
+				       "PI5", "PI7", "PI8", "PI9", "PI10",
+				       "PI11", "PI12", "PI13", "PI14", "PI15",
+				       "PI16";
+				function = "emac0";
+				drive-strength = <40>;
+			};
+
+			i2c0_pins: i2c0-pins {
+				pins = "PI6", "PI7";
+				function = "i2c0";
+			};
+
+			i2c3_ph_pins: i2c3-ph-pins {
+				pins = "PH4", "PH5";
+				function = "i2c3";
+			};
+
+			ir_rx_pin: ir-rx-pin {
+				pins = "PH10";
+				function = "ir_rx";
+			};
+
+			mmc0_pins: mmc0-pins {
+				pins = "PF0", "PF1", "PF2", "PF3",
+				       "PF4", "PF5";
+				function = "mmc0";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
+			/omit-if-no-ref/
+			mmc1_pins: mmc1-pins {
+				pins = "PG0", "PG1", "PG2", "PG3",
+				       "PG4", "PG5";
+				function = "mmc1";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
+			mmc2_pins: mmc2-pins {
+				pins = "PC0", "PC1", "PC5", "PC6",
+				       "PC8", "PC9", "PC10", "PC11",
+				       "PC13", "PC14", "PC15", "PC16";
+				function = "mmc2";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
+			/omit-if-no-ref/
+			spi0_pins: spi0-pins {
+				pins = "PC0", "PC2", "PC4";
+				function = "spi0";
+			};
+
+			/omit-if-no-ref/
+			spi0_cs0_pin: spi0-cs0-pin {
+				pins = "PC3";
+				function = "spi0";
+			};
+
+			/omit-if-no-ref/
+			spi1_pins: spi1-pins {
+				pins = "PH6", "PH7", "PH8";
+				function = "spi1";
+			};
+
+			/omit-if-no-ref/
+			spi1_cs0_pin: spi1-cs0-pin {
+				pins = "PH5";
+				function = "spi1";
+			};
+
+			uart0_ph_pins: uart0-ph-pins {
+				pins = "PH0", "PH1";
+				function = "uart0";
+			};
+
+			/omit-if-no-ref/
+			uart1_pins: uart1-pins {
+				pins = "PG6", "PG7";
+				function = "uart1";
+			};
+
+			/omit-if-no-ref/
+			uart1_rts_cts_pins: uart1-rts-cts-pins {
+				pins = "PG8", "PG9";
+				function = "uart1";
+			};
+		};
+
+		gic: interrupt-controller@3021000 {
+			compatible = "arm,gic-400";
+			reg = <0x03021000 0x1000>,
+			      <0x03022000 0x2000>,
+			      <0x03024000 0x2000>,
+			      <0x03026000 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
+		mmc0: mmc@4020000 {
+			compatible = "allwinner,sun50i-h616-mmc",
+				     "allwinner,sun50i-a100-mmc";
+			reg = <0x04020000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC0>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins>;
+			status = "disabled";
+			max-frequency = <150000000>;
+			cap-sd-highspeed;
+			cap-mmc-highspeed;
+			mmc-ddr-3_3v;
+			cap-sdio-irq;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc1: mmc@4021000 {
+			compatible = "allwinner,sun50i-h616-mmc",
+				     "allwinner,sun50i-a100-mmc";
+			reg = <0x04021000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC1>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc1_pins>;
+			status = "disabled";
+			max-frequency = <150000000>;
+			cap-sd-highspeed;
+			cap-mmc-highspeed;
+			mmc-ddr-3_3v;
+			cap-sdio-irq;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc2: mmc@4022000 {
+			compatible = "allwinner,sun50i-h616-emmc",
+				     "allwinner,sun50i-a100-emmc";
+			reg = <0x04022000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC2>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc2_pins>;
+			status = "disabled";
+			max-frequency = <150000000>;
+			cap-sd-highspeed;
+			cap-mmc-highspeed;
+			mmc-ddr-3_3v;
+			cap-sdio-irq;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		uart0: serial@5000000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x05000000 0x400>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART0>;
+			resets = <&ccu RST_BUS_UART0>;
+			status = "disabled";
+		};
+
+		uart1: serial@5000400 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x05000400 0x400>;
+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART1>;
+			resets = <&ccu RST_BUS_UART1>;
+			status = "disabled";
+		};
+
+		uart2: serial@5000800 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x05000800 0x400>;
+			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART2>;
+			resets = <&ccu RST_BUS_UART2>;
+			status = "disabled";
+		};
+
+		uart3: serial@5000c00 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x05000c00 0x400>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART3>;
+			resets = <&ccu RST_BUS_UART3>;
+			status = "disabled";
+		};
+
+		uart4: serial@5001000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x05001000 0x400>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART4>;
+			resets = <&ccu RST_BUS_UART4>;
+			status = "disabled";
+		};
+
+		uart5: serial@5001400 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x05001400 0x400>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART5>;
+			resets = <&ccu RST_BUS_UART5>;
+			status = "disabled";
+		};
+
+		i2c0: i2c@5002000 {
+			compatible = "allwinner,sun50i-h616-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x05002000 0x400>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C0>;
+			resets = <&ccu RST_BUS_I2C0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c1: i2c@5002400 {
+			compatible = "allwinner,sun50i-h616-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x05002400 0x400>;
+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C1>;
+			resets = <&ccu RST_BUS_I2C1>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c2: i2c@5002800 {
+			compatible = "allwinner,sun50i-h616-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x05002800 0x400>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C2>;
+			resets = <&ccu RST_BUS_I2C2>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c3: i2c@5002c00 {
+			compatible = "allwinner,sun50i-h616-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x05002c00 0x400>;
+			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C3>;
+			resets = <&ccu RST_BUS_I2C3>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c4: i2c@5003000 {
+			compatible = "allwinner,sun50i-h616-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x05003000 0x400>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C4>;
+			resets = <&ccu RST_BUS_I2C4>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		spi0: spi@5010000 {
+			compatible = "allwinner,sun50i-h616-spi",
+				     "allwinner,sun8i-h3-spi";
+			reg = <0x05010000 0x1000>;
+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+			clock-names = "ahb", "mod";
+			resets = <&ccu RST_BUS_SPI0>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		spi1: spi@5011000 {
+			compatible = "allwinner,sun50i-h616-spi",
+				     "allwinner,sun8i-h3-spi";
+			reg = <0x05011000 0x1000>;
+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+			clock-names = "ahb", "mod";
+			resets = <&ccu RST_BUS_SPI1>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		emac0: ethernet@5020000 {
+			compatible = "allwinner,sun50i-h616-emac0",
+				     "allwinner,sun50i-a64-emac";
+			reg = <0x05020000 0x10000>;
+			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			clocks = <&ccu CLK_BUS_EMAC0>;
+			clock-names = "stmmaceth";
+			resets = <&ccu RST_BUS_EMAC0>;
+			reset-names = "stmmaceth";
+			syscon = <&syscon>;
+			status = "disabled";
+
+			mdio0: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
+		rtc: rtc@7000000 {
+			compatible = "allwinner,sun50i-h616-rtc",
+				     "allwinner,sun50i-h6-rtc";
+			reg = <0x07000000 0x400>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+			clock-output-names = "osc32k", "osc32k-out", "iosc";
+			#clock-cells = <1>;
+		};
+
+		r_ccu: clock@7010000 {
+			compatible = "allwinner,sun50i-h616-r-ccu";
+			reg = <0x07010000 0x210>;
+			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
+				 <&ccu CLK_PLL_PERIPH0>;
+			clock-names = "hosc", "losc", "iosc", "pll-periph";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		r_pio: pinctrl@7022000 {
+			compatible = "allwinner,sun50i-h616-r-pinctrl";
+			reg = <0x07022000 0x400>;
+			clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
+				 <&rtc CLK_OSC32K>;
+			clock-names = "apb", "hosc", "losc";
+			gpio-controller;
+			#gpio-cells = <3>;
+
+			/omit-if-no-ref/
+			r_i2c_pins: r-i2c-pins {
+				pins = "PL0", "PL1";
+				function = "s_i2c";
+			};
+
+			r_rsb_pins: r-rsb-pins {
+				pins = "PL0", "PL1";
+				function = "s_rsb";
+			};
+		};
+
+		ir: ir@7040000 {
+			compatible = "allwinner,sun50i-h616-ir",
+				     "allwinner,sun6i-a31-ir";
+			reg = <0x07040000 0x400>;
+			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu CLK_R_APB1_IR>,
+				 <&r_ccu CLK_IR>;
+			clock-names = "apb", "ir";
+			resets = <&r_ccu RST_R_APB1_IR>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&ir_rx_pin>;
+			status = "disabled";
+		};
+
+		r_i2c: i2c@7081400 {
+			compatible = "allwinner,sun50i-h616-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x07081400 0x400>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu CLK_R_APB2_I2C>;
+			resets = <&r_ccu RST_R_APB2_I2C>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		r_rsb: rsb@7083000 {
+			compatible = "allwinner,sun50i-h616-rsb",
+				     "allwinner,sun8i-a23-rsb";
+			reg = <0x07083000 0x400>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu CLK_R_APB2_RSB>;
+			clock-frequency = <3000000>;
+			resets = <&r_ccu RST_R_APB2_RSB>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&r_rsb_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+};
+diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h
+new file mode 100644
+index 000000000..c845493e4
+--- /dev/null
+++ b/include/dt-bindings/clock/sun6i-rtc.h
+@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+
+#ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_
+#define _DT_BINDINGS_CLK_SUN6I_RTC_H_
+
+#define CLK_OSC32K		0
+#define CLK_OSC32K_FANOUT	1
+#define CLK_IOSC		2
+
+#endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */
+-- 
+2.34.1
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0002-drv-add-dump_reg-and-sunxi-sysinfo-drivers.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0002-drv-add-dump_reg-and-sunxi-sysinfo-drivers.patch
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0003-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0003-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch
@ -0,0 +1,60 @@
+From 452a691a83df1aab77cec33203cb04a817817a05 Mon Sep 17 00:00:00 2001
+From: The-going <48602507+The-going@users.noreply.github.com>
+Date: Thu, 5 May 2022 22:55:13 +0300
+Subject: [PATCH] drv: nvmem: sunxi_sid: Add sunxi_get_soc_chipid,
+ sunxi_get_serial
+
+---
+ drivers/nvmem/sunxi_sid.c | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
+index 37a6abb0e..c81fac63d 100644
+--- a/drivers/nvmem/sunxi_sid.c
+++ b/drivers/nvmem/sunxi_sid.c
+@@ -37,6 +37,25 @@ struct sunxi_sid {
+ 	u32			value_offset;
+ };
+ 
+static unsigned int sunxi_soc_chipid[4];
+static unsigned int sunxi_serial[4];
+
+int sunxi_get_soc_chipid(unsigned char *chipid)
+{
+	memcpy(chipid, sunxi_soc_chipid, 16);
+
+	return 0;
+}
+EXPORT_SYMBOL(sunxi_get_soc_chipid);
+
+int sunxi_get_serial(unsigned       char *serial)
+{
+	memcpy(serial, sunxi_serial, 16);
+
+	return 0;
+}
+EXPORT_SYMBOL(sunxi_get_serial);
+
+ static int sunxi_sid_read(void *context, unsigned int offset,
+ 			  void *val, size_t bytes)
+ {
+@@ -167,6 +186,15 @@ static int sunxi_sid_probe(struct platform_device *pdev)
+ 
+ 	platform_set_drvdata(pdev, nvmem);
+ 
+	nvmem_cfg->reg_read(sid, 0, &sunxi_soc_chipid[0], sizeof(int));
+	nvmem_cfg->reg_read(sid, 4, &sunxi_soc_chipid[1], sizeof(int));
+	nvmem_cfg->reg_read(sid, 8, &sunxi_soc_chipid[2], sizeof(int));
+	nvmem_cfg->reg_read(sid, 12, &sunxi_soc_chipid[3], sizeof(int));
+
+	sunxi_serial[0] = sunxi_soc_chipid[3];
+	sunxi_serial[1] = sunxi_soc_chipid[2];
+	sunxi_serial[2] = (sunxi_soc_chipid[1] >> 16) & 0x0ffff;
+
+ 	return 0;
+ }
+ 
+-- 
+2.35.3
+
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0004-dts-add-sunxi-info-device-tree-node.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0004-dts-add-sunxi-info-device-tree-node.patch
@ -0,0 +1,27 @@
+From 9a7776b44588c24d04ffff63194d8a137624f8ac Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Thu, 26 Jan 2023 09:50:42 +0100
+Subject: [PATCH] Add sunxi-info device tree node
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index ab344ea8a..d0b95d43a 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -586,5 +586,10 @@ r_rsb: rsb@7083000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+ 		};
+
+		sunxi-info {
+			compatible = "allwinner,sun50i-h616-sys-info";
+			status = "okay";
+		};
+ 	};
+ };
+-- 
+2.34.1
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0005-dts-add-addr_mgt-device-tree-node.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0005-dts-add-addr_mgt-device-tree-node.patch
@ -0,0 +1,32 @@
+From 706dc6ed092e4a1b9d84893cb4186fbd354bb1c8 Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Thu, 26 Jan 2023 09:51:22 +0100
+Subject: [PATCH] Add addr_mgt device tree node
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index d0b95d43a..15f45a3f9 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -591,5 +591,15 @@ sunxi-info {
+ 			compatible = "allwinner,sun50i-h616-sys-info";
+ 			status = "okay";
+ 		};
+
+		addr_mgt {
+			compatible = "allwinner,sunxi-addr_mgt";
+			type_addr_wifi = <0x00>;
+			type_addr_bt = <0x00>;
+			type_addr_eth = <0x00>;
+			status = "okay";
+			linux,phandle = <0x179>;
+			phandle = <0x179>;
+		};
+ 	};
+ };
+-- 
+2.34.1
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0006-drv-modem-power-Power-manager-for-modems.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0006-drv-modem-power-Power-manager-for-modems.patch
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0007-drv-add-sunxi-addr-driver-used-to-fix-uwe5622-bluetooth-.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0007-drv-add-sunxi-addr-driver-used-to-fix-uwe5622-bluetooth-.patch
@ -0,0 +1,613 @@
+From 29cfa9437eaa2ff862ab0f06852383b181b60743 Mon Sep 17 00:00:00 2001
+From: afaulkner420 <afaulkner420@gmail.com>
+Date: Fri, 25 Mar 2022 20:18:18 +0000
+Subject: [PATCH 04/11] Add sunxi-addr driver - Used to fix uwe5622 bluetooth
+ MAC addresses
+
+---
+ drivers/misc/Kconfig                 |   1 +
+ drivers/misc/Makefile                |   1 +
+ drivers/misc/sunxi-addr/Kconfig      |   6 +
+ drivers/misc/sunxi-addr/Makefile     |   5 +
+ drivers/misc/sunxi-addr/sha256.c     | 178 +++++++++++++
+ drivers/misc/sunxi-addr/sunxi-addr.c | 358 +++++++++++++++++++++++++++
+ 6 files changed, 549 insertions(+)
+ create mode 100644 drivers/misc/sunxi-addr/Kconfig
+ create mode 100644 drivers/misc/sunxi-addr/Makefile
+ create mode 100644 drivers/misc/sunxi-addr/sha256.c
+ create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
+
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 24cb809ae..52843042f 100644
+--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
+@@ -494,4 +494,5 @@ source "drivers/misc/cardreader/Kconfig"
+ source "drivers/misc/habanalabs/Kconfig"
+ source "drivers/misc/uacce/Kconfig"
+ source "drivers/misc/pvpanic/Kconfig"
+source "drivers/misc/sunxi-addr/Kconfig"
+ endmenu
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index f3eaa577a..0f9280509 100644
+--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
+@@ -60,3 +60,4 @@ obj-$(CONFIG_XILINX_SDFEC)	+= xilinx_sdfec.o
+ obj-$(CONFIG_HISI_HIKEY_USB)	+= hisi_hikey_usb.o
+ obj-$(CONFIG_HI6421V600_IRQ)	+= hi6421v600-irq.o
+ obj-$(CONFIG_MODEM_POWER)	+= modem-power.o
+obj-$(CONFIG_SUNXI_ADDR_MGT)    += sunxi-addr/
+\ No newline at end of file
+diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
+new file mode 100644
+index 000000000..801dd2c02
+--- /dev/null
+++ b/drivers/misc/sunxi-addr/Kconfig
+@@ -0,0 +1,6 @@
+config SUNXI_ADDR_MGT
+  tristate "Allwinner Network MAC Addess Manager"
+  depends on BT || ETHERNET || WLAN
+  depends on NVMEM_SUNXI_SID
+  help
+    allwinner network mac address management
+diff --git a/drivers/misc/sunxi-addr/Makefile b/drivers/misc/sunxi-addr/Makefile
+new file mode 100644
+index 000000000..f01fd4783
+--- /dev/null
+++ b/drivers/misc/sunxi-addr/Makefile
+@@ -0,0 +1,5 @@
+#
+# Makefile for wifi mac addr manager drivers
+#
+sunxi_addr-objs := sunxi-addr.o sha256.o
+obj-$(CONFIG_SUNXI_ADDR_MGT)   += sunxi_addr.o
+diff --git a/drivers/misc/sunxi-addr/sha256.c b/drivers/misc/sunxi-addr/sha256.c
+new file mode 100644
+index 000000000..78825810c
+--- /dev/null
+++ b/drivers/misc/sunxi-addr/sha256.c
+@@ -0,0 +1,178 @@
+/*
+ * Local implement of sha256.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+/****************************** MACROS ******************************/
+#define ROTRIGHT(a, b) (((a) >> (b)) | ((a) << (32 - (b))))
+#define CH(x, y, z)    (((x) & (y)) ^ (~(x) & (z)))
+#define MAJ(x, y, z)   (((x) & (y)) ^  ((x) & (z)) ^ ((y) & (z)))
+#define EP0(x)         (ROTRIGHT(x,  2) ^ ROTRIGHT(x, 13) ^ ROTRIGHT(x, 22))
+#define EP1(x)         (ROTRIGHT(x,  6) ^ ROTRIGHT(x, 11) ^ ROTRIGHT(x, 25))
+#define SIG0(x)        (ROTRIGHT(x,  7) ^ ROTRIGHT(x, 18) ^ ((x) >> 3))
+#define SIG1(x)        (ROTRIGHT(x, 17) ^ ROTRIGHT(x, 19) ^ ((x) >> 10))
+
+/**************************** VARIABLES *****************************/
+static const uint32_t k[64] = {
+	0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
+	0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
+	0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+	0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
+	0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
+	0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+	0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
+	0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
+	0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+	0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
+	0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
+	0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+	0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
+	0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
+	0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+	0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
+};
+
+struct sha256_ctx {
+	uint8_t data[64];   /* current 512-bit chunk of message data, just like a buffer */
+	uint32_t datalen;   /* sign the data length of current chunk */
+	uint64_t bitlen;    /* the bit length of the total message */
+	uint32_t state[8];  /* store the middle state of hash abstract */
+};
+
+/*********************** FUNCTION DEFINITIONS ***********************/
+static void sha256_transform(struct sha256_ctx *ctx, const uint8_t *data)
+{
+	uint32_t a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
+
+	/* initialization */
+	for (i = 0, j = 0; i < 16; ++i, j += 4)
+		m[i] = (data[j] << 24) | (data[j + 1] << 16) |
+			(data[j + 2] << 8) | (data[j + 3]);
+	for ( ; i < 64; ++i)
+		m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
+
+	a = ctx->state[0];
+	b = ctx->state[1];
+	c = ctx->state[2];
+	d = ctx->state[3];
+	e = ctx->state[4];
+	f = ctx->state[5];
+	g = ctx->state[6];
+	h = ctx->state[7];
+
+	for (i = 0; i < 64; ++i) {
+		t1 = h + EP1(e) + CH(e, f, g) + k[i] + m[i];
+		t2 = EP0(a) + MAJ(a, b, c);
+		h = g;
+		g = f;
+		f = e;
+		e = d + t1;
+		d = c;
+		c = b;
+		b = a;
+		a = t1 + t2;
+	}
+
+	ctx->state[0] += a;
+	ctx->state[1] += b;
+	ctx->state[2] += c;
+	ctx->state[3] += d;
+	ctx->state[4] += e;
+	ctx->state[5] += f;
+	ctx->state[6] += g;
+	ctx->state[7] += h;
+}
+
+static void sha256_init(struct sha256_ctx *ctx)
+{
+	ctx->datalen = 0;
+	ctx->bitlen = 0;
+	ctx->state[0] = 0x6a09e667;
+	ctx->state[1] = 0xbb67ae85;
+	ctx->state[2] = 0x3c6ef372;
+	ctx->state[3] = 0xa54ff53a;
+	ctx->state[4] = 0x510e527f;
+	ctx->state[5] = 0x9b05688c;
+	ctx->state[6] = 0x1f83d9ab;
+	ctx->state[7] = 0x5be0cd19;
+}
+
+static void sha256_update(struct sha256_ctx *ctx, const uint8_t *data, size_t len)
+{
+	uint32_t i;
+
+	for (i = 0; i < len; ++i) {
+		ctx->data[ctx->datalen] = data[i];
+		ctx->datalen++;
+		if (ctx->datalen == 64) {
+			/* 64 byte = 512 bit  means the buffer ctx->data has
+			 * fully stored one chunk of message,
+			 * so do the sha256 hash map for the current chunk.
+			 */
+			sha256_transform(ctx, ctx->data);
+			ctx->bitlen += 512;
+			ctx->datalen = 0;
+		}
+	}
+}
+
+static void sha256_final(struct sha256_ctx *ctx, uint8_t *hash)
+{
+	uint32_t i;
+
+	i = ctx->datalen;
+
+	/* Pad whatever data is left in the buffer. */
+	if (ctx->datalen < 56) {
+		ctx->data[i++] = 0x80;  /* pad 10000000 = 0x80 */
+		while (i < 56)
+			ctx->data[i++] = 0x00;
+	} else {
+		ctx->data[i++] = 0x80;
+		while (i < 64)
+			ctx->data[i++] = 0x00;
+		sha256_transform(ctx, ctx->data);
+		memset(ctx->data, 0, 56);
+	}
+
+	/* Append to the padding the total message's length in bits and transform. */
+	ctx->bitlen += ctx->datalen * 8;
+	ctx->data[63] = ctx->bitlen;
+	ctx->data[62] = ctx->bitlen >> 8;
+	ctx->data[61] = ctx->bitlen >> 16;
+	ctx->data[60] = ctx->bitlen >> 24;
+	ctx->data[59] = ctx->bitlen >> 32;
+	ctx->data[58] = ctx->bitlen >> 40;
+	ctx->data[57] = ctx->bitlen >> 48;
+	ctx->data[56] = ctx->bitlen >> 56;
+	sha256_transform(ctx, ctx->data);
+
+	/* copying the final state to the output hash(use big endian). */
+	for (i = 0; i < 4; ++i) {
+		hash[i]      = (ctx->state[0] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 4]  = (ctx->state[1] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 8]  = (ctx->state[2] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 12] = (ctx->state[3] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 16] = (ctx->state[4] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 20] = (ctx->state[5] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 24] = (ctx->state[6] >> (24 - i * 8)) & 0x000000ff;
+		hash[i + 28] = (ctx->state[7] >> (24 - i * 8)) & 0x000000ff;
+	}
+}
+
+int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output)
+{
+	struct sha256_ctx ctx;
+
+	sha256_init(&ctx);
+	sha256_update(&ctx, plaintext, psize);
+	sha256_final(&ctx, output);
+	return 0;
+}
+diff --git a/drivers/misc/sunxi-addr/sunxi-addr.c b/drivers/misc/sunxi-addr/sunxi-addr.c
+new file mode 100644
+index 000000000..a812e4e82
+--- /dev/null
+++ b/drivers/misc/sunxi-addr/sunxi-addr.c
+@@ -0,0 +1,358 @@
+/*
+ * The driver of SUNXI NET MAC ADDR Manager.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#define DEBUG
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/miscdevice.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#define ADDR_MGT_DBG(fmt, arg...) printk(KERN_DEBUG "[ADDR_MGT] %s: " fmt "\n",\
+				__func__, ## arg)
+#define ADDR_MGT_ERR(fmt, arg...) printk(KERN_ERR "[ADDR_MGT] %s: " fmt "\n",\
+				__func__, ## arg)
+
+#define MODULE_CUR_VERSION  "v1.0.9"
+
+#define MATCH_STR_LEN       20
+#define ADDR_VAL_LEN        6
+#define ADDR_STR_LEN        18
+#define ID_LEN              16
+#define HASH_LEN            32
+
+#define TYPE_ANY            0
+#define TYPE_BURN           1
+#define TYPE_IDGEN          2
+#define TYPE_USER           3
+#define TYPE_RAND           4
+
+#define ADDR_FMT_STR        0
+#define ADDR_FMT_VAL        1
+
+#define IS_TYPE_INVALID(x)  ((x < TYPE_ANY) || (x > TYPE_RAND))
+
+#define ADDR_CLASS_ATTR_ADD(name) \
+static ssize_t addr_##name##_show(struct class *class, \
+		struct class_attribute *attr, char *buffer) \
+{ \
+	char addr[ADDR_STR_LEN]; \
+	if (IS_TYPE_INVALID(get_addr_by_name(ADDR_FMT_STR, addr, #name))) \
+		return 0; \
+	return sprintf(buffer, "%.17s\n", addr); \
+} \
+static ssize_t addr_##name##_store(struct class *class, \
+		struct class_attribute *attr, \
+		const char *buffer, size_t count) \
+{ \
+	if (count != ADDR_STR_LEN) { \
+		ADDR_MGT_ERR("Length wrong."); \
+		return -EINVAL; \
+	} \
+	set_addr_by_name(TYPE_USER, ADDR_FMT_STR, buffer, #name); \
+	return count; \
+} \
+static CLASS_ATTR_RW(addr_##name);
+
+struct addr_mgt_info {
+	unsigned int type_def;
+	unsigned int type_cur;
+	unsigned int flag;
+	char *addr;
+	char *name;
+};
+
+static struct addr_mgt_info info[] = {
+	{TYPE_ANY, TYPE_ANY, 1, NULL, "wifi"},
+	{TYPE_ANY, TYPE_ANY, 0, NULL, "bt"  },
+	{TYPE_ANY, TYPE_ANY, 1, NULL, "eth" },
+};
+
+extern int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output);
+extern int sunxi_get_soc_chipid(unsigned char *chipid);
+
+static int addr_parse(int fmt, const char *addr, int check)
+{
+	char val_buf[ADDR_VAL_LEN];
+	char cmp_buf[ADDR_VAL_LEN];
+	int  ret = ADDR_VAL_LEN;
+
+	if (fmt == ADDR_FMT_STR)
+		ret = sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+					&val_buf[0], &val_buf[1], &val_buf[2],
+					&val_buf[3], &val_buf[4], &val_buf[5]);
+	else
+		memcpy(val_buf, addr, ADDR_VAL_LEN);
+
+	if (ret != ADDR_VAL_LEN)
+		return -1;
+
+	if (check && (val_buf[0] & 0x3))
+		return -1;
+
+	memset(cmp_buf, 0x00, ADDR_VAL_LEN);
+	if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+		return -1;
+
+	memset(cmp_buf, 0xFF, ADDR_VAL_LEN);
+	if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+		return -1;
+
+	return 0;
+}
+
+static struct addr_mgt_info *addr_find_by_name(char *name)
+{
+	int i = 0;
+	for (i = 0; i < ARRAY_SIZE(info); i++) {
+		if (strcmp(info[i].name, name) == 0)
+			return &info[i];
+	}
+	return NULL;
+}
+
+static int get_addr_by_name(int fmt, char *addr, char *name)
+{
+	struct addr_mgt_info *t;
+
+	t = addr_find_by_name(name);
+	if (t == NULL) {
+		ADDR_MGT_ERR("can't find addr named: %s", name);
+		return -1;
+	}
+
+	if (IS_TYPE_INVALID(t->type_cur)) {
+		ADDR_MGT_ERR("addr type invalid");
+		return -1;
+	}
+
+	if (addr_parse(ADDR_FMT_VAL, t->addr, t->flag)) {
+		ADDR_MGT_ERR("addr parse fail(%s)", t->addr);
+		return -1;
+	}
+
+	if (fmt == ADDR_FMT_STR)
+		sprintf(addr, "%02X:%02X:%02X:%02X:%02X:%02X",
+				t->addr[0], t->addr[1], t->addr[2],
+				t->addr[3], t->addr[4], t->addr[5]);
+	else
+		memcpy(addr, t->addr, ADDR_VAL_LEN);
+
+	return t->type_cur;
+}
+
+static int set_addr_by_name(int type, int fmt, const char *addr, char *name)
+{
+	struct addr_mgt_info *t;
+
+	t = addr_find_by_name(name);
+	if (t == NULL) {
+		ADDR_MGT_ERR("can't find addr named: %s", name);
+		return -1;
+	}
+
+	if (addr_parse(fmt, addr, t->flag)) {
+		ADDR_MGT_ERR("addr parse fail(%s)", addr);
+		return -1;
+	}
+
+	t->type_cur = type;
+	if (fmt == ADDR_FMT_STR)
+		sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+				&t->addr[0], &t->addr[1], &t->addr[2],
+				&t->addr[3], &t->addr[4], &t->addr[5]);
+	else
+		memcpy(t->addr, addr, ADDR_VAL_LEN);
+
+	return 0;
+}
+
+int get_custom_mac_address(int fmt, char *name, char *addr)
+{
+	return get_addr_by_name(fmt, addr, name);
+}
+EXPORT_SYMBOL_GPL(get_custom_mac_address);
+
+static int addr_factory(struct device_node *np,
+			int idx, int type, char *mac, char *name)
+{
+	int  ret, i;
+	char match[MATCH_STR_LEN];
+	const char *p;
+	char id[ID_LEN], hash[HASH_LEN], cmp_buf[ID_LEN];
+	struct timespec64 curtime;
+
+	switch (type) {
+	case TYPE_BURN:
+		sprintf(match, "addr_%s", name);
+		ret = of_property_read_string_index(np, match, 0, &p);
+		if (ret)
+			return -1;
+
+		ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+			&mac[0], &mac[1], &mac[2],
+			&mac[3], &mac[4], &mac[5]);
+
+		if (ret != ADDR_VAL_LEN)
+			return -1;
+		break;
+	case TYPE_IDGEN:
+		if (idx > HASH_LEN / ADDR_VAL_LEN - 1)
+			return -1;
+		if (sunxi_get_soc_chipid(id))
+			return -1;
+		memset(cmp_buf, 0x00, ID_LEN);
+		if (memcmp(id, cmp_buf, ID_LEN) == 0)
+			return -1;
+		if (hmac_sha256(id, ID_LEN, hash))
+			return -1;
+		memcpy(mac, &hash[idx * ADDR_VAL_LEN], ADDR_VAL_LEN);
+		break;
+	case TYPE_RAND:
+		for (i = 0; i < ADDR_VAL_LEN; i++) {
+			ktime_get_real_ts64(&curtime);
+			mac[i] = (char)curtime.tv_nsec;
+		}
+		break;
+	default:
+		ADDR_MGT_ERR("unsupport type: %d", type);
+		return -1;
+	}
+	return 0;
+}
+
+static int addr_init(struct platform_device *pdev)
+{
+	struct device_node *np = pdev->dev.of_node;
+	int  type, i, j;
+	char match[MATCH_STR_LEN];
+	char addr[ADDR_VAL_LEN];
+	int  type_tab[] = {TYPE_BURN, TYPE_IDGEN, TYPE_RAND};
+
+	/* init addr type and value */
+	for (i = 0; i < ARRAY_SIZE(info); i++) {
+		sprintf(match, "type_addr_%s", info[i].name);
+		if (of_property_read_u32(np, match, &type)) {
+			ADDR_MGT_DBG("Failed to get type_def_%s, use default: %d",
+						info[i].name, info[i].type_def);
+		} else {
+			info[i].type_def = type;
+			info[i].type_cur = type;
+		}
+
+		if (IS_TYPE_INVALID(info[i].type_def))
+			return -1;
+		if (info[i].type_def != TYPE_ANY) {
+			if (addr_factory(np, i, info[i].type_def, addr, info[i].name))
+				return -1;
+		} else {
+			for (j = 0; j < ARRAY_SIZE(type_tab); j++) {
+				if (!addr_factory(np, i, type_tab[j], addr, info[i].name)) {
+					info[i].type_cur = type_tab[j];
+					break;
+				}
+			}
+		}
+
+		if (info[i].flag)
+			addr[0] &= 0xFC;
+
+		if (addr_parse(ADDR_FMT_VAL, addr, info[i].flag))
+			return -1;
+		else {
+			info[i].addr = devm_kzalloc(&pdev->dev, ADDR_VAL_LEN, GFP_KERNEL);
+			memcpy(info[i].addr, addr, ADDR_VAL_LEN);
+		}
+	}
+	return 0;
+}
+
+static ssize_t summary_show(struct class *class,
+				struct class_attribute *attr, char *buffer)
+{
+	int i = 0, ret = 0;
+
+	ret += sprintf(&buffer[ret], "name cfg cur address\n");
+	for (i = 0; i < ARRAY_SIZE(info); i++) {
+		ret += sprintf(&buffer[ret],
+			"%4s  %d   %d  %02X:%02X:%02X:%02X:%02X:%02X\n",
+			info[i].name,   info[i].type_def, info[i].type_cur,
+			info[i].addr[0], info[i].addr[1], info[i].addr[2],
+			info[i].addr[3], info[i].addr[4], info[i].addr[5]);
+	}
+	return ret;
+}
+static CLASS_ATTR_RO(summary);
+
+ADDR_CLASS_ATTR_ADD(wifi);
+ADDR_CLASS_ATTR_ADD(bt);
+ADDR_CLASS_ATTR_ADD(eth);
+
+static struct attribute *addr_class_attrs[] = {
+	&class_attr_summary.attr,
+	&class_attr_addr_wifi.attr,
+	&class_attr_addr_bt.attr,
+	&class_attr_addr_eth.attr,
+	NULL
+};
+ATTRIBUTE_GROUPS(addr_class);
+
+static struct class addr_class = {
+	.name = "addr_mgt",
+	.owner = THIS_MODULE,
+	.class_groups = addr_class_groups,
+};
+
+static const struct of_device_id addr_mgt_ids[] = {
+	{ .compatible = "allwinner,sunxi-addr_mgt" },
+	{ /* Sentinel */ }
+};
+
+static int addr_mgt_probe(struct platform_device *pdev)
+{
+	int status;
+
+	ADDR_MGT_DBG("module version: %s", MODULE_CUR_VERSION);
+	status = class_register(&addr_class);
+	if (status < 0) {
+		ADDR_MGT_ERR("class register error, status: %d.", status);
+		return -1;
+	}
+
+	if (addr_init(pdev)) {
+		ADDR_MGT_ERR("failed to init addr.");
+		class_unregister(&addr_class);
+		return -1;
+	}
+	ADDR_MGT_DBG("success.");
+	return 0;
+}
+
+static int addr_mgt_remove(struct platform_device *pdev)
+{
+	class_unregister(&addr_class);
+	return 0;
+}
+
+static struct platform_driver addr_mgt_driver = {
+	.probe  = addr_mgt_probe,
+	.remove = addr_mgt_remove,
+	.driver = {
+		.owner = THIS_MODULE,
+		.name  = "sunxi-addr-mgt",
+		.of_match_table = addr_mgt_ids,
+	},
+};
+
+module_platform_driver_probe(addr_mgt_driver, addr_mgt_probe);
+
+MODULE_AUTHOR("Allwinnertech");
+MODULE_DESCRIPTION("Network MAC Addess Manager");
+MODULE_LICENSE("GPL");
+-- 
+2.25.1
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0008-drv-wireless-add-uwe5622-driver.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0008-drv-wireless-add-uwe5622-driver.patch
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch
@ -0,0 +1,28 @@
+From 70a0c21f9bc1eed754cce584fe382883dc412db0 Mon Sep 17 00:00:00 2001
+From: afaulkner420 <afaulkner420@gmail.com>
+Date: Fri, 25 Mar 2022 20:31:26 +0000
+Subject: [PATCH 08/11] uwe5622: bluetooth: Fix firmware init fail
+
+---
+ net/bluetooth/hci_core.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
+index c67390367..b2ee9b6a8 100644
+--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
+@@ -932,7 +932,11 @@ static int __hci_init(struct hci_dev *hdev)
+ 
+ 	err = __hci_req_sync(hdev, hci_init3_req, 0, HCI_INIT_TIMEOUT, NULL);
+ 	if (err < 0)
+#if defined(CONFIG_RK_WIFI_DEVICE_UWE5621) || defined(CONFIG_AW_WIFI_DEVICE_UWE5622)
+		;
+#else
+ 		return err;
+#endif
+ 
+ 	err = __hci_req_sync(hdev, hci_init4_req, 0, HCI_INIT_TIMEOUT, NULL);
+ 	if (err < 0)
+-- 
+2.25.1
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0010-drv-fix-incldue-path-for-unisocwcn.patch
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/0010-drv-fix-incldue-path-for-unisocwcn.patch
@ -0,0 +1,45 @@
+From bb564341bb6c64003abbf24fd5d5ef254060b040 Mon Sep 17 00:00:00 2001
+From: Patryk Biel <patryk.biel.external@trumpf.com>
+Date: Thu, 19 Jan 2023 10:46:28 +0100
+Subject: [PATCH] Fix incldue path for unisocwcn
+
+---
+ drivers/net/wireless/uwe5622/Makefile           | 4 +++-
+ drivers/net/wireless/uwe5622/unisocwcn/Makefile | 6 +++---
+ 2 files changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/net/wireless/uwe5622/Makefile b/drivers/net/wireless/uwe5622/Makefile
+index 313ea5123..e9a398584 100644
+--- a/drivers/net/wireless/uwe5622/Makefile
+++ b/drivers/net/wireless/uwe5622/Makefile
+@@ -2,7 +2,9 @@ obj-$(CONFIG_AW_WIFI_DEVICE_UWE5622) += unisocwcn/
+ obj-$(CONFIG_WLAN_UWE5622)    += unisocwifi/
+ obj-$(CONFIG_TTY_OVERY_SDIO)  += tty-sdio/
+ 
+-UNISOCWCN_DIR := $(shell cd $(src)/unisocwcn/ && /bin/pwd)
+mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
+UNISOCWCN_DIR := $(dir $(mkfile_path))/unisocwcn/
+
+ UNISOC_BSP_INCLUDE := $(UNISOCWCN_DIR)/include
+ export UNISOC_BSP_INCLUDE
+ 
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/Makefile b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
+index b62652f63..ae6e1e25a 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/Makefile
+++ b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
+@@ -119,9 +119,9 @@ ccflags-y += -DCONFIG_WCN_UTILS
+ 
+ #### include path ######
+ ccflags-y += -I$(src)/../tty-sdio
+-ccflags-y += -I$(src)/include/
+-ccflags-y += -I$(src)/platform/
+-ccflags-y += -I$(src)/platform/rf/
+ccflags-y += -I$(srctree)/$(src)/include/
+ccflags-y += -I$(srctree)/$(src)/platform/
+ccflags-y += -I$(srctree)/$(src)/platform/rf/
+ 
+ #### add cflag for Customer ######
+ ### ---------- Hisilicon start ---------- ###
+-- 
+2.34.1
+
--- a/recipes-kernel/linux/linux-mainline/orange-pi-zero2/defconfig
+++ b/recipes-kernel/linux/linux-mainline/orange-pi-zero2/defconfig
--- a/recipes-kernel/linux/linux-mainline_5.15.35.bb
+++ b/recipes-kernel/linux/linux-mainline_5.15.35.bb
@ -0,0 +1,21 @@
+require linux-mainline.inc
+
+DESCRIPTION = "Mainline Longterm Linux kernel"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
+
+SRC_URI[sha256sum] = "0a1a5ae2f30eb2b38215e59077f045aabd7f4e2857a881482f02ea48186105d8"
+
+# opi-zero-2 support added only for 5.15 kernel so add it to this recipe not to inc file
+SRC_URI:append:orange-pi-zero2 = " \
+	file://0001-dts-add-h616-and-orangepizero2.patch \
+	file://0002-drv-add-dump_reg-and-sunxi-sysinfo-drivers.patch \
+	file://0003-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch \
+	file://0004-dts-add-sunxi-info-device-tree-node.patch \
+	file://0005-dts-add-addr_mgt-device-tree-node.patch \
+	file://0006-drv-modem-power-Power-manager-for-modems.patch \
+	file://0007-drv-add-sunxi-addr-driver-used-to-fix-uwe5622-bluetooth-.patch \
+	file://0008-drv-wireless-add-uwe5622-driver.patch \
+	file://0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch \
+	file://0010-drv-fix-incldue-path-for-unisocwcn.patch \
+"
--- a/recipes-kernel/linux/linux-sunxi_3.4.bb
+++ b/recipes-kernel/linux/linux-sunxi_3.4.bb
@ -3,15 +3,15 @@ require linux.inc
 DESCRIPTION = "Linux kernel for Allwinner a10/a20 processors"

 COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i)"
-RDEPENDS_${PN} += "sunxi-board-fex"
+RDEPENDS:${PN} += "sunxi-board-fex"

 PV = "3.4.104"
 PR = "r1"
-SRCREV_pn-${PN} = "d47d367036be38c5180632ec8a3ad169a4593a88"
+SRCREV = "d47d367036be38c5180632ec8a3ad169a4593a88"

-MACHINE_KERNEL_PR_append = "a"
+MACHINE_KERNEL_PR:append = "a"

-SRC_URI += "git://github.com/linux-sunxi/linux-sunxi.git;branch=sunxi-3.4;protocol=git \
+SRC_URI += "git://github.com/linux-sunxi/linux-sunxi.git;branch=sunxi-3.4;protocol=https \
        file://0001-compiler-gcc-integrate-the-various-compiler-gcc-345-.patch \
        file://0002-use-static-inline-in-ARM-ftrace.patch \
        file://0003-gcc5-fixes.patch \
@ -26,7 +26,7 @@ S = "${WORKDIR}/git"
 #fix QA issue "Files/directories were installed but not shipped: /usr/src/debug"
 INHIBIT_PACKAGE_DEBUG_SPLIT = "1"

-do_configure_prepend() {
+do_configure:prepend() {
    #fix arch QA issues ("Architecture did not match")
    rm -f ${S}/drivers/net/wireless/rtxx7x/tools/bin2h
    rm -f ${S}/modules/wifi/ar6302/AR6K_SDK_ISC.build_3.1_RC.329/host/lib/wac/wac
--- a/recipes-kernel/linux/linux.inc
+++ b/recipes-kernel/linux/linux.inc
@ -39,7 +39,7 @@ do_kernel_configme[depends] += "virtual/${TARGET_PREFIX}binutils:do_populate_sys
 do_kernel_configme[depends] += "virtual/${TARGET_PREFIX}gcc:do_populate_sysroot"
 do_kernel_configme[depends] += "bc-native:do_populate_sysroot bison-native:do_populate_sysroot"

-do_configure_prepend() {
+do_configure:prepend() {
    CONF_SED_SCRIPT=""

    #
@ -118,15 +118,9 @@ do_configure_prepend() {
    yes '' | oe_runmake -C ${S} O=${B} oldconfig
 }

-do_configure_append() {
+do_configure:append() {
    if test -e scripts/Makefile.fwinst ; then
        sed -i -e "s:-m0644:-m 0644:g" scripts/Makefile.fwinst
    fi
 }

-do_install_append() {
-    oe_runmake headers_install INSTALL_HDR_PATH=${D}${exec_prefix}/src/linux-${KERNEL_VERSION} ARCH=$ARCH
-}
-
-PACKAGES =+ "kernel-headers"
-FILES_kernel-headers = "${exec_prefix}/src/linux*"
--- a/recipes-kernel/uwe5622-firwmare/files/wcnmodem.bin
+++ b/recipes-kernel/uwe5622-firwmare/files/wcnmodem.bin
--- a/recipes-kernel/uwe5622-firwmare/files/wifi_2355b001_1ant.ini
+++ b/recipes-kernel/uwe5622-firwmare/files/wifi_2355b001_1ant.ini
@ -0,0 +1,177 @@
+[Section 1: Version]
+Major = 2
+Minor = 2
+
+[Section 2: Board Config]
+Calib_Bypass = 11758
+TxChain_Mask = 2
+RxChain_Mask = 2
+
+[Section 3: Board Config TPC]
+DPD_LUT_idx = 0x33,0x33,0x0,0x11,0x22,0x33,0x33,0x33
+TPC_Goal_Chain0 = 0,0,0,0,0,0,0,0
+TPC_Goal_Chain1 = 159,167,162,152,159,167,162,152
+
+[Section 4: TPC-LUT]
+Chain0_LUT_0 = 6,0,40,0
+Chain0_LUT_1 = 6,1,24,0
+Chain0_LUT_2 = 6,2,8,0
+Chain0_LUT_3 = 10,2,0,0
+Chain0_LUT_4 = 14,2,0,0
+Chain0_LUT_5 = 18,2,0,0
+Chain0_LUT_6 = 22,2,0,0
+Chain0_LUT_7 = 26,2,0,0
+Chain1_LUT_0 = 6,0,40,0
+Chain1_LUT_1 = 6,1,24,0
+Chain1_LUT_2 = 6,2,8,0
+Chain1_LUT_3 = 10,2,0,0
+Chain1_LUT_4 = 14,2,0,0
+Chain1_LUT_5 = 18,2,0,0
+Chain1_LUT_6 = 22,2,0,0
+Chain1_LUT_7 = 26,2,0,0
+
+[Section 5: Board Config Frequency Compensation]
+2G_Channel_Chain0 = 6,6,6,6,7,7,7,7,7,7,7,7,7,7
+2G_Channel_Chain1 = 6,6,6,6,7,7,7,7,7,7,7,7,7,7
+5G_Channel_Chain0 = 11,11,11,11,9,9,9,9,10,10,10,10,10,10,10,10,10,10,10,10,9,9,9,9,9
+5G_Channel_Chain1 = 11,11,11,11,9,9,9,9,10,10,10,10,10,10,10,10,10,10,10,10,9,9,9,9,9
+
+[Section 6: Rate To Power with BW 20M]
+11b_Power = 20,20,20,20
+11ag_Power = 28,32,36,44,28,32,36,48
+11n_Power = 34,38,38,40,40,44,44,48,32,36,36,40,40,44,44,54,48
+11ac_Power = 32,36,36,40,40,44,44,48,50,66,32,36,36,40,40,44,44,48,50,66
+
+[Section 7: Power Backoff]
+Green_WIFI_offset = 0
+HT40_Power_offset = 0
+VHT40_Power_offset = 0
+VHT80_Power_offset = 0
+SAR_Power_offset = 0
+Mean_Power_offset = 36
+
+[Section 8: Reg Domain]
+reg_domain1 = 0x00000001
+reg_domain2 = 0x00000002
+
+[Section 9: Band Edge Power offset (MKK, FCC, ETSI)]
+BW20M = 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41
+BW40M = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21
+BW80M = 6,5,4,3,2,1
+
+[Section 10: TX Scale]
+Chain0_1 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16
+Chain1_1 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16
+Chain0_2 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,17
+Chain1_2 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,17
+Chain0_3 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,18
+Chain1_3 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,18
+Chain0_4 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,19
+Chain1_4 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,19
+Chain0_5 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,20
+Chain1_5 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,20
+Chain0_6 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,21
+Chain1_6 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,21
+Chain0_7 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,22
+Chain1_7 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,22
+Chain0_8 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,23
+Chain1_8 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,23
+Chain0_9 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,24
+Chain1_9 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,24
+Chain0_10 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,25
+Chain1_10 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,25
+Chain0_11 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,26
+Chain1_11 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,26
+Chain0_12 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,27
+Chain1_12 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,27
+Chain0_13 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,28
+Chain1_13 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,28
+Chain0_14 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,29
+Chain1_14 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,29
+Chain0_36 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,30
+Chain1_36 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,30
+Chain0_40 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,31
+Chain1_40 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,31
+Chain0_44 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,32
+Chain1_44 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,32
+Chain0_48 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,33
+Chain1_48 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,33
+Chain0_52 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,34
+Chain1_52 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,34
+Chain0_56 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,35
+Chain1_56 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,35
+Chain0_60 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,36
+Chain1_60 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,36
+Chain0_64 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,37
+Chain1_64 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,37
+Chain0_100 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,38
+Chain1_100 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,38
+Chain0_104 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,39
+Chain1_104 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,39
+Chain0_108 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,40
+Chain1_108 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,40
+Chain0_112 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,41
+Chain1_112 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,41
+Chain0_116 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,42
+Chain1_116 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,42
+Chain0_120 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,43
+Chain1_120 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,43
+Chain0_124 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,44
+Chain1_124 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,44
+Chain0_128 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,45
+Chain1_128 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,45
+Chain0_132 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,46
+Chain1_132 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,46
+Chain0_136 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,47
+Chain1_136 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,47
+Chain0_140 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,48
+Chain1_140 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,48
+Chain0_144 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,49
+Chain1_144 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,49
+Chain0_149 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,50
+Chain1_149 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,50
+Chain0_153 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,51
+Chain1_153 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,51
+Chain0_157 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,52
+Chain1_157 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,52
+Chain0_161 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,53
+Chain1_161 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,53
+Chain0_165 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,54
+Chain1_165 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,54
+
+[Section 11: misc]
+DFS_switch = 1
+power_save_switch = 2
+ex-Fem_and_ex-LNA_param_setup = 3
+rssi_report_diff = 4
+
+[Section 12: debug reg]
+address = 0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0x10,0x11,0x12,0x13,0x14,0x15,0x16
+value = 0x16,0x17,0x18,0x19,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x30,0x31
+
+[Section 13: coex_config]
+bt_performance_cfg0 = 0x01010101
+bt_performance_cfg1 = 0x01000000
+wifi_performance_cfg0 = 0x01050A01
+wifi_performance_cfg2 = 0x00000000
+strategy_cfg0 = 0x01010100
+strategy_cfg1 = 0x03000000
+strategy_cfg2 = 0x08020000
+compatibility_cfg0 = 0x04040000
+compatibility_cfg1 = 0x0
+ant_cfg0 = 0x0
+ant_cfg1 = 0x0
+isolation_cfg0 = 0x0505
+isolation_cfg1 = 0x0
+reserved_cfg0 = 0x0
+reserved_cfg1 = 0x0
+reserved_cfg2 = 0x0
+reserved_cfg3 = 0x0
+reserved_cfg4 = 0x0
+reserved_cfg5 = 0x0
+reserved_cfg6 = 0x0
+reserved_cfg7 = 0x0
+
+[Section 14: rf_tlv_config]
+rf_config = 0xAA,0x55,0x00,0xFF,0x8,0xA,0x0,0x5,0x0,0x0,0x0,0x0,0x0,0x0
+
--- a/recipes-kernel/uwe5622-firwmare/uwe5622-firmware.bb
+++ b/recipes-kernel/uwe5622-firwmare/uwe5622-firmware.bb
@ -0,0 +1,20 @@
+DESCRIPTION = "UWE5622 Wifi firmware"
+LICENSE = "CC0-1.0"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/${LICENSE};md5=0ceb3372c9595f0a8067e55da801e4a1"
+
+S = "${WORKDIR}"
+
+COMPATIBLE_MACHINE = "orange-pi-zero2"
+
+SRC_URI += "file://wcnmodem.bin"
+SRC_URI += "file://wifi_2355b001_1ant.ini"
+
+do_install() {
+    install -d ${D}${base_libdir}/firmware
+    install -m 0644 ${S}/wcnmodem.bin ${D}${base_libdir}/firmware/wcnmodem.bin
+    install -m 0644 ${S}/wifi_2355b001_1ant.ini ${D}${base_libdir}/firmware/wifi_2355b001_1ant.ini
+}
+
+FILES:${PN} = "${base_libdir}/*"
+
+PACKAGES = "${PN}"
--- a/recipes-kernel/xradio-firmware/xradio-firmware.bb
+++ b/recipes-kernel/xradio-firmware/xradio-firmware.bb
@ -5,7 +5,7 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/${LICENSE};md5=0ceb3372c9595f0a
 PV = "1.0"
 PR = "r0"

-SRCREV = "bddd21b7f895be9f0c37e435f0a7ac84405c6091"
+SRCREV = "761658e1701c77a0a84706754e6db1a25ee60b82"

 COMPATIBLE_MACHINE = "orange-pi-zero"

@ -20,6 +20,6 @@ do_install() {
    install -m 0644 ${S}/xr819/fw_xr819.bin ${D}${base_libdir}/firmware/xr819/
 }

-FILES_${PN} = "${base_libdir}/*"
+FILES:${PN} = "${base_libdir}/*"

 PACKAGES = "${PN}"
--- a/recipes-kernel/xradio/xradio.bb
+++ b/recipes-kernel/xradio/xradio.bb
@ -1,5 +1,5 @@
 SUMMARY = "Xradio WiFi driver for orangepi-zero"
-LICENSE = "GPLv2"
+LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://LICENSE;md5=a23a74b3f4caf9616230789d94217acb"

 inherit module
@ -7,7 +7,7 @@ inherit module
 PV = "0.1"
 PR = "r0"

-RDEPENDS_${PN} += "xradio-firmware"
+RDEPENDS:${PN} += "xradio-firmware"

 COMPATIBLE_MACHINE = "orange-pi-zero"

--- a/recipes-multimedia/gstreamer/gst-plugin-cedar_git.bb
+++ b/recipes-multimedia/gstreamer/gst-plugin-cedar_git.bb
@ -1,6 +1,6 @@
 SUMMARY = "CedarX Hardware Encoding GStreamer plug-in"
 SECTION = "multimedia"
-LICENSE = "GPLv2"
+LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263"
 HOMEPAGE = "http://github.com/ebutera/gst-plugin-cedar"
 DEPENDS = "gstreamer gst-plugins-base"
@ -10,14 +10,14 @@ inherit autotools pkgconfig
 # 0.10.1 Initial Import
 SRCREV = "908987a74d341be1376895023698667892fe5569"

-SRC_URI = "git://github.com/ebutera/gst-plugin-cedar.git"
+SRC_URI = "git://github.com/ebutera/gst-plugin-cedar.git;protocol=https;branch=master"

 PV = "0.10.1+git${SRCPV}"
 PR = "r1"

 S = "${WORKDIR}/git"

-FILES_${PN} += "${libdir}/gstreamer-0.10/*.so"
-FILES_${PN}-dbg += "${libdir}/gstreamer-0.10/.debug"
-FILES_${PN}-dev += "${libdir}/gstreamer-0.10/*.la"
-FILES_${PN}-staticdev += "${libdir}/gstreamer-0.10/*.a"
+FILES:${PN} += "${libdir}/gstreamer-0.10/*.so"
+FILES:${PN}-dbg += "${libdir}/gstreamer-0.10/.debug"
+FILES:${PN}-dev += "${libdir}/gstreamer-0.10/*.la"
+FILES:${PN}-staticdev += "${libdir}/gstreamer-0.10/*.a"
--- a/recipes-support/sunxi-tools/sunxi-tools_git.bb
+++ b/recipes-support/sunxi-tools/sunxi-tools_git.bb
@ -1,13 +1,13 @@
 DESCRIPTION = "Tools to help hacking Allwinner A10 and A20"

-LICENSE = "GPLv2+"
+LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=97bd67b5d0309e452b637f76e1c9a23c"

 PR = "r0"

 DEPENDS += "libusb"

-SRC_URI = "git://github.com/linux-sunxi/sunxi-tools;protocol=git"
+SRC_URI = "git://github.com/linux-sunxi/sunxi-tools;protocol=https;branch=master"
 SRCREV = "9a3d62aa0c820b3dd42ba3409b2043f4143683cd"

 inherit pkgconfig
@ -16,7 +16,7 @@ S = "${WORKDIR}/git"

 BBCLASSEXTEND = "native nativesdk"

-FILES_${PN} = "${bindir}/*"
+FILES:${PN} = "${bindir}/*"

 CFLAGS = "-std=c99 -D_POSIX_C_SOURCE=200112L -I./include"
 CFLAGS_class-native = "-std=c99 -D_POSIX_C_SOURCE=200112L -I./include"
Author	SHA1	Message	Date
Marek Belisko	7df2e3d132	orange-pi-zero2: Added wifi firmware Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2023-02-02 20:35:35 +01:00
Marek Belisko	577edca3d1	Add UWE5622 wifi driver and required firmwmare Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com> Signed-off-by: pbiel <pbiel7@gmail.com>	2023-02-02 20:35:35 +01:00
Marek Belisko	ea93a2dd03	linux-mainline: Added orangepi-zero-2 support patches Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com> Signed-off-by: pbiel <pbiel7@gmail.com>	2023-02-02 20:35:35 +01:00
Marek Belisko	948205c553	conf: Added machine definition for orange-pi-zero-2 Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com> Signed-off-by: pbiel <pbiel7@gmail.com>	2023-02-02 20:35:30 +01:00
Marek Belisko	fde5948e85	Merge pull request #362 from spanceac/A13_boot_fix Fix boot of A13 based machines	2023-01-31 08:38:29 +01:00
Marek Belisko	7b05a7ea5f	Merge pull request #361 from qpmr/kirkstone-add-pi-one-plus-support conf: machine: Add "Orange Pi One Plus" support	2023-01-31 08:17:42 +01:00
Sebastian Panceac	2dc45f3cdc	Fix boot of A13 based machines This commit backports an u-boot patch that adds a compatible string for the Allwinner Sun4i-A10 I2C controller. This will fix the boot process freeze after SPL stage for A13 based machines Signed-off-by: Sebastian Panceac <spanceac@gmail.com>	2023-01-30 23:31:53 +02:00
Ilja Byckevich	2d229d2ca0	conf: machine: Add "Orange Pi One Plus" support Signed-off-by: Ilja Byckevich <iljabyckevich@gmail.com>	2023-01-30 20:13:27 +03:00
Marek Belisko	d1a076fbea	Merge pull request #360 from linux-sunxi/core-image-sato-fixes Core image sato fixes	2023-01-25 13:31:11 +01:00
Marek Belisko	7371198497	xserver-xorg: Added xshmfence dependency Fixes following: ERROR: Problem encountered: DRI3 requested, but xshmfence not found Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2023-01-23 10:36:20 +01:00
Marek Belisko	35e9d23058	mega-gl: Added more dependencies to fix config issue Fix following: ERROR: Problem encountered: xlib based GLX requires at least one gallium driver Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2023-01-23 10:35:38 +01:00
Marek Belisko	56dec0cd0f	sunxi.inc: Drop xf86-video-turbo It cannot be compiled anymore drop it. Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2023-01-23 10:33:56 +01:00
Marek Belisko	df4da8dd06	Merge pull request #353 from spanceac/patch-2 Use correct arch in sun5i.inc - Kirkstone	2022-12-05 09:24:40 +01:00
Sebastian Panceac	2d86e00d7e	Use correct arch in sun5i.inc Cortex-A8 architecture is ARMv7A. Before this path fix the following failure was triggered when building for "olinuxino-a13" machine: " [..]/meta-sunxi/conf/machine/include/sun5i.inc:3: Could not include required file conf/machine/include/arm/armv8a/tune-cortexa8.inc "	2022-11-29 15:51:19 +02:00
Marek Belisko	5f4a85b92b	Merge pull request #350 from jakub-kozlowicz/kirkstone Add NanoPi Duo2 board support	2022-11-16 09:55:17 +01:00
Jakub Kozłowicz	9aab097e6b	add nanopi duo2 board support	2022-11-15 21:40:54 +01:00
Christophe Blaess	773dc04614	Fix `LICENSE` field of some recipes to correspond to Poky ones.	2022-09-12 07:27:30 +02:00
Anthony Papillon	eeb1cefdd4	Fix inherit distutils3 error	2022-09-09 08:24:40 +02:00
Marek Belisko	ebdbb33410	u-boot: Fix booting issues for 64bit boards In kirkstone we use u-boot 2022.01 which added as mandatory usage of scp. As it's used for power relates stuff and we don't need it atm set to to empty. Without this fix generated u-boot cannot boot. Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-08-24 14:05:50 +02:00
Marek Belisko	fdce4f8674	conf: Added orange-pi-pc2 config Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 21:23:33 +02:00
Marek Belisko	20822ad769	linux-mainline: Fix kernel license warning Fix following: WARNING: linux-mainline-5.15.35-r0 do_package_qa: QA Issue: Recipe LICENSE includes obsolete licenses GPLv2 [obsolete-license] Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 21:23:20 +02:00
Marek Belisko	e8d39837e2	conf: machine: Added nanopi r1 support Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 09:27:42 +02:00
Marek Belisko	3b798310df	u-boot: Added patch for adding nanopi r1 machine support Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 09:27:38 +02:00
Marek Belisko	910bb165a3	conf: Added kirkstone compatible string Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 09:18:12 +02:00
Marek Belisko	9895874a29	sunxi: Use 5.15 as kernel provider Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 09:18:10 +02:00
Marek Belisko	7feb76686f	linux-mainline: Added 5.15 LTS kernel Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 09:17:57 +02:00
Marek Belisko	4735c7766f	atf-sunxi: Fix warnings Fix license and protocol for fetching Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-21 09:17:54 +02:00
Marek Belisko	78c395aab7	sunxi64.inc: Don't set UBOOT_BINARY It's valid for sunxi uboot only and breaks wic so comment it Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-13 10:35:31 +02:00
Marek Belisko	b122bfc272	u-boot: Refresh path Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-13 09:31:24 +02:00
Marek Belisko	752f632e98	atf-sunxi: Fix build issue Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2022-04-13 09:31:07 +02:00
Marek Belisko	7dcc9a0069	Merge pull request #337 from StealthyCoder/master conf: machine: add orange-pi-r1	2022-01-27 19:32:46 +01:00
Eric Bode	ef5b9a675b	conf: machine: add orange-pi-r1 Add the machine configuration for the Orange Pi R1. Signed-off-by: Eric Bode <eric.bode@foundries.io>	2022-01-20 09:50:05 +01:00
Marek Belisko	b9a5f19db2	Merge pull request #336 from abrodkin/abrodkin-updates-2022.01 Minor updates	2022-01-04 21:05:51 +01:00
Alexey Brodkin	13fe88d754	linux-sunxi_3.4: Switch GitHub protocol from git to https This mutes bitbake warning: ----------------------------->8------------------------ WARNING: .../meta-sunxi/recipes-kernel/linux/linux-sunxi_3.4.bb: URL: git://github.com/linux-sunxi/linux-sunxi.git;branch=sunxi-3.4;protocol=git uses git protocol which is no longer supported by github. Please change to ;protocol=https in the url. ----------------------------->8------------------------ Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>	2022-01-04 20:23:14 +03:00
Alexey Brodkin	6ece692e9b	sunxi-boards: Bump version For some reason it was not updated since 2015 and there seem to be quite some changes in the repo. Also switch protocol for getting sources from GitHub from git to https to get rid of the bitbake warning. Signed-off-by: Alexey Brodkin <alexey.brodkin@gmail.com>	2022-01-04 20:21:07 +03:00
Marek Belisko	c39a024199	Merge pull request #334 from clementperon/to_merge Fixes	2022-01-03 18:02:21 +01:00
Clément Péron	545d824ccf	atf-sunxi: fix new syntax	2022-01-02 21:46:06 +01:00
Clément Péron	45a666ac43	classes: sdcard_image-sunxi: fix depends Signed-off-by: Clément Péron <peron.clem@gmail.com>	2022-01-02 21:20:28 +01:00
Clément Péron	a508443f52	recipes: use github https and specify master branch to fix warnings Signed-off-by: Clément Péron <peron.clem@gmail.com>	2022-01-02 19:47:59 +01:00
Clément Péron	0225772064	conf: layer: oe layer is not mandatory Signed-off-by: Clément Péron <peron.clem@gmail.com>	2022-01-02 19:46:55 +01:00
Clément Péron	3a7f7e1199	conf: sunxi.inc: bump linux mainline preferred version to 5.10 Signed-off-by: Clément Péron <peron.clem@gmail.com>	2022-01-02 19:39:34 +01:00
Marek Belisko	a67a0c58df	Merge pull request #331 from mpromonet/master Fix build for nanopi neo air	2021-12-15 21:10:25 +01:00
Michel Promonet	8852666a80	Merge branch 'master' into master	2021-12-15 21:07:43 +01:00
Marek Belisko	e584cd9084	Merge pull request #333 from MatScheifi/honister Fix SD Image Build for honister	2021-12-15 07:57:54 +01:00
Matthias Scheifinger	deb667015d	cover up build error with kernel headers	2021-12-10 10:59:19 +01:00
Matthias Scheifinger	503102a841	move ext4 dep	2021-12-10 10:51:18 +01:00
Matthias Scheifinger	02bf3fcd80	fix sd-card creation - use new syntax	2021-12-10 10:45:50 +01:00
mpromonet	7bc87817a1	this is integrate in kernel mainline since `88c23c05ef (diff-9c6eb3684dca738538e1dcb691cb9dd7684d6d5da0e963b5ba5a7e47b8b95e21)` and breaks the build Signed-off-by: mpromonet <michel.promonet@free.fr>	2021-11-12 15:42:27 +01:00
Marek Belisko	080eb40635	conf: Set LAYERSERIES_COMPAT to honister only It's not anymore compatible with old releases due new syntax. Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2021-09-20 10:19:34 +02:00
Marek Belisko	dcd5790e87	conf: machine: Fix paths for tunes Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2021-09-20 09:39:40 +02:00
Marek Belisko	6a1103b726	misc: More fixes for new syntax Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2021-09-20 09:39:18 +02:00
Marek Belisko	668bc6824c	conf: Added honister layer to LAYERSERIAS_COMPAT Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2021-09-20 09:27:46 +02:00
Marek Belisko	fd330bbb55	Merge pull request #328 from dev-0x7C6/master layer: convert to new override syntax 💥	2021-09-20 09:26:15 +02:00
Bartłomiej Burdukiewicz	e66258ad7a	layer: convert to new override syntax 💥 OE/Yocto is migration towards new override syntax, current master (upcomming honister release) will not tolerate "_" as override operator. New override syntax will be backported to dunfell, gatesgarth, hardknott releases. Signed-off-by: Bartłomiej Burdukiewicz <bartlomiej.burdukiewicz@gmail.com>	2021-08-23 18:47:19 +02:00
Marek Belisko	3caf03d9fc	xradio-firmware: Update to latest master Old version seems to have random crashes when using softap functionality Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>	2021-06-30 11:08:56 +02:00
Marek Belisko	278bd31312	Merge pull request #322 from linux-sunxi/mbe-bananapi-m64 bananapi m64	2021-05-21 21:16:33 +02:00
				`@ -0,0 +1 @@`
				`PACKAGECONFIG:class-target = "opengl x11 gallium"`