mirror of
https://github.com/linux-sunxi/meta-sunxi.git
synced 2025-07-29 20:20:32 +02:00
Compare commits
20 Commits
42f4ad510d
...
kirkstone-
Author | SHA1 | Date | |
---|---|---|---|
318656473b | |||
7e463b6b37 | |||
1370b3c0d4 | |||
60af800ec5 | |||
b5d9371a21 | |||
fde5948e85 | |||
7b05a7ea5f | |||
2dc45f3cdc | |||
2d229d2ca0 | |||
d1a076fbea | |||
7371198497 | |||
35e9d23058 | |||
56dec0cd0f | |||
df4da8dd06 | |||
2d86e00d7e | |||
5f4a85b92b | |||
9aab097e6b | |||
773dc04614 | |||
eeb1cefdd4 | |||
ebdbb33410 |
@ -6,7 +6,6 @@ Official sunxi OpenEmbedded layer for Allwinner-based boards.
|
||||
This layer depends on the additional layers:
|
||||
|
||||
* [meta-openembedded/meta-oe](http://git.openembedded.org/meta-openembedded/tree/meta-oe)
|
||||
* [meta-arm](https://git.yoctoproject.org/meta-arm)
|
||||
|
||||
Tested with core-image-base.
|
||||
|
||||
@ -17,11 +16,6 @@ Maintainers:
|
||||
* Sergey Lapin <slapin@ossfans.org>
|
||||
* Marek Belisko <marek.belisko@gmail.com>
|
||||
|
||||
Community
|
||||
===========
|
||||
|
||||
You can reach community + ask your question on gitter: https://matrix.to/#/#meta-sunxi:gitter.im
|
||||
|
||||
Kernel / U-Boot Version
|
||||
===========
|
||||
Most Allwinner devices and hardware are supported in mainline kernel and U-Boot, so this layer builds mainline by default.
|
||||
|
129
classes/sdcard_image-sunxi.bbclass
Normal file
129
classes/sdcard_image-sunxi.bbclass
Normal file
@ -0,0 +1,129 @@
|
||||
inherit image_types
|
||||
|
||||
#
|
||||
# Create an image that can by written onto a SD card using dd.
|
||||
# Originally written for rasberrypi adapt for the needs of allwinner sunxi based boards
|
||||
#
|
||||
# The disk layout used is:
|
||||
#
|
||||
# 0 -> 8*1024 - reserverd
|
||||
# 8*1024 -> - arm combined spl/u-boot or aarch64 spl
|
||||
# 40*1024 -> - aarch64 u-boot
|
||||
# 2048*1024 -> BOOT_SPACE - bootloader and kernel
|
||||
#
|
||||
#
|
||||
|
||||
# Use an uncompressed ext4 by default as rootfs
|
||||
SDIMG_ROOTFS_TYPE ?= "ext4"
|
||||
|
||||
# This image depends on the rootfs image
|
||||
IMAGE_TYPEDEP:sunxi-sdimg = "${SDIMG_ROOTFS_TYPE}"
|
||||
|
||||
# Boot partition volume id
|
||||
BOOTDD_VOLUME_ID ?= "boot"
|
||||
|
||||
# Boot partition size [in KiB]
|
||||
BOOT_SPACE ?= "40960"
|
||||
|
||||
# First partition begin at sector 2048 : 2048*1024 = 2097152
|
||||
IMAGE_ROOTFS_ALIGNMENT = "2048"
|
||||
|
||||
SDIMG_ROOTFS = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.${SDIMG_ROOTFS_TYPE}"
|
||||
|
||||
do_image_sunxi_sdimg[depends] += " \
|
||||
parted-native:do_populate_sysroot \
|
||||
mtools-native:do_populate_sysroot \
|
||||
dosfstools-native:do_populate_sysroot \
|
||||
virtual/kernel:do_deploy \
|
||||
virtual/bootloader:do_deploy \
|
||||
"
|
||||
|
||||
# SD card image name
|
||||
SDIMG = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.sunxi-sdimg"
|
||||
|
||||
IMAGE_CMD:sunxi-sdimg () {
|
||||
|
||||
# Align partitions
|
||||
BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE} + ${IMAGE_ROOTFS_ALIGNMENT} - 1)
|
||||
BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE_ALIGNED} - ${BOOT_SPACE_ALIGNED} % ${IMAGE_ROOTFS_ALIGNMENT})
|
||||
SDIMG_SIZE=$(expr ${IMAGE_ROOTFS_ALIGNMENT} + ${BOOT_SPACE_ALIGNED} + $ROOTFS_SIZE + ${IMAGE_ROOTFS_ALIGNMENT})
|
||||
|
||||
# Initialize sdcard image file
|
||||
dd if=/dev/zero of=${SDIMG} bs=1 count=0 seek=$(expr 1024 \* ${SDIMG_SIZE})
|
||||
|
||||
# Create partition table
|
||||
parted -s ${SDIMG} mklabel msdos
|
||||
# Create boot partition and mark it as bootable
|
||||
parted -s ${SDIMG} unit KiB mkpart primary fat32 ${IMAGE_ROOTFS_ALIGNMENT} $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT})
|
||||
parted -s ${SDIMG} set 1 boot on
|
||||
# Create rootfs partition
|
||||
parted -s ${SDIMG} unit KiB mkpart primary ext2 $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT}) $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT} \+ ${ROOTFS_SIZE})
|
||||
parted ${SDIMG} print
|
||||
|
||||
# Create a vfat image with boot files
|
||||
BOOT_BLOCKS=$(LC_ALL=C parted -s ${SDIMG} unit b print | awk '/ 1 / { print substr($4, 1, length($4 -1)) / 512 /2 }')
|
||||
rm -f ${WORKDIR}/boot.img
|
||||
mkfs.vfat -n "${BOOTDD_VOLUME_ID}" -S 512 -C ${WORKDIR}/boot.img $BOOT_BLOCKS
|
||||
|
||||
mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}.bin ::${KERNEL_IMAGETYPE}
|
||||
|
||||
# Copy device tree file
|
||||
if test -n "${KERNEL_DEVICETREE}"; then
|
||||
for DTS_FILE in ${KERNEL_DEVICETREE}; do
|
||||
DTS_BASE_NAME=`basename ${DTS_FILE} | awk -F "." '{print $1}'`
|
||||
DTS_DIR_NAME=`dirname ${DTS_FILE}`
|
||||
if [ -e ${DEPLOY_DIR_IMAGE}/"${DTS_BASE_NAME}.dtb" ]; then
|
||||
|
||||
if [ ${DTS_FILE} != ${DTS_BASE_NAME}.dtb ]; then
|
||||
mmd -i ${WORKDIR}/boot.img ::/${DTS_DIR_NAME}
|
||||
fi
|
||||
|
||||
kernel_bin="`readlink ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}.bin`"
|
||||
kernel_bin_for_dtb="`readlink ${DEPLOY_DIR_IMAGE}/${DTS_BASE_NAME}.dtb | sed "s,$DTS_BASE_NAME,${KERNEL_IMAGETYPE},g;s,\.dtb$,.bin,g"`"
|
||||
if [ $kernel_bin = $kernel_bin_for_dtb ]; then
|
||||
mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${DTS_BASE_NAME}.dtb ::/${DTS_FILE}
|
||||
fi
|
||||
fi
|
||||
done
|
||||
fi
|
||||
|
||||
if [ -e "${DEPLOY_DIR_IMAGE}/fex.bin" ]
|
||||
then
|
||||
mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/fex.bin ::script.bin
|
||||
fi
|
||||
if [ -e "${DEPLOY_DIR_IMAGE}/boot.scr" ]
|
||||
then
|
||||
mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::boot.scr
|
||||
fi
|
||||
if [ -e "${DEPLOY_DIR_IMAGE}/splash.bmp" ]
|
||||
then
|
||||
mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/splash.bmp ::splash.bmp
|
||||
fi
|
||||
|
||||
|
||||
# Add stamp file
|
||||
echo "${IMAGE_NAME}" > ${WORKDIR}/image-version-info
|
||||
mcopy -i ${WORKDIR}/boot.img -v ${WORKDIR}/image-version-info ::
|
||||
|
||||
# Burn Partitions
|
||||
dd if=${WORKDIR}/boot.img of=${SDIMG} conv=notrunc seek=1 bs=$(expr ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) && sync && sync
|
||||
# If SDIMG_ROOTFS_TYPE is a .xz file use xzcat
|
||||
if echo "${SDIMG_ROOTFS_TYPE}" | egrep -q "*\.xz"
|
||||
then
|
||||
xzcat ${SDIMG_ROOTFS} | dd of=${SDIMG} conv=notrunc seek=1 bs=$(expr 1024 \* ${BOOT_SPACE_ALIGNED} + ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) && sync && sync
|
||||
else
|
||||
dd if=${SDIMG_ROOTFS} of=${SDIMG} conv=notrunc seek=1 bs=$(expr 1024 \* ${BOOT_SPACE_ALIGNED} + ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) && sync && sync
|
||||
fi
|
||||
|
||||
# write u-boot-spl at the begining of sdcard in one shot
|
||||
SPL_FILE=$(basename ${SPL_BINARY})
|
||||
dd if=${DEPLOY_DIR_IMAGE}/${SPL_FILE} of=${SDIMG} bs=1024 seek=8 conv=notrunc
|
||||
}
|
||||
|
||||
# write uboot.itb for arm64 boards
|
||||
IMAGE_CMD_sunxi-sdimg:append:sun50i () {
|
||||
if [ -e "${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY}" ]
|
||||
then
|
||||
dd if=${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY} of=${SDIMG} bs=1024 seek=40 conv=notrunc
|
||||
fi
|
||||
}
|
@ -4,14 +4,14 @@ BBPATH .= ":${LAYERDIR}"
|
||||
# We have a recipes directory, add to BBFILES
|
||||
BBFILES += "${LAYERDIR}/recipes*/*/*.bb ${LAYERDIR}/recipes*/*/*.bbappend"
|
||||
|
||||
BBFILE_COLLECTIONS += "sunxi"
|
||||
BBFILE_PATTERN_sunxi := "^${LAYERDIR}/"
|
||||
BBFILE_PRIORITY_sunxi = "10"
|
||||
BBFILE_COLLECTIONS += "meta-sunxi"
|
||||
BBFILE_PATTERN_meta-sunxi := "^${LAYERDIR}/"
|
||||
BBFILE_PRIORITY_meta-sunxi = "10"
|
||||
|
||||
# This should only be incremented on significant changes that will
|
||||
# cause compatibility issues with other layers
|
||||
LAYERVERSION_sunxi = "1"
|
||||
LAYERVERSION_meta-sunxi = "1"
|
||||
|
||||
LAYERDEPENDS_sunxi = "core meta-python meta-arm"
|
||||
LAYERDEPENDS_meta-sunxi = "core meta-python"
|
||||
|
||||
LAYERSERIES_COMPAT_sunxi = "styhead"
|
||||
LAYERSERIES_COMPAT_meta-sunxi = "honister kirkstone"
|
||||
|
@ -1,8 +0,0 @@
|
||||
require conf/machine/include/sunxi64.inc
|
||||
|
||||
DEFAULTTUNE ?= "cortexa53-crypto"
|
||||
require conf/machine/include/arm/armv8a/tune-cortexa53.inc
|
||||
|
||||
MACHINEOVERRIDES =. "sun50i:"
|
||||
|
||||
SOC_FAMILY = "sun50i-h6"
|
@ -1,8 +0,0 @@
|
||||
require conf/machine/include/sunxi64.inc
|
||||
|
||||
DEFAULTTUNE ?= "cortexa53-crypto"
|
||||
require conf/machine/include/arm/armv8a/tune-cortexa53.inc
|
||||
|
||||
MACHINEOVERRIDES =. "sun50i:"
|
||||
|
||||
SOC_FAMILY = "sun50i-h616"
|
@ -14,13 +14,14 @@ XSERVER = "xserver-xorg \
|
||||
xf86-input-keyboard"
|
||||
|
||||
PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
|
||||
PREFERRED_VERSION_linux-mainline ?= "6.6.%"
|
||||
PREFERRED_VERSION_linux-mainline ?= "5.15.%"
|
||||
PREFERRED_PROVIDER_u-boot ?= "u-boot"
|
||||
PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
|
||||
|
||||
KERNEL_IMAGETYPE ?= "uImage"
|
||||
|
||||
IMAGE_FSTYPES += "ext3 tar.gz wic.gz wic.bmap"
|
||||
IMAGE_CLASSES += "sdcard_image-sunxi"
|
||||
IMAGE_FSTYPES += "ext3 tar.gz sunxi-sdimg wic.gz wic.bmap"
|
||||
|
||||
MACHINE_EXTRA_RRECOMMENDS = "kernel-modules"
|
||||
|
||||
@ -30,7 +31,7 @@ UBOOT_ENTRYPOINT ?= "0x40008000"
|
||||
|
||||
SPL_BINARY ?= "u-boot-sunxi-with-spl.bin"
|
||||
|
||||
SERIAL_CONSOLES ?= "115200;ttyS0"
|
||||
SERIAL_CONSOLE ?= "115200 ttyS0"
|
||||
MACHINE_FEATURES ?= "alsa apm keyboard rtc serial screen usbgadget usbhost vfat"
|
||||
|
||||
# Mimic the sdcard_image-sunxi.bbclass
|
||||
|
@ -4,13 +4,13 @@ include conf/machine/include/soc-family.inc
|
||||
MACHINEOVERRIDES =. "sunxi:sunxi64:"
|
||||
|
||||
PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
|
||||
PREFERRED_VERSION_linux-mainline ?= "6.6.%"
|
||||
PREFERRED_PROVIDER_u-boot ?= "u-boot"
|
||||
PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
|
||||
|
||||
KERNEL_IMAGETYPE ?= "Image"
|
||||
|
||||
IMAGE_FSTYPES += "ext4 tar.gz wic.gz wic.bmap"
|
||||
IMAGE_CLASSES += "sdcard_image-sunxi"
|
||||
IMAGE_FSTYPES += "ext4 tar.gz sunxi-sdimg"
|
||||
|
||||
MACHINE_EXTRA_RRECOMMENDS = "kernel-modules"
|
||||
|
||||
@ -20,33 +20,7 @@ UBOOT_ENTRYPOINT ?= "0x40008000"
|
||||
UBOOT_LOADADDRESS ?= "0x400080OB00"
|
||||
|
||||
#UBOOT_BINARY ?= "u-boot.itb"
|
||||
SPL_BINARY ?= "u-boot-sunxi-with-spl.bin"
|
||||
SPL_BINARY ?= "spl/sunxi-spl.bin"
|
||||
|
||||
SERIAL_CONSOLES ?= "115200;ttyS0"
|
||||
SERIAL_CONSOLE ?= "115200 ttyS0"
|
||||
MACHINE_FEATURES ?= "alsa apm keyboard rtc serial screen usbgadget usbhost vfat"
|
||||
|
||||
# arm64 dbts are under <vendor>/dts but is deployed under DEPLOYDIR
|
||||
do_fix_device_tree_location() {
|
||||
|
||||
for kdt in ${KERNEL_DEVICETREE}
|
||||
do
|
||||
local dbt_dir=$(dirname ${kdt})
|
||||
if [ "." != "${dbt_dir}" ] ; then
|
||||
local dbt=$(basename ${kdt})
|
||||
local dst=${DEPLOY_DIR_IMAGE}/${dbt_dir}/${dbt}
|
||||
if [ ! -f ${dst} ] ; then
|
||||
mkdir -p ${DEPLOY_DIR_IMAGE}/$dbt_dir
|
||||
ln -s ${DEPLOY_DIR_IMAGE}/${dbt} ${dst}
|
||||
fi
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
|
||||
addtask do_fix_device_tree_location after do_write_wks_template before do_image_wic
|
||||
|
||||
SUNXI_BOOT_SPACE ?= "40"
|
||||
IMAGE_BOOT_FILES ?= "${KERNEL_IMAGETYPE} boot.scr ${KERNEL_DEVICETREE}"
|
||||
|
||||
WKS_FILES ?= "sunxi-sdcard-image.wks.in"
|
||||
WKS_FILE_DEPENDS ?= "virtual/kernel u-boot"
|
||||
|
@ -1,10 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: Lamobo R1
|
||||
#@DESCRIPTION: Machine configuration for the lamobo r1, based on allwinner A20 CPU http://bananapi.org/
|
||||
|
||||
require conf/machine/include/sun7i.inc
|
||||
|
||||
MACHINE_EXTRA_RRECOMMENDS = " kernel-modules kernel-devicetree"
|
||||
KERNEL_DEVICETREE = "sun7i-a20-lamobo-r1.dtb"
|
||||
UBOOT_MACHINE = "Lamobo_R1_config"
|
||||
SUNXI_FEX_FILE = "sys_config/a20/lamobo-r1.fex"
|
@ -1,10 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: MangoPi MQ-R T113-S3
|
||||
#@DESCRIPTION: Machine configuration for the MangoPi MQ-R, based on the Allwinner T113-S3 CPU
|
||||
|
||||
require conf/machine/include/sun8i.inc
|
||||
|
||||
KERNEL_DEVICETREE = "sun8i-t113s-mangopi-mq-r-t113.dtb"
|
||||
KERNEL_IMAGETYPE = "zImage"
|
||||
|
||||
UBOOT_MACHINE = "mangopi_mq_r_defconfig"
|
9
conf/machine/nanopi-duo2.conf
Normal file
9
conf/machine/nanopi-duo2.conf
Normal file
@ -0,0 +1,9 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: nanopi-duo2
|
||||
#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi Duo2, based on the Allwinner H3 CPU
|
||||
|
||||
require conf/machine/include/sun8i.inc
|
||||
|
||||
KERNEL_DEVICETREE = "sun8i-h3-nanopi-duo2.dtb"
|
||||
UBOOT_MACHINE = "nanopi_duo2_defconfig"
|
||||
|
@ -1,28 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: orange-pi-3lts
|
||||
#@DESCRIPTION: Machine configuration for the Orange Pi 3 LTS , based on Allwinner H6 CPU
|
||||
# Note: Some boards have faulty RTC a fix is included by default
|
||||
# a workarround in the dts ins include by default but in can removed adding
|
||||
# KERNEL_FEATURES:remove = " bsp/orange-pi-3lts/fix-rtc.scc" to local.conf
|
||||
|
||||
require conf/machine/include/sun50i-h6.inc
|
||||
|
||||
KERNEL_DEVICETREE = "allwinner/sun50i-h6-orangepi-3-lts.dtb"
|
||||
UBOOT_MACHINE = "orangepi_3_lts_defconfig"
|
||||
|
||||
SPL_BINARY = "u-boot-sunxi-with-spl.bin"
|
||||
|
||||
# as for now neither graphics nor audio is supported
|
||||
MACHINE_FEATURES:remove = " x11 alsa rtc"
|
||||
MACHINE_FEATURES:append = " bluetooth wifi"
|
||||
|
||||
# fiwrware needed for wifi + bt
|
||||
MACHINE_EXTRA_RRECOMMENDS += " uwe5622-firmware"
|
||||
|
||||
# Load modules for wifi & bt
|
||||
# Note: fo wifi a custom hci attach userspace sofware is needed that is not included in the layer
|
||||
KERNEL_MODULE_AUTOLOAD += " sprdwl_ng sprdbt_tty "
|
||||
|
||||
|
||||
|
||||
|
@ -1,9 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: orange-pi-lite
|
||||
#@DESCRIPTION: Machine configuration for the orange-pi-lite, based on Allwinner H3 CPU
|
||||
|
||||
require conf/machine/include/sun8i.inc
|
||||
|
||||
KERNEL_DEVICETREE = "sun8i-h3-orangepi-lite.dtb"
|
||||
UBOOT_MACHINE = "orangepi_lite_defconfig"
|
||||
|
@ -3,7 +3,7 @@
|
||||
#@DESCRIPTION: Machine configuration for the Orange Pi One Plus, based on Allwinner H6 CPU
|
||||
|
||||
|
||||
require conf/machine/include/sun50i-h6.inc
|
||||
require conf/machine/include/sun50i.inc
|
||||
|
||||
KERNEL_DEVICETREE = "allwinner/sun50i-h6-orangepi-one-plus.dtb"
|
||||
UBOOT_MACHINE = "orangepi_one_plus_defconfig"
|
||||
|
@ -1,12 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: orange-pi-prime
|
||||
#@DESCRIPTION: Machine configuration for the orange-pi-prime, base on Allwinner H5 CPU
|
||||
|
||||
require conf/machine/include/sun50i.inc
|
||||
require conf/machine/include/hardware/ap6212a.inc
|
||||
|
||||
KERNEL_DEVICETREE = "allwinner/sun50i-h5-orangepi-prime.dtb"
|
||||
UBOOT_MACHINE = "orangepi_prime_defconfig"
|
||||
|
||||
MACHINE_FEATURES:append = " bluetooth wifi"
|
||||
MACHINE_EXTRA_RRECOMMENDS:append = " linux-firmware-rtl8723"
|
@ -1,6 +1,6 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: orange-pi-zero
|
||||
#@DESCRIPTION: Machine configuration for the orange-pi-zero, based on Allwinner H2 CPU
|
||||
#@NAME: orange-pi-one
|
||||
#@DESCRIPTION: Machine configuration for the orange-pi-one, base on allwinner H3 CPU
|
||||
|
||||
require conf/machine/include/sun8i.inc
|
||||
|
||||
|
@ -1,21 +0,0 @@
|
||||
#@TYPE: Machine
|
||||
#@NAME: orange-pi-zero-2
|
||||
#@DESCRIPTION: Machine configuration for the orange-pi-zero-2, based on Allwinner H616 CPU
|
||||
|
||||
require conf/machine/include/sun50i-h616.inc
|
||||
|
||||
KERNEL_DEVICETREE = "allwinner/sun50i-h616-orangepi-zero2.dtb"
|
||||
UBOOT_MACHINE = "orangepi_zero2_defconfig"
|
||||
|
||||
SPL_BINARY = "u-boot-sunxi-with-spl.bin"
|
||||
|
||||
# as for now neither graphics nor audio is supported
|
||||
MACHINE_FEATURES:remove = "alsa x11"
|
||||
MACHINE_FEATURES:append = "bluetooth wifi"
|
||||
|
||||
MACHINE_EXTRA_RRECOMMENDS = "uwe5622-firmware"
|
||||
|
||||
# Load modules for wifi & bt
|
||||
# Note: fo wifi a custom hci attach userspace sofware is needed that is not included in the layer
|
||||
KERNEL_MODULE_AUTOLOAD += " sprdwl_ng sprdbt_tty "
|
||||
|
@ -0,0 +1,26 @@
|
||||
From 087b9306659effac870b4794c0f775ce3d7208c5 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
Date: Wed, 13 Apr 2022 08:09:29 +0200
|
||||
Subject: [PATCH] Use same type as in declaration
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
services/std_svc/psci/psci_common.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c
|
||||
index 75f52f538..918a719f6 100644
|
||||
--- a/services/std_svc/psci/psci_common.c
|
||||
+++ b/services/std_svc/psci/psci_common.c
|
||||
@@ -261,7 +261,7 @@ void psci_acquire_afflvl_locks(int start_afflvl,
|
||||
******************************************************************************/
|
||||
void psci_release_afflvl_locks(int start_afflvl,
|
||||
int end_afflvl,
|
||||
- aff_map_node_t *mpidr_nodes[])
|
||||
+ mpidr_aff_map_nodes_t mpidr_nodes)
|
||||
{
|
||||
int level;
|
||||
|
||||
--
|
||||
2.25.1
|
||||
|
29
recipes-bsp/atf/atf-sunxi_git.bb
Normal file
29
recipes-bsp/atf/atf-sunxi_git.bb
Normal file
@ -0,0 +1,29 @@
|
||||
DESCRIPTION = "ARM Trusted Firmware Allwinner"
|
||||
LICENSE = "BSD-3-Clause"
|
||||
LIC_FILES_CHKSUM = "file://license.md;md5=829bdeb34c1d9044f393d5a16c068371"
|
||||
|
||||
SRC_URI = "git://github.com/apritzel/arm-trusted-firmware;nobranch=1;protocol=https"
|
||||
SRCREV = "aa75c8da415158a94b82a430b2b40000778e851f"
|
||||
|
||||
SRC_URI:append = " file://0001-Use-same-type-as-in-declaration.patch"
|
||||
|
||||
S = "${WORKDIR}/git"
|
||||
B = "${WORKDIR}/build"
|
||||
|
||||
COMPATIBLE_MACHINE = "(sun50i)"
|
||||
|
||||
PLATFORM:sun50i = "sun50iw1p1"
|
||||
|
||||
LDFLAGS[unexport] = "1"
|
||||
|
||||
do_compile() {
|
||||
oe_runmake -C ${S} BUILD_BASE=${B} \
|
||||
CROSS_COMPILE=${TARGET_PREFIX} \
|
||||
PLAT=${PLATFORM} \
|
||||
bl31 \
|
||||
all
|
||||
}
|
||||
|
||||
do_install() {
|
||||
install -D -p -m 0644 ${B}/${PLATFORM}/release/bl31.bin ${DEPLOY_DIR_IMAGE}/bl31.bin
|
||||
}
|
@ -1,7 +0,0 @@
|
||||
COMPATIBLE_MACHINE:sunxi = "(sun50i|sun50i-h616|sun50i-h6)"
|
||||
|
||||
TFA_PLATFORM:sun50i = "sun50i_a64"
|
||||
TFA_PLATFORM:sun50i-h6 = "sun50i_h6"
|
||||
TFA_PLATFORM:sun50i-h616 = "sun50i_h616"
|
||||
|
||||
TFA_BUILD_TARGET:sunxi = "bl31"
|
@ -3,7 +3,7 @@ From: Florin Sarbu <florin@resin.io>
|
||||
Date: Wed, 12 Sep 2018 14:22:49 +0200
|
||||
Subject: [PATCH] nanopi_neo_air_defconfig: Enable eMMC support
|
||||
|
||||
Upstream-Status: Pending
|
||||
Upstream-status: Pending
|
||||
Signed-off-by: Florin Sarbu <florin@resin.io>
|
||||
|
||||
---
|
||||
|
@ -5,8 +5,6 @@ Subject: [PATCH] Added nanopi-r1 board support
|
||||
|
||||
Patch taken from : https://github.com/armbian/build/blob/master/patch/u-boot/u-boot-sunxi/add-nanopi-r1-and-duo2.patch
|
||||
|
||||
Upstream-Status: Pending
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
diff --git a/configs/nanopi_r1_defconfig b/configs/nanopi_r1_defconfig
|
||||
|
@ -0,0 +1,28 @@
|
||||
diff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig
|
||||
new file mode 100644
|
||||
index 0000000..1e51018
|
||||
--- /dev/null
|
||||
+++ b/configs/nanopi_duo2_defconfig
|
||||
@@ -0,0 +1,21 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_SUNXI=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
+CONFIG_MACH_SUN8I_H3=y
|
||||
+CONFIG_DRAM_CLK=408
|
||||
+CONFIG_DRAM_ZQ=3881979
|
||||
+CONFIG_DRAM_ODT_EN=y
|
||||
+# CONFIG_VIDEO_DE2 is not set
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-duo2"
|
||||
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
+CONFIG_CONSOLE_MUX=y
|
||||
+CONFIG_SPL=y
|
||||
+CONFIG_SYS_CLK_FREQ=480000000
|
||||
+# CONFIG_CMD_IMLS is not set
|
||||
+# CONFIG_CMD_FLASH is not set
|
||||
+# CONFIG_CMD_FPGA is not set
|
||||
+CONFIG_SPL_SPI_SUNXI=y
|
||||
+CONFIG_SUN8I_EMAC=y
|
||||
+CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
|
||||
|
@ -1,58 +0,0 @@
|
||||
From: Anne Macedo <retpolanne@posteo.net>
|
||||
Date: Tue, 11 Jul 2023 00:39:58 +0000
|
||||
Subject: [PATCH] sunxi: H6: Enable Ethernet on Orange Pi One Plus
|
||||
|
||||
Enable Ethernet on Orange Pi One Plus by using the correct phy for
|
||||
Realtek RTL8211E instead of the Generic One. Also use CONFIG_MACPWR to
|
||||
turn on ethernet on startup.
|
||||
|
||||
After this patch is applied, a few issues can be seen:
|
||||
|
||||
- there's still a PHY reset timed out error that doesn't seem to cause
|
||||
any impacts to the overall connection
|
||||
|
||||
- sometimes the emac driver times out after reset (yellow LED turns on
|
||||
and never blinks)
|
||||
|
||||
For future patches: for now, CONFIG_MACPWR is the only way to enable
|
||||
Ethernet on boot. There's already code on the dts for using the 3v3-gmac
|
||||
regulator. However, it is not probed on boot, so it only starts after a
|
||||
"regulator status" command is issued.
|
||||
|
||||
More details about the troubleshooting on [1].
|
||||
|
||||
Upstream-Status: Submitted
|
||||
|
||||
[1] https://lore.kernel.org/u-boot/4wsvwgy56e2xfgtvioru2tf2ofkqprlts36qggivxogww6pn5j@4jk63zxhzhag/
|
||||
|
||||
Signed-off-by: Anne Macedo <retpolanne@posteo.net>
|
||||
---
|
||||
arch/arm/dts/sun50i-h6-orangepi-one-plus.dts | 2 +-
|
||||
configs/orangepi_one_plus_defconfig | 4 ++++
|
||||
2 files changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
|
||||
index 29a081e72a..6427c58f8a 100644
|
||||
--- a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
|
||||
+++ b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
|
||||
@@ -37,7 +37,7 @@
|
||||
|
||||
&mdio {
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
- compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ compatible = "ethernet-phy-id001c.c915", "ethernet-phy-ieee802.3-c22" ;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig
|
||||
index aa5f540eb1..a1835492db 100644
|
||||
--- a/configs/orangepi_one_plus_defconfig
|
||||
+++ b/configs/orangepi_one_plus_defconfig
|
||||
@@ -8,3 +8,7 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
+CONFIG_SUN8I_EMAC=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_PHY_ETHERNET_ID=y
|
||||
+CONFIG_MACPWR="PD6"
|
@ -1,421 +0,0 @@
|
||||
From 9966dda20246285abf8b417bd251d5a4bea3e423 Mon Sep 17 00:00:00 2001
|
||||
From: Juliano Dorigão <jdorigao@gmail.com>
|
||||
Date: Fri, 3 Mar 2023 16:11:30 -0400
|
||||
Subject: [PATCH] OrangePi 3 LTS support
|
||||
|
||||
Upstream-Status: Pending
|
||||
---
|
||||
arch/arm/dts/Makefile | 1 +
|
||||
arch/arm/dts/sun50i-h6-orangepi-3-lts.dts | 361 ++++++++++++++++++++++
|
||||
configs/orangepi_3_lts_defconfig | 19 ++
|
||||
3 files changed, 381 insertions(+)
|
||||
create mode 100644 arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
|
||||
create mode 100644 configs/orangepi_3_lts_defconfig
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index 43951a77..8dbbb6f4 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -710,6 +710,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
|
||||
dtb-$(CONFIG_MACH_SUN50I_H6) += \
|
||||
sun50i-h6-beelink-gs1.dtb \
|
||||
sun50i-h6-orangepi-3.dtb \
|
||||
+ sun50i-h6-orangepi-3-lts.dtb \
|
||||
sun50i-h6-orangepi-lite2.dtb \
|
||||
sun50i-h6-orangepi-one-plus.dtb \
|
||||
sun50i-h6-pine-h64.dtb \
|
||||
diff --git a/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts b/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
|
||||
new file mode 100644
|
||||
index 00000000..67f38b8a
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
|
||||
@@ -0,0 +1,361 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+// Copyright (C) 2023 Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
+// Based on sun50i-h6-orangepi-3.dts, which is:
|
||||
+// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "sun50i-h6.dtsi"
|
||||
+#include "sun50i-h6-cpu-opp.dtsi"
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "OrangePi 3 LTS";
|
||||
+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
|
||||
+
|
||||
+ aliases {
|
||||
+ ethernet0 = &emac;
|
||||
+ serial0 = &uart0;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_con_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_out_con>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ext_osc32k: ext_osc32k_clk {
|
||||
+ #clock-cells = <0>;
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "ext_osc32k";
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led-0 {
|
||||
+ label = "orangepi:red:power";
|
||||
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
|
||||
+ };
|
||||
+
|
||||
+ led-1 {
|
||||
+ label = "orangepi:green:status";
|
||||
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
|
||||
+ default-state = "on";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc5v: vcc5v {
|
||||
+ /* board wide 5V supply directly from the DC jack */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_gmac_3v3: gmac-3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "gmac-3v3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ startup-delay-us = <150000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc33_wifi: vcc33-wifi {
|
||||
+ /* Always on 3.3V regulator for WiFi and BT */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc33-wifi";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc_wifi_io: vcc-wifi-io {
|
||||
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-wifi-io";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <®_vcc33_wifi>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_pwrseq: wifi-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rtc 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
|
||||
+ post-power-on-delay-ms = <200>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <®_dcdca>;
|
||||
+};
|
||||
+
|
||||
+&de {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dwc3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ehci0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ehci3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&ext_rgmii_pins>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ phy-supply = <®_gmac_3v3>;
|
||||
+ allwinner,rx-delay-ps = <1500>;
|
||||
+ allwinner,tx-delay-ps = <700>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdcc>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ hvcc-supply = <®_bldo2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+
|
||||
+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
|
||||
+ reset-assert-us = <15000>;
|
||||
+ reset-deassert-us = <40000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ vmmc-supply = <®_cldo1>;
|
||||
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
|
||||
+ bus-width = <4>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc1 {
|
||||
+ vmmc-supply = <®_vcc33_wifi>;
|
||||
+ vqmmc-supply = <®_vcc_wifi_io>;
|
||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+ bus-width = <4>;
|
||||
+ non-removable;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc2 {
|
||||
+ vmmc-supply = <®_cldo1>;
|
||||
+ vqmmc-supply = <®_bldo2>;
|
||||
+ cap-mmc-hw-reset;
|
||||
+ non-removable;
|
||||
+ bus-width = <8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pio {
|
||||
+ vcc-pc-supply = <®_bldo2>;
|
||||
+ vcc-pd-supply = <®_cldo1>;
|
||||
+ vcc-pg-supply = <®_bldo3>;
|
||||
+};
|
||||
+
|
||||
+&r_ir {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&r_rsb {
|
||||
+ clock-frequency = <100000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ axp805: pmic@745 {
|
||||
+ compatible = "x-powers,axp805", "x-powers,axp806";
|
||||
+ reg = <0x745>;
|
||||
+ interrupt-parent = <&r_intc>;
|
||||
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-controller;
|
||||
+ #interrupt-cells = <1>;
|
||||
+ x-powers,self-working-mode;
|
||||
+ vina-supply = <®_vcc5v>;
|
||||
+ vinb-supply = <®_vcc5v>;
|
||||
+ vinc-supply = <®_vcc5v>;
|
||||
+ vind-supply = <®_vcc5v>;
|
||||
+ vine-supply = <®_vcc5v>;
|
||||
+ aldoin-supply = <®_vcc5v>;
|
||||
+ bldoin-supply = <®_vcc5v>;
|
||||
+ cldoin-supply = <®_vcc5v>;
|
||||
+
|
||||
+ regulators {
|
||||
+ reg_aldo1: aldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-pl-led-ir";
|
||||
+ };
|
||||
+
|
||||
+ reg_aldo2: aldo2 {
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc33-audio-tv-ephy-mac";
|
||||
+ };
|
||||
+
|
||||
+ /* ALDO3 is shorted to CLDO1 */
|
||||
+ reg_aldo3: aldo3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo1: bldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc18-dram-bias-pll";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo2: bldo2 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-efuse-pcie-hdmi-pc";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo3: bldo3 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-pm-pg-dcxoio-wifi";
|
||||
+ };
|
||||
+
|
||||
+ bldo4 {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+
|
||||
+ reg_cldo1: cldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
|
||||
+ };
|
||||
+
|
||||
+ cldo2 {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+
|
||||
+ cldo3 {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdca: dcdca {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1160000>;
|
||||
+ regulator-ramp-delay = <2500>;
|
||||
+ regulator-name = "vdd-cpu";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdcc: dcdcc {
|
||||
+ regulator-enable-ramp-delay = <32000>;
|
||||
+ regulator-min-microvolt = <810000>;
|
||||
+ regulator-max-microvolt = <1080000>;
|
||||
+ regulator-ramp-delay = <2500>;
|
||||
+ regulator-name = "vdd-gpu";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdcd: dcdcd {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <980000>;
|
||||
+ regulator-max-microvolt = <980000>;
|
||||
+ regulator-name = "vdd-sys";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdce: dcdce {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-name = "vcc-dram";
|
||||
+ };
|
||||
+
|
||||
+ sw {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&r_ir {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rtc {
|
||||
+ clocks = <&ext_osc32k>;
|
||||
+};
|
||||
+
|
||||
+/delete-node/ &spi0;
|
||||
+
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_ph_pins>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2otg {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy {
|
||||
+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
|
||||
+ usb0_vbus-supply = <®_vcc5v>;
|
||||
+ usb3_vbus-supply = <®_vcc5v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb3phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/configs/orangepi_3_lts_defconfig b/configs/orangepi_3_lts_defconfig
|
||||
new file mode 100644
|
||||
index 00000000..41a9af4e
|
||||
--- /dev/null
|
||||
+++ b/configs/orangepi_3_lts_defconfig
|
||||
@@ -0,0 +1,19 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_SUNXI=y
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3-lts"
|
||||
+CONFIG_SPL=y
|
||||
+CONFIG_MACH_SUN50I_H6=y
|
||||
+CONFIG_SUNXI_DRAM_H6_LPDDR3=y
|
||||
+CONFIG_MMC0_CD_PIN="PF6"
|
||||
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
||||
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
+CONFIG_SPL_STACK=0x118000
|
||||
+CONFIG_SYS_PBSIZE=1024
|
||||
+CONFIG_SYS_BOOTM_LEN=0x2000000
|
||||
+CONFIG_PHY_SUN50I_USB3=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_USB_OHCI_HCD=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
--
|
||||
2.39.2
|
||||
|
@ -0,0 +1,32 @@
|
||||
From eb31a4a141bf401f92426bd053a965022e47290d Mon Sep 17 00:00:00 2001
|
||||
From: Chris Morgan <macromorgan@hotmail.com>
|
||||
Date: Fri, 7 Jan 2022 11:52:54 -0600
|
||||
Subject: [PATCH] i2c: mvtwsi: Add compatible string for allwinner,
|
||||
sun4i-a10-i2c
|
||||
|
||||
This adds a compatible string for the Allwinner Sun4i-A10 I2C
|
||||
controller. Without this, boards based on the R8 and A13 (at a
|
||||
minimum) fail to boot.
|
||||
|
||||
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
|
||||
Acked-by: Akash Gajjar <gajjar04akash@gmail.com>
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
---
|
||||
drivers/i2c/mvtwsi.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
|
||||
index bad4b1484f..f48a4f25aa 100644
|
||||
--- a/drivers/i2c/mvtwsi.c
|
||||
+++ b/drivers/i2c/mvtwsi.c
|
||||
@@ -900,6 +900,7 @@ static const struct dm_i2c_ops mvtwsi_i2c_ops = {
|
||||
static const struct udevice_id mvtwsi_i2c_ids[] = {
|
||||
{ .compatible = "marvell,mv64xxx-i2c", },
|
||||
{ .compatible = "marvell,mv78230-i2c", },
|
||||
+ { .compatible = "allwinner,sun4i-a10-i2c", },
|
||||
{ .compatible = "allwinner,sun6i-a31-i2c", },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,30 +0,0 @@
|
||||
From bf813915bf480154c707e0be14016cef94adbd95 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@gmail.com>
|
||||
Date: Tue, 7 May 2024 11:27:08 +0200
|
||||
Subject: [PATCH] mangopi-mq-r-t113: Fix serial console
|
||||
|
||||
Serial console is on uart3 not on uart0.
|
||||
|
||||
Upstream-Status: Inappropriate (for this board only)
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
|
||||
---
|
||||
include/configs/sunxi-common.h | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
|
||||
index b8ca77d031..4e4808d2c1 100644
|
||||
--- a/include/configs/sunxi-common.h
|
||||
+++ b/include/configs/sunxi-common.h
|
||||
@@ -324,7 +324,7 @@
|
||||
MEM_LAYOUT_ENV_EXTRA_SETTINGS \
|
||||
DFU_ALT_INFO_RAM \
|
||||
"fdtfile=" FDTFILE "\0" \
|
||||
- "console=ttyS0,115200\0" \
|
||||
+ "console=ttyS3,115200\0" \
|
||||
"uuid_gpt_esp=" UUID_GPT_ESP "\0" \
|
||||
"uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
|
||||
"partitions=" PARTS_DEFAULT "\0" \
|
||||
--
|
||||
2.25.1
|
||||
|
@ -6,6 +6,6 @@ if itest.b *0x28 == 0x02 ; then
|
||||
rootdev=mmcblk1p2
|
||||
fi
|
||||
setenv bootargs console=${console} console=tty1 root=/dev/${rootdev} rootwait panic=10 ${extra}
|
||||
load mmc 0:1 ${fdt_addr_r} ${fdtfile} || load mmc 0:1 ${fdt_addr_r} boot/allwinner/${fdtfile}
|
||||
load mmc 0:1 ${fdt_addr_r} ${fdtfile} || load mmc 0:1 ${fdt_addr_r} boot/${fdtfile}
|
||||
load mmc 0:1 ${kernel_addr_r} zImage || load mmc 0:1 ${kernel_addr_r} boot/zImage || load mmc 0:1 ${kernel_addr_r} uImage || load mmc 0:1 ${kernel_addr_r} boot/uImage
|
||||
bootz ${kernel_addr_r} - ${fdt_addr_r} || bootm ${kernel_addr_r} - ${fdt_addr_r}
|
||||
|
@ -1,11 +0,0 @@
|
||||
# Default to (primary) SD
|
||||
rootdev=mmcblk0p2
|
||||
if itest.b *0x28 == 0x02 ; then
|
||||
# U-Boot loaded from eMMC or secondary SD so use it for rootfs too
|
||||
echo "U-boot loaded from eMMC or secondary SD"
|
||||
rootdev=mmcblk2p2
|
||||
fi
|
||||
setenv bootargs console=${console} console=tty1 root=/dev/${rootdev} rootwait panic=10 ${extra}
|
||||
load mmc 0:1 ${fdt_addr_r} ${fdtfile}
|
||||
load mmc 0:1 ${kernel_addr_r} Image
|
||||
booti ${kernel_addr_r} - ${fdt_addr_r}
|
@ -1,7 +1,7 @@
|
||||
FILESEXTRAPATHS:prepend:sunxi := "${THISDIR}/files:"
|
||||
|
||||
DEPENDS:append:sunxi = " bc-native dtc-native swig-native python3-native flex-native bison-native "
|
||||
DEPENDS:append:sun50i = " trusted-firmware-a"
|
||||
DEPENDS:append:sun50i = " atf-sunxi "
|
||||
|
||||
COMPATIBLE_MACHINE:sunxi = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
|
||||
|
||||
@ -12,12 +12,11 @@ DEFAULT_PREFERENCE:sun8i = "1"
|
||||
DEFAULT_PREFERENCE:sun50i = "1"
|
||||
|
||||
SRC_URI:append:sunxi = " \
|
||||
file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
|
||||
file://0002-Added-nanopi-r1-board-support.patch \
|
||||
file://0003-sunxi-H6-Enable-Ethernet-on-Orange-Pi-One-Plus.patch \
|
||||
file://0004-mangopi-mq-r-t113-Fix-serial-console.patch \
|
||||
file://0004-OrangePi-3-LTS-support.patch \
|
||||
file://boot.cmd \
|
||||
file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
|
||||
file://0002-Added-nanopi-r1-board-support.patch \
|
||||
file://0003-Add-nanopi-duo2-board-support.patch \
|
||||
file://0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch \
|
||||
file://boot.cmd \
|
||||
"
|
||||
|
||||
UBOOT_ENV_SUFFIX:sunxi = "scr"
|
||||
@ -26,8 +25,8 @@ UBOOT_ENV:sunxi = "boot"
|
||||
EXTRA_OEMAKE:append:sunxi = ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" '
|
||||
EXTRA_OEMAKE:append:sun50i = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin SCP=/dev/null"
|
||||
|
||||
do_compile:sun50i[depends] += "trusted-firmware-a:do_deploy"
|
||||
do_compile_sun50i[depends] += "atf-sunxi:do_deploy"
|
||||
|
||||
do_compile:append:sunxi() {
|
||||
${B}/tools/mkimage -C none -A arm -T script -d ${UNPACKDIR}/boot.cmd ${UNPACKDIR}/${UBOOT_ENV_BINARY}
|
||||
${B}/tools/mkimage -C none -A arm -T script -d ${WORKDIR}/boot.cmd ${WORKDIR}/${UBOOT_ENV_BINARY}
|
||||
}
|
||||
|
@ -1 +0,0 @@
|
||||
/home/marek/data/projects/kas/sources/meta-sunxi/recipes-devtools/python/files/olinuxino-a20lime2
|
@ -16,7 +16,7 @@ S = "${WORKDIR}/pyA20-${PV}"
|
||||
inherit distutils3
|
||||
|
||||
do_compile:prepend() {
|
||||
cp ${UNPACKDIR}/mapping.h ${S}/pyA20/gpio/mapping.h
|
||||
cp ${WORKDIR}/mapping.h ${S}/pyA20/gpio/mapping.h
|
||||
}
|
||||
|
||||
SRC_URI[md5sum] = "cab03b4931199804603d1074f6d8f48f"
|
||||
|
@ -22,7 +22,7 @@ python __anonymous() {
|
||||
}
|
||||
|
||||
SRCREV = "d343311efc8db166d8371b28494f0f27b6a58724"
|
||||
SRC_URI = "git://github.com/linux-sunxi/sunxi-mali.git;protocol=https;branch=master \
|
||||
SRC_URI = "gitsm://github.com/linux-sunxi/sunxi-mali.git \
|
||||
file://0001-Add-EGLSyncKHR-EGLTimeKHR-and-GLChar-definition.patch \
|
||||
file://0002-Add-missing-GLchar-definition.patch \
|
||||
file://0003-Fix-sed-to-replace-by-the-correct-var.patch \
|
||||
|
@ -20,7 +20,7 @@ CFLAGS += " -I${STAGING_INCDIR}/xorg "
|
||||
|
||||
do_install:append() {
|
||||
install -d ${D}${datadir}/X11/xorg.conf.d
|
||||
install -m 0644 ${UNPACKDIR}/20-fbturbo.conf ${D}${datadir}/X11/xorg.conf.d
|
||||
install -m 0644 ${WORKDIR}/20-fbturbo.conf ${D}${datadir}/X11/xorg.conf.d
|
||||
}
|
||||
|
||||
FILES:${PN} += "${datadir}/X11/xorg.conf.d/20-fbturbo.conf"
|
||||
|
@ -1 +1 @@
|
||||
PACKAGECONFIG[dri3] = "-Ddri3=true,-Ddri3=false,libxshmfence"
|
||||
DEPENDS += "libxshmfence"
|
||||
|
@ -6,7 +6,7 @@
|
||||
# WARNING: The following commit is required for NVRAM files to be included in
|
||||
# linux-firmware-bcm43430 package:
|
||||
# http://git.openembedded.org/openembedded-core/commit/?id=dde0f79f32fa6bab045ef60199903f74c4cc3393
|
||||
do_install:append:sunxi() {
|
||||
do_install:append() {
|
||||
ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.xunlong,orangepi-zero-plus2.txt
|
||||
ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.xunlong,orangepi-zero-plus2-h3.txt
|
||||
ln -sf -r ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.AP6212.txt ${D}${nonarch_base_libdir}/firmware/brcm/brcmfmac43430-sdio.friendlyarm,nanopi-neo-plus2.txt
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,45 +0,0 @@
|
||||
From 5138d597275fd503573fac84018186bd18740644 Mon Sep 17 00:00:00 2001
|
||||
From: pbiel <pbiel7@gmail.com>
|
||||
Date: Thu, 30 Mar 2023 22:45:33 +0200
|
||||
Subject: [PATCH] Fix incldue path for unisocwcn
|
||||
|
||||
---
|
||||
drivers/net/wireless/uwe5622/Makefile | 4 +++-
|
||||
drivers/net/wireless/uwe5622/unisocwcn/Makefile | 6 +++---
|
||||
2 files changed, 6 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/wireless/uwe5622/Makefile b/drivers/net/wireless/uwe5622/Makefile
|
||||
index 313ea5123..e9a398584 100644
|
||||
--- a/drivers/net/wireless/uwe5622/Makefile
|
||||
+++ b/drivers/net/wireless/uwe5622/Makefile
|
||||
@@ -2,7 +2,9 @@ obj-$(CONFIG_AW_WIFI_DEVICE_UWE5622) += unisocwcn/
|
||||
obj-$(CONFIG_WLAN_UWE5622) += unisocwifi/
|
||||
obj-$(CONFIG_TTY_OVERY_SDIO) += tty-sdio/
|
||||
|
||||
-UNISOCWCN_DIR := $(shell cd $(src)/unisocwcn/ && /bin/pwd)
|
||||
+mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
|
||||
+UNISOCWCN_DIR := $(dir $(mkfile_path))/unisocwcn/
|
||||
+
|
||||
UNISOC_BSP_INCLUDE := $(UNISOCWCN_DIR)/include
|
||||
export UNISOC_BSP_INCLUDE
|
||||
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwcn/Makefile b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
|
||||
index f9c595747..1ad490594 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwcn/Makefile
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
|
||||
@@ -129,9 +129,9 @@ ccflags-y += -DCONFIG_WCN_BOOT
|
||||
ccflags-y += -DCONFIG_WCN_UTILS
|
||||
|
||||
#### include path ######
|
||||
-ccflags-y += -I$(src)/include/
|
||||
-ccflags-y += -I$(src)/platform/
|
||||
-ccflags-y += -I$(src)/platform/rf/
|
||||
+ccflags-y += -I$(srctree)/$(src)/include/
|
||||
+ccflags-y += -I$(srctree)/$(src)/platform/
|
||||
+ccflags-y += -I$(srctree)/$(src)/platform/rf/
|
||||
|
||||
#### add cflag for Customer ######
|
||||
### ---------- Hisilicon start ---------- ###
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,177 +0,0 @@
|
||||
From 5f4d2d5fc32dfe41c73cac36ec6747c34e5562a3 Mon Sep 17 00:00:00 2001
|
||||
From: pbiel <pbiel7@gmail.com>
|
||||
Date: Wed, 15 Mar 2023 23:04:27 +0100
|
||||
Subject: [PATCH] wireless: Adapt uwe5622 wifi driver to kernel 6.1
|
||||
|
||||
---
|
||||
drivers/net/wireless/uwe5622/tty-sdio/lpm.c | 2 +-
|
||||
.../uwe5622/unisocwcn/boot/wcn_integrate_dev.c | 2 +-
|
||||
.../uwe5622/unisocwcn/platform/wcn_parn_parser.c | 2 +-
|
||||
.../wireless/uwe5622/unisocwcn/platform/wcn_procfs.c | 2 +-
|
||||
.../wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c | 2 +-
|
||||
.../net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c | 6 +++---
|
||||
drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c | 10 +++++-----
|
||||
drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c | 2 +-
|
||||
8 files changed, 14 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/wireless/uwe5622/tty-sdio/lpm.c b/drivers/net/wireless/uwe5622/tty-sdio/lpm.c
|
||||
index b2d9a8994e5e..35e30651a921 100644
|
||||
--- a/drivers/net/wireless/uwe5622/tty-sdio/lpm.c
|
||||
+++ b/drivers/net/wireless/uwe5622/tty-sdio/lpm.c
|
||||
@@ -70,7 +70,7 @@ static int btwrite_proc_show(struct seq_file *m, void *v)
|
||||
|
||||
static int bluesleep_open_proc_btwrite(struct inode *inode, struct file *file)
|
||||
{
|
||||
- return single_open(file, btwrite_proc_show, PDE_DATA(inode));
|
||||
+ return single_open(file, btwrite_proc_show, pde_data(inode));
|
||||
}
|
||||
|
||||
static const struct proc_ops lpm_proc_btwrite_fops = {
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c b/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c
|
||||
index 3ee6910e7cf7..29a3ec298bc1 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c
|
||||
@@ -562,7 +562,7 @@ static struct wcn_proc_data g_proc_data = {
|
||||
static int wcn_platform_open(struct inode *inode, struct file *filp)
|
||||
{
|
||||
struct platform_proc_file_entry
|
||||
- *entry = (struct platform_proc_file_entry *)PDE_DATA(inode);
|
||||
+ *entry = (struct platform_proc_file_entry *)pde_data(inode);
|
||||
|
||||
WCN_INFO("entry name:%s\n!", entry->name);
|
||||
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c
|
||||
index aea7d6d0fe57..bd841f0b32d3 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c
|
||||
@@ -146,7 +146,7 @@ static int prefixcmp(const char *str, const char *prefix)
|
||||
}
|
||||
|
||||
#if KERNEL_VERSION(3, 19, 0) <= LINUX_VERSION_CODE
|
||||
-static int find_callback(struct dir_context *ctx, const char *name, int namlen,
|
||||
+static bool find_callback(struct dir_context *ctx, const char *name, int namlen,
|
||||
loff_t offset, u64 ino, unsigned int d_type)
|
||||
#else
|
||||
static int find_callback(void *ctx, const char *name, int namlen,
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c
|
||||
index 2edb7903d80e..9e453365bba8 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c
|
||||
@@ -431,7 +431,7 @@ static const struct proc_ops mdbg_snap_shoot_seq_fops = {
|
||||
static int mdbg_proc_open(struct inode *inode, struct file *filp)
|
||||
{
|
||||
struct mdbg_proc_entry *entry =
|
||||
- (struct mdbg_proc_entry *)PDE_DATA(inode);
|
||||
+ (struct mdbg_proc_entry *)pde_data(inode);
|
||||
filp->private_data = entry;
|
||||
|
||||
return 0;
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c
|
||||
index 8f228d403909..750bfc0466cb 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c
|
||||
@@ -82,7 +82,7 @@ static int wcn_usb_dopen(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct wcn_usb_ddata *data;
|
||||
|
||||
- data = (struct wcn_usb_ddata *)PDE_DATA(inode);
|
||||
+ data = (struct wcn_usb_ddata *)pde_data(inode);
|
||||
|
||||
if (!data)
|
||||
return -EIO;
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c
|
||||
index c2cccc658c0d..e7a9f258943e 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c
|
||||
@@ -61,7 +61,7 @@ static int wcn_usb_channel_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct channel *channel;
|
||||
|
||||
- channel = (struct channel *)PDE_DATA(inode);
|
||||
+ channel = (struct channel *)pde_data(inode);
|
||||
|
||||
if (!channel)
|
||||
return -EIO;
|
||||
@@ -467,7 +467,7 @@ static int wcn_usb_chnmg_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct chnmg *chnmg;
|
||||
/* get channel_list head */
|
||||
- chnmg = (struct chnmg *)PDE_DATA(inode);
|
||||
+ chnmg = (struct chnmg *)pde_data(inode);
|
||||
|
||||
file->private_data = chnmg;
|
||||
return 0;
|
||||
@@ -916,7 +916,7 @@ static int print_level_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct chnmg *chnmg;
|
||||
/* get channel_list head */
|
||||
- chnmg = (struct chnmg *)PDE_DATA(inode);
|
||||
+ chnmg = (struct chnmg *)pde_data(inode);
|
||||
|
||||
file->private_data = chnmg;
|
||||
return 0;
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c b/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c
|
||||
index daef880ae3c0..2231388da70a 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c
|
||||
@@ -703,7 +703,7 @@ static int sprdwl_add_cipher_key(struct sprdwl_vif *vif, bool pairwise,
|
||||
}
|
||||
|
||||
static int sprdwl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
||||
- u8 key_index, bool pairwise,
|
||||
+ int link_id, u8 key_index, bool pairwise,
|
||||
const u8 *mac_addr,
|
||||
struct key_params *params)
|
||||
{
|
||||
@@ -725,7 +725,7 @@ static int sprdwl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
||||
}
|
||||
|
||||
static int sprdwl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *ndev,
|
||||
- u8 key_index, bool pairwise,
|
||||
+ int link_id, u8 key_index, bool pairwise,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct sprdwl_vif *vif = netdev_priv(ndev);
|
||||
@@ -755,7 +755,7 @@ static int sprdwl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *ndev,
|
||||
|
||||
static int sprdwl_cfg80211_set_default_key(struct wiphy *wiphy,
|
||||
struct net_device *ndev,
|
||||
- u8 key_index, bool unicast,
|
||||
+ int link_id, u8 key_index, bool unicast,
|
||||
bool multicast)
|
||||
{
|
||||
struct sprdwl_vif *vif = netdev_priv(ndev);
|
||||
@@ -984,7 +984,7 @@ static int sprdwl_cfg80211_change_beacon(struct wiphy *wiphy,
|
||||
return sprdwl_change_beacon(vif, beacon);
|
||||
}
|
||||
|
||||
-static int sprdwl_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev)
|
||||
+static int sprdwl_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev, unsigned int link_id)
|
||||
{
|
||||
#ifdef DFS_MASTER
|
||||
struct sprdwl_vif *vif = netdev_priv(ndev);
|
||||
@@ -2367,7 +2367,7 @@ void sprdwl_report_connection(struct sprdwl_vif *vif,
|
||||
conn_info->status == SPRDWL_ROAM_SUCCESS){
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)
|
||||
struct cfg80211_roam_info roam_info = {
|
||||
- .bss = bss,
|
||||
+ .links[0].bss = bss,
|
||||
.req_ie = conn_info->req_ie,
|
||||
.req_ie_len = conn_info->req_ie_len,
|
||||
.resp_ie = conn_info->resp_ie,
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c b/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c
|
||||
index e81619b12e39..1ecbfac5b490 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c
|
||||
@@ -3296,7 +3296,7 @@ void sprdwl_event_chan_changed(struct sprdwl_vif *vif, u8 *data, u16 len)
|
||||
NL80211_CHAN_HT20);
|
||||
else
|
||||
wl_err("%s, ch is null!\n", __func__);
|
||||
- cfg80211_ch_switch_notify(vif->ndev, &chandef);
|
||||
+ cfg80211_ch_switch_notify(vif->ndev, &chandef, 0);
|
||||
}
|
||||
}
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,35 +0,0 @@
|
||||
From 9211a92d07e9a43fce104f87f9d45e890257b699 Mon Sep 17 00:00:00 2001
|
||||
From: pbiel <pbiel7@gmail.com>
|
||||
Date: Tue, 7 Mar 2023 20:28:44 +0100
|
||||
Subject: [PATCH] wireless: fix setting mac address for netdev in uwe5622
|
||||
unisocwifi driver
|
||||
|
||||
---
|
||||
drivers/net/wireless/uwe5622/unisocwifi/main.c | 4 +++-
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/wireless/uwe5622/unisocwifi/main.c b/drivers/net/wireless/uwe5622/unisocwifi/main.c
|
||||
index 21efdf4e0..566a9a7f3 100644
|
||||
--- a/drivers/net/wireless/uwe5622/unisocwifi/main.c
|
||||
+++ b/drivers/net/wireless/uwe5622/unisocwifi/main.c
|
||||
@@ -1356,6 +1356,7 @@ static struct sprdwl_vif *sprdwl_register_netdev(struct sprdwl_priv *priv,
|
||||
struct wireless_dev *wdev;
|
||||
struct sprdwl_vif *vif;
|
||||
int ret;
|
||||
+ u8 target_mac_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0))
|
||||
ndev = alloc_netdev(sizeof(*vif), name, NET_NAME_UNKNOWN, ether_setup);
|
||||
@@ -1411,7 +1412,8 @@ static struct sprdwl_vif *sprdwl_register_netdev(struct sprdwl_priv *priv,
|
||||
ndev->features |= NETIF_F_SG;
|
||||
SET_NETDEV_DEV(ndev, wiphy_dev(priv->wiphy));
|
||||
|
||||
- sprdwl_set_mac_addr(vif, addr, ndev->dev_addr);
|
||||
+ sprdwl_set_mac_addr(vif, addr, target_mac_addr);
|
||||
+ dev_addr_set(ndev, target_mac_addr);
|
||||
|
||||
#ifdef CONFIG_P2P_INTF
|
||||
if (type == NL80211_IFTYPE_P2P_DEVICE)
|
||||
--
|
||||
2.34.1
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,60 +0,0 @@
|
||||
From 452a691a83df1aab77cec33203cb04a817817a05 Mon Sep 17 00:00:00 2001
|
||||
From: The-going <48602507+The-going@users.noreply.github.com>
|
||||
Date: Thu, 5 May 2022 22:55:13 +0300
|
||||
Subject: [PATCH] drv: nvmem: sunxi_sid: Add sunxi_get_soc_chipid,
|
||||
sunxi_get_serial
|
||||
|
||||
---
|
||||
drivers/nvmem/sunxi_sid.c | 28 ++++++++++++++++++++++++++++
|
||||
1 file changed, 28 insertions(+)
|
||||
|
||||
diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
|
||||
index 37a6abb0e..c81fac63d 100644
|
||||
--- a/drivers/nvmem/sunxi_sid.c
|
||||
+++ b/drivers/nvmem/sunxi_sid.c
|
||||
@@ -37,6 +37,25 @@ struct sunxi_sid {
|
||||
u32 value_offset;
|
||||
};
|
||||
|
||||
+static unsigned int sunxi_soc_chipid[4];
|
||||
+static unsigned int sunxi_serial[4];
|
||||
+
|
||||
+int sunxi_get_soc_chipid(unsigned char *chipid)
|
||||
+{
|
||||
+ memcpy(chipid, sunxi_soc_chipid, 16);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+EXPORT_SYMBOL(sunxi_get_soc_chipid);
|
||||
+
|
||||
+int sunxi_get_serial(unsigned char *serial)
|
||||
+{
|
||||
+ memcpy(serial, sunxi_serial, 16);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+EXPORT_SYMBOL(sunxi_get_serial);
|
||||
+
|
||||
static int sunxi_sid_read(void *context, unsigned int offset,
|
||||
void *val, size_t bytes)
|
||||
{
|
||||
@@ -167,6 +186,15 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
||||
|
||||
platform_set_drvdata(pdev, nvmem);
|
||||
|
||||
+ nvmem_cfg->reg_read(sid, 0, &sunxi_soc_chipid[0], sizeof(int));
|
||||
+ nvmem_cfg->reg_read(sid, 4, &sunxi_soc_chipid[1], sizeof(int));
|
||||
+ nvmem_cfg->reg_read(sid, 8, &sunxi_soc_chipid[2], sizeof(int));
|
||||
+ nvmem_cfg->reg_read(sid, 12, &sunxi_soc_chipid[3], sizeof(int));
|
||||
+
|
||||
+ sunxi_serial[0] = sunxi_soc_chipid[3];
|
||||
+ sunxi_serial[1] = sunxi_soc_chipid[2];
|
||||
+ sunxi_serial[2] = (sunxi_soc_chipid[1] >> 16) & 0x0ffff;
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
--
|
||||
2.35.3
|
||||
|
||||
|
@ -1,612 +0,0 @@
|
||||
From 418436514e2e64e07e7fd2ef9d77ec4712d1033b Mon Sep 17 00:00:00 2001
|
||||
From: pbiel <pbiel7@gmail.com>
|
||||
Date: Fri, 24 Feb 2023 10:38:03 +0100
|
||||
Subject: [PATCH 2/2] Add sunxi addr driver
|
||||
|
||||
---
|
||||
drivers/misc/Kconfig | 1 +
|
||||
drivers/misc/Makefile | 1 +
|
||||
drivers/misc/sunxi-addr/Kconfig | 6 +
|
||||
drivers/misc/sunxi-addr/Makefile | 5 +
|
||||
drivers/misc/sunxi-addr/sha256.c | 178 +++++++++++++
|
||||
drivers/misc/sunxi-addr/sunxi-addr.c | 358 +++++++++++++++++++++++++++
|
||||
6 files changed, 549 insertions(+)
|
||||
create mode 100644 drivers/misc/sunxi-addr/Kconfig
|
||||
create mode 100644 drivers/misc/sunxi-addr/Makefile
|
||||
create mode 100644 drivers/misc/sunxi-addr/sha256.c
|
||||
create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
|
||||
|
||||
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
|
||||
index 358ad56f6..c59480dc8 100644
|
||||
--- a/drivers/misc/Kconfig
|
||||
+++ b/drivers/misc/Kconfig
|
||||
@@ -514,4 +514,5 @@ source "drivers/misc/habanalabs/Kconfig"
|
||||
source "drivers/misc/uacce/Kconfig"
|
||||
source "drivers/misc/pvpanic/Kconfig"
|
||||
source "drivers/misc/mchp_pci1xxxx/Kconfig"
|
||||
+source "drivers/misc/sunxi-addr/Kconfig"
|
||||
endmenu
|
||||
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
|
||||
index ac9b3e757..487a2bf2d 100644
|
||||
--- a/drivers/misc/Makefile
|
||||
+++ b/drivers/misc/Makefile
|
||||
@@ -62,3 +62,4 @@ obj-$(CONFIG_HI6421V600_IRQ) += hi6421v600-irq.o
|
||||
obj-$(CONFIG_OPEN_DICE) += open-dice.o
|
||||
obj-$(CONFIG_GP_PCI1XXXX) += mchp_pci1xxxx/
|
||||
obj-$(CONFIG_VCPU_STALL_DETECTOR) += vcpu_stall_detector.o
|
||||
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi-addr/
|
||||
\ No newline at end of file
|
||||
diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
|
||||
new file mode 100644
|
||||
index 000000000..801dd2c02
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/sunxi-addr/Kconfig
|
||||
@@ -0,0 +1,6 @@
|
||||
+config SUNXI_ADDR_MGT
|
||||
+ tristate "Allwinner Network MAC Addess Manager"
|
||||
+ depends on BT || ETHERNET || WLAN
|
||||
+ depends on NVMEM_SUNXI_SID
|
||||
+ help
|
||||
+ allwinner network mac address management
|
||||
diff --git a/drivers/misc/sunxi-addr/Makefile b/drivers/misc/sunxi-addr/Makefile
|
||||
new file mode 100644
|
||||
index 000000000..f01fd4783
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/sunxi-addr/Makefile
|
||||
@@ -0,0 +1,5 @@
|
||||
+#
|
||||
+# Makefile for wifi mac addr manager drivers
|
||||
+#
|
||||
+sunxi_addr-objs := sunxi-addr.o sha256.o
|
||||
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi_addr.o
|
||||
diff --git a/drivers/misc/sunxi-addr/sha256.c b/drivers/misc/sunxi-addr/sha256.c
|
||||
new file mode 100644
|
||||
index 000000000..78825810c
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/sunxi-addr/sha256.c
|
||||
@@ -0,0 +1,178 @@
|
||||
+/*
|
||||
+ * Local implement of sha256.
|
||||
+ *
|
||||
+ * Copyright (C) 2013 Allwinner.
|
||||
+ *
|
||||
+ * This file is licensed under the terms of the GNU General Public
|
||||
+ * License version 2. This program is licensed "as is" without any
|
||||
+ * warranty of any kind, whether express or implied.
|
||||
+ */
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/string.h>
|
||||
+
|
||||
+/****************************** MACROS ******************************/
|
||||
+#define ROTRIGHT(a, b) (((a) >> (b)) | ((a) << (32 - (b))))
|
||||
+#define CH(x, y, z) (((x) & (y)) ^ (~(x) & (z)))
|
||||
+#define MAJ(x, y, z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
|
||||
+#define EP0(x) (ROTRIGHT(x, 2) ^ ROTRIGHT(x, 13) ^ ROTRIGHT(x, 22))
|
||||
+#define EP1(x) (ROTRIGHT(x, 6) ^ ROTRIGHT(x, 11) ^ ROTRIGHT(x, 25))
|
||||
+#define SIG0(x) (ROTRIGHT(x, 7) ^ ROTRIGHT(x, 18) ^ ((x) >> 3))
|
||||
+#define SIG1(x) (ROTRIGHT(x, 17) ^ ROTRIGHT(x, 19) ^ ((x) >> 10))
|
||||
+
|
||||
+/**************************** VARIABLES *****************************/
|
||||
+static const uint32_t k[64] = {
|
||||
+ 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
|
||||
+ 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
|
||||
+ 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
|
||||
+ 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
|
||||
+ 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
|
||||
+ 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
|
||||
+ 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
|
||||
+ 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
|
||||
+ 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
|
||||
+ 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
|
||||
+ 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
|
||||
+ 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
|
||||
+ 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
|
||||
+ 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
|
||||
+ 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
|
||||
+ 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
|
||||
+};
|
||||
+
|
||||
+struct sha256_ctx {
|
||||
+ uint8_t data[64]; /* current 512-bit chunk of message data, just like a buffer */
|
||||
+ uint32_t datalen; /* sign the data length of current chunk */
|
||||
+ uint64_t bitlen; /* the bit length of the total message */
|
||||
+ uint32_t state[8]; /* store the middle state of hash abstract */
|
||||
+};
|
||||
+
|
||||
+/*********************** FUNCTION DEFINITIONS ***********************/
|
||||
+static void sha256_transform(struct sha256_ctx *ctx, const uint8_t *data)
|
||||
+{
|
||||
+ uint32_t a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
|
||||
+
|
||||
+ /* initialization */
|
||||
+ for (i = 0, j = 0; i < 16; ++i, j += 4)
|
||||
+ m[i] = (data[j] << 24) | (data[j + 1] << 16) |
|
||||
+ (data[j + 2] << 8) | (data[j + 3]);
|
||||
+ for ( ; i < 64; ++i)
|
||||
+ m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
|
||||
+
|
||||
+ a = ctx->state[0];
|
||||
+ b = ctx->state[1];
|
||||
+ c = ctx->state[2];
|
||||
+ d = ctx->state[3];
|
||||
+ e = ctx->state[4];
|
||||
+ f = ctx->state[5];
|
||||
+ g = ctx->state[6];
|
||||
+ h = ctx->state[7];
|
||||
+
|
||||
+ for (i = 0; i < 64; ++i) {
|
||||
+ t1 = h + EP1(e) + CH(e, f, g) + k[i] + m[i];
|
||||
+ t2 = EP0(a) + MAJ(a, b, c);
|
||||
+ h = g;
|
||||
+ g = f;
|
||||
+ f = e;
|
||||
+ e = d + t1;
|
||||
+ d = c;
|
||||
+ c = b;
|
||||
+ b = a;
|
||||
+ a = t1 + t2;
|
||||
+ }
|
||||
+
|
||||
+ ctx->state[0] += a;
|
||||
+ ctx->state[1] += b;
|
||||
+ ctx->state[2] += c;
|
||||
+ ctx->state[3] += d;
|
||||
+ ctx->state[4] += e;
|
||||
+ ctx->state[5] += f;
|
||||
+ ctx->state[6] += g;
|
||||
+ ctx->state[7] += h;
|
||||
+}
|
||||
+
|
||||
+static void sha256_init(struct sha256_ctx *ctx)
|
||||
+{
|
||||
+ ctx->datalen = 0;
|
||||
+ ctx->bitlen = 0;
|
||||
+ ctx->state[0] = 0x6a09e667;
|
||||
+ ctx->state[1] = 0xbb67ae85;
|
||||
+ ctx->state[2] = 0x3c6ef372;
|
||||
+ ctx->state[3] = 0xa54ff53a;
|
||||
+ ctx->state[4] = 0x510e527f;
|
||||
+ ctx->state[5] = 0x9b05688c;
|
||||
+ ctx->state[6] = 0x1f83d9ab;
|
||||
+ ctx->state[7] = 0x5be0cd19;
|
||||
+}
|
||||
+
|
||||
+static void sha256_update(struct sha256_ctx *ctx, const uint8_t *data, size_t len)
|
||||
+{
|
||||
+ uint32_t i;
|
||||
+
|
||||
+ for (i = 0; i < len; ++i) {
|
||||
+ ctx->data[ctx->datalen] = data[i];
|
||||
+ ctx->datalen++;
|
||||
+ if (ctx->datalen == 64) {
|
||||
+ /* 64 byte = 512 bit means the buffer ctx->data has
|
||||
+ * fully stored one chunk of message,
|
||||
+ * so do the sha256 hash map for the current chunk.
|
||||
+ */
|
||||
+ sha256_transform(ctx, ctx->data);
|
||||
+ ctx->bitlen += 512;
|
||||
+ ctx->datalen = 0;
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void sha256_final(struct sha256_ctx *ctx, uint8_t *hash)
|
||||
+{
|
||||
+ uint32_t i;
|
||||
+
|
||||
+ i = ctx->datalen;
|
||||
+
|
||||
+ /* Pad whatever data is left in the buffer. */
|
||||
+ if (ctx->datalen < 56) {
|
||||
+ ctx->data[i++] = 0x80; /* pad 10000000 = 0x80 */
|
||||
+ while (i < 56)
|
||||
+ ctx->data[i++] = 0x00;
|
||||
+ } else {
|
||||
+ ctx->data[i++] = 0x80;
|
||||
+ while (i < 64)
|
||||
+ ctx->data[i++] = 0x00;
|
||||
+ sha256_transform(ctx, ctx->data);
|
||||
+ memset(ctx->data, 0, 56);
|
||||
+ }
|
||||
+
|
||||
+ /* Append to the padding the total message's length in bits and transform. */
|
||||
+ ctx->bitlen += ctx->datalen * 8;
|
||||
+ ctx->data[63] = ctx->bitlen;
|
||||
+ ctx->data[62] = ctx->bitlen >> 8;
|
||||
+ ctx->data[61] = ctx->bitlen >> 16;
|
||||
+ ctx->data[60] = ctx->bitlen >> 24;
|
||||
+ ctx->data[59] = ctx->bitlen >> 32;
|
||||
+ ctx->data[58] = ctx->bitlen >> 40;
|
||||
+ ctx->data[57] = ctx->bitlen >> 48;
|
||||
+ ctx->data[56] = ctx->bitlen >> 56;
|
||||
+ sha256_transform(ctx, ctx->data);
|
||||
+
|
||||
+ /* copying the final state to the output hash(use big endian). */
|
||||
+ for (i = 0; i < 4; ++i) {
|
||||
+ hash[i] = (ctx->state[0] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 4] = (ctx->state[1] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 8] = (ctx->state[2] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 12] = (ctx->state[3] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 16] = (ctx->state[4] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 20] = (ctx->state[5] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 24] = (ctx->state[6] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ hash[i + 28] = (ctx->state[7] >> (24 - i * 8)) & 0x000000ff;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output)
|
||||
+{
|
||||
+ struct sha256_ctx ctx;
|
||||
+
|
||||
+ sha256_init(&ctx);
|
||||
+ sha256_update(&ctx, plaintext, psize);
|
||||
+ sha256_final(&ctx, output);
|
||||
+ return 0;
|
||||
+}
|
||||
diff --git a/drivers/misc/sunxi-addr/sunxi-addr.c b/drivers/misc/sunxi-addr/sunxi-addr.c
|
||||
new file mode 100644
|
||||
index 000000000..a812e4e82
|
||||
--- /dev/null
|
||||
+++ b/drivers/misc/sunxi-addr/sunxi-addr.c
|
||||
@@ -0,0 +1,358 @@
|
||||
+/*
|
||||
+ * The driver of SUNXI NET MAC ADDR Manager.
|
||||
+ *
|
||||
+ * Copyright (C) 2013 Allwinner.
|
||||
+ *
|
||||
+ * This file is licensed under the terms of the GNU General Public
|
||||
+ * License version 2. This program is licensed "as is" without any
|
||||
+ * warranty of any kind, whether express or implied.
|
||||
+ */
|
||||
+#define DEBUG
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/miscdevice.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+
|
||||
+#define ADDR_MGT_DBG(fmt, arg...) printk(KERN_DEBUG "[ADDR_MGT] %s: " fmt "\n",\
|
||||
+ __func__, ## arg)
|
||||
+#define ADDR_MGT_ERR(fmt, arg...) printk(KERN_ERR "[ADDR_MGT] %s: " fmt "\n",\
|
||||
+ __func__, ## arg)
|
||||
+
|
||||
+#define MODULE_CUR_VERSION "v1.0.9"
|
||||
+
|
||||
+#define MATCH_STR_LEN 20
|
||||
+#define ADDR_VAL_LEN 6
|
||||
+#define ADDR_STR_LEN 18
|
||||
+#define ID_LEN 16
|
||||
+#define HASH_LEN 32
|
||||
+
|
||||
+#define TYPE_ANY 0
|
||||
+#define TYPE_BURN 1
|
||||
+#define TYPE_IDGEN 2
|
||||
+#define TYPE_USER 3
|
||||
+#define TYPE_RAND 4
|
||||
+
|
||||
+#define ADDR_FMT_STR 0
|
||||
+#define ADDR_FMT_VAL 1
|
||||
+
|
||||
+#define IS_TYPE_INVALID(x) ((x < TYPE_ANY) || (x > TYPE_RAND))
|
||||
+
|
||||
+#define ADDR_CLASS_ATTR_ADD(name) \
|
||||
+static ssize_t addr_##name##_show(struct class *class, \
|
||||
+ struct class_attribute *attr, char *buffer) \
|
||||
+{ \
|
||||
+ char addr[ADDR_STR_LEN]; \
|
||||
+ if (IS_TYPE_INVALID(get_addr_by_name(ADDR_FMT_STR, addr, #name))) \
|
||||
+ return 0; \
|
||||
+ return sprintf(buffer, "%.17s\n", addr); \
|
||||
+} \
|
||||
+static ssize_t addr_##name##_store(struct class *class, \
|
||||
+ struct class_attribute *attr, \
|
||||
+ const char *buffer, size_t count) \
|
||||
+{ \
|
||||
+ if (count != ADDR_STR_LEN) { \
|
||||
+ ADDR_MGT_ERR("Length wrong."); \
|
||||
+ return -EINVAL; \
|
||||
+ } \
|
||||
+ set_addr_by_name(TYPE_USER, ADDR_FMT_STR, buffer, #name); \
|
||||
+ return count; \
|
||||
+} \
|
||||
+static CLASS_ATTR_RW(addr_##name);
|
||||
+
|
||||
+struct addr_mgt_info {
|
||||
+ unsigned int type_def;
|
||||
+ unsigned int type_cur;
|
||||
+ unsigned int flag;
|
||||
+ char *addr;
|
||||
+ char *name;
|
||||
+};
|
||||
+
|
||||
+static struct addr_mgt_info info[] = {
|
||||
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "wifi"},
|
||||
+ {TYPE_ANY, TYPE_ANY, 0, NULL, "bt" },
|
||||
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "eth" },
|
||||
+};
|
||||
+
|
||||
+extern int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output);
|
||||
+extern int sunxi_get_soc_chipid(unsigned char *chipid);
|
||||
+
|
||||
+static int addr_parse(int fmt, const char *addr, int check)
|
||||
+{
|
||||
+ char val_buf[ADDR_VAL_LEN];
|
||||
+ char cmp_buf[ADDR_VAL_LEN];
|
||||
+ int ret = ADDR_VAL_LEN;
|
||||
+
|
||||
+ if (fmt == ADDR_FMT_STR)
|
||||
+ ret = sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
|
||||
+ &val_buf[0], &val_buf[1], &val_buf[2],
|
||||
+ &val_buf[3], &val_buf[4], &val_buf[5]);
|
||||
+ else
|
||||
+ memcpy(val_buf, addr, ADDR_VAL_LEN);
|
||||
+
|
||||
+ if (ret != ADDR_VAL_LEN)
|
||||
+ return -1;
|
||||
+
|
||||
+ if (check && (val_buf[0] & 0x3))
|
||||
+ return -1;
|
||||
+
|
||||
+ memset(cmp_buf, 0x00, ADDR_VAL_LEN);
|
||||
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
|
||||
+ return -1;
|
||||
+
|
||||
+ memset(cmp_buf, 0xFF, ADDR_VAL_LEN);
|
||||
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
|
||||
+ return -1;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct addr_mgt_info *addr_find_by_name(char *name)
|
||||
+{
|
||||
+ int i = 0;
|
||||
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
|
||||
+ if (strcmp(info[i].name, name) == 0)
|
||||
+ return &info[i];
|
||||
+ }
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+static int get_addr_by_name(int fmt, char *addr, char *name)
|
||||
+{
|
||||
+ struct addr_mgt_info *t;
|
||||
+
|
||||
+ t = addr_find_by_name(name);
|
||||
+ if (t == NULL) {
|
||||
+ ADDR_MGT_ERR("can't find addr named: %s", name);
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
+ if (IS_TYPE_INVALID(t->type_cur)) {
|
||||
+ ADDR_MGT_ERR("addr type invalid");
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
+ if (addr_parse(ADDR_FMT_VAL, t->addr, t->flag)) {
|
||||
+ ADDR_MGT_ERR("addr parse fail(%s)", t->addr);
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
+ if (fmt == ADDR_FMT_STR)
|
||||
+ sprintf(addr, "%02X:%02X:%02X:%02X:%02X:%02X",
|
||||
+ t->addr[0], t->addr[1], t->addr[2],
|
||||
+ t->addr[3], t->addr[4], t->addr[5]);
|
||||
+ else
|
||||
+ memcpy(addr, t->addr, ADDR_VAL_LEN);
|
||||
+
|
||||
+ return t->type_cur;
|
||||
+}
|
||||
+
|
||||
+static int set_addr_by_name(int type, int fmt, const char *addr, char *name)
|
||||
+{
|
||||
+ struct addr_mgt_info *t;
|
||||
+
|
||||
+ t = addr_find_by_name(name);
|
||||
+ if (t == NULL) {
|
||||
+ ADDR_MGT_ERR("can't find addr named: %s", name);
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
+ if (addr_parse(fmt, addr, t->flag)) {
|
||||
+ ADDR_MGT_ERR("addr parse fail(%s)", addr);
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
+ t->type_cur = type;
|
||||
+ if (fmt == ADDR_FMT_STR)
|
||||
+ sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
|
||||
+ &t->addr[0], &t->addr[1], &t->addr[2],
|
||||
+ &t->addr[3], &t->addr[4], &t->addr[5]);
|
||||
+ else
|
||||
+ memcpy(t->addr, addr, ADDR_VAL_LEN);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int get_custom_mac_address(int fmt, char *name, char *addr)
|
||||
+{
|
||||
+ return get_addr_by_name(fmt, addr, name);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(get_custom_mac_address);
|
||||
+
|
||||
+static int addr_factory(struct device_node *np,
|
||||
+ int idx, int type, char *mac, char *name)
|
||||
+{
|
||||
+ int ret, i;
|
||||
+ char match[MATCH_STR_LEN];
|
||||
+ const char *p;
|
||||
+ char id[ID_LEN], hash[HASH_LEN], cmp_buf[ID_LEN];
|
||||
+ struct timespec64 curtime;
|
||||
+
|
||||
+ switch (type) {
|
||||
+ case TYPE_BURN:
|
||||
+ sprintf(match, "addr_%s", name);
|
||||
+ ret = of_property_read_string_index(np, match, 0, &p);
|
||||
+ if (ret)
|
||||
+ return -1;
|
||||
+
|
||||
+ ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
|
||||
+ &mac[0], &mac[1], &mac[2],
|
||||
+ &mac[3], &mac[4], &mac[5]);
|
||||
+
|
||||
+ if (ret != ADDR_VAL_LEN)
|
||||
+ return -1;
|
||||
+ break;
|
||||
+ case TYPE_IDGEN:
|
||||
+ if (idx > HASH_LEN / ADDR_VAL_LEN - 1)
|
||||
+ return -1;
|
||||
+ if (sunxi_get_soc_chipid(id))
|
||||
+ return -1;
|
||||
+ memset(cmp_buf, 0x00, ID_LEN);
|
||||
+ if (memcmp(id, cmp_buf, ID_LEN) == 0)
|
||||
+ return -1;
|
||||
+ if (hmac_sha256(id, ID_LEN, hash))
|
||||
+ return -1;
|
||||
+ memcpy(mac, &hash[idx * ADDR_VAL_LEN], ADDR_VAL_LEN);
|
||||
+ break;
|
||||
+ case TYPE_RAND:
|
||||
+ for (i = 0; i < ADDR_VAL_LEN; i++) {
|
||||
+ ktime_get_real_ts64(&curtime);
|
||||
+ mac[i] = (char)curtime.tv_nsec;
|
||||
+ }
|
||||
+ break;
|
||||
+ default:
|
||||
+ ADDR_MGT_ERR("unsupport type: %d", type);
|
||||
+ return -1;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int addr_init(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device_node *np = pdev->dev.of_node;
|
||||
+ int type, i, j;
|
||||
+ char match[MATCH_STR_LEN];
|
||||
+ char addr[ADDR_VAL_LEN];
|
||||
+ int type_tab[] = {TYPE_BURN, TYPE_IDGEN, TYPE_RAND};
|
||||
+
|
||||
+ /* init addr type and value */
|
||||
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
|
||||
+ sprintf(match, "type_addr_%s", info[i].name);
|
||||
+ if (of_property_read_u32(np, match, &type)) {
|
||||
+ ADDR_MGT_DBG("Failed to get type_def_%s, use default: %d",
|
||||
+ info[i].name, info[i].type_def);
|
||||
+ } else {
|
||||
+ info[i].type_def = type;
|
||||
+ info[i].type_cur = type;
|
||||
+ }
|
||||
+
|
||||
+ if (IS_TYPE_INVALID(info[i].type_def))
|
||||
+ return -1;
|
||||
+ if (info[i].type_def != TYPE_ANY) {
|
||||
+ if (addr_factory(np, i, info[i].type_def, addr, info[i].name))
|
||||
+ return -1;
|
||||
+ } else {
|
||||
+ for (j = 0; j < ARRAY_SIZE(type_tab); j++) {
|
||||
+ if (!addr_factory(np, i, type_tab[j], addr, info[i].name)) {
|
||||
+ info[i].type_cur = type_tab[j];
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (info[i].flag)
|
||||
+ addr[0] &= 0xFC;
|
||||
+
|
||||
+ if (addr_parse(ADDR_FMT_VAL, addr, info[i].flag))
|
||||
+ return -1;
|
||||
+ else {
|
||||
+ info[i].addr = devm_kzalloc(&pdev->dev, ADDR_VAL_LEN, GFP_KERNEL);
|
||||
+ memcpy(info[i].addr, addr, ADDR_VAL_LEN);
|
||||
+ }
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static ssize_t summary_show(struct class *class,
|
||||
+ struct class_attribute *attr, char *buffer)
|
||||
+{
|
||||
+ int i = 0, ret = 0;
|
||||
+
|
||||
+ ret += sprintf(&buffer[ret], "name cfg cur address\n");
|
||||
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
|
||||
+ ret += sprintf(&buffer[ret],
|
||||
+ "%4s %d %d %02X:%02X:%02X:%02X:%02X:%02X\n",
|
||||
+ info[i].name, info[i].type_def, info[i].type_cur,
|
||||
+ info[i].addr[0], info[i].addr[1], info[i].addr[2],
|
||||
+ info[i].addr[3], info[i].addr[4], info[i].addr[5]);
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+static CLASS_ATTR_RO(summary);
|
||||
+
|
||||
+ADDR_CLASS_ATTR_ADD(wifi);
|
||||
+ADDR_CLASS_ATTR_ADD(bt);
|
||||
+ADDR_CLASS_ATTR_ADD(eth);
|
||||
+
|
||||
+static struct attribute *addr_class_attrs[] = {
|
||||
+ &class_attr_summary.attr,
|
||||
+ &class_attr_addr_wifi.attr,
|
||||
+ &class_attr_addr_bt.attr,
|
||||
+ &class_attr_addr_eth.attr,
|
||||
+ NULL
|
||||
+};
|
||||
+ATTRIBUTE_GROUPS(addr_class);
|
||||
+
|
||||
+static struct class addr_class = {
|
||||
+ .name = "addr_mgt",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .class_groups = addr_class_groups,
|
||||
+};
|
||||
+
|
||||
+static const struct of_device_id addr_mgt_ids[] = {
|
||||
+ { .compatible = "allwinner,sunxi-addr_mgt" },
|
||||
+ { /* Sentinel */ }
|
||||
+};
|
||||
+
|
||||
+static int addr_mgt_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ int status;
|
||||
+
|
||||
+ ADDR_MGT_DBG("module version: %s", MODULE_CUR_VERSION);
|
||||
+ status = class_register(&addr_class);
|
||||
+ if (status < 0) {
|
||||
+ ADDR_MGT_ERR("class register error, status: %d.", status);
|
||||
+ return -1;
|
||||
+ }
|
||||
+
|
||||
+ if (addr_init(pdev)) {
|
||||
+ ADDR_MGT_ERR("failed to init addr.");
|
||||
+ class_unregister(&addr_class);
|
||||
+ return -1;
|
||||
+ }
|
||||
+ ADDR_MGT_DBG("success.");
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int addr_mgt_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ class_unregister(&addr_class);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_driver addr_mgt_driver = {
|
||||
+ .probe = addr_mgt_probe,
|
||||
+ .remove = addr_mgt_remove,
|
||||
+ .driver = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .name = "sunxi-addr-mgt",
|
||||
+ .of_match_table = addr_mgt_ids,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+module_platform_driver_probe(addr_mgt_driver, addr_mgt_probe);
|
||||
+
|
||||
+MODULE_AUTHOR("Allwinnertech");
|
||||
+MODULE_DESCRIPTION("Network MAC Addess Manager");
|
||||
+MODULE_LICENSE("GPL");
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,32 +0,0 @@
|
||||
From 706dc6ed092e4a1b9d84893cb4186fbd354bb1c8 Mon Sep 17 00:00:00 2001
|
||||
From: pbiel <pbiel7@gmail.com>
|
||||
Date: Thu, 26 Jan 2023 09:51:22 +0100
|
||||
Subject: [PATCH] Add addr_mgt device tree node
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++
|
||||
1 file changed, 10 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index d0b95d43a..15f45a3f9 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -591,5 +591,15 @@ sunxi-info {
|
||||
compatible = "allwinner,sun50i-h616-sys-info";
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+ addr_mgt {
|
||||
+ compatible = "allwinner,sunxi-addr_mgt";
|
||||
+ type_addr_wifi = <0x00>;
|
||||
+ type_addr_bt = <0x00>;
|
||||
+ type_addr_eth = <0x00>;
|
||||
+ status = "okay";
|
||||
+ linux,phandle = <0x179>;
|
||||
+ phandle = <0x179>;
|
||||
+ };
|
||||
};
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,70 +0,0 @@
|
||||
From 899da8366afd97b1ca59b632036dc313777026da Mon Sep 17 00:00:00 2001
|
||||
From: pbiel <pbiel7@gmail.com>
|
||||
Date: Fri, 24 Feb 2023 22:14:58 +0100
|
||||
Subject: [PATCH] Add wifi power regulator
|
||||
|
||||
---
|
||||
.../allwinner/sun50i-h616-orangepi-zero2.dts | 47 +++++++++++++++++++
|
||||
1 file changed, 47 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
index 02893f3ac..88234a139 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
@@ -49,6 +49,53 @@ reg_vcc5v: vcc5v {
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
+
|
||||
+ reg_vcc33_wifi: vcc33-wifi {
|
||||
+ /* Always on 3.3V regulator for WiFi and BT */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc33-wifi";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc_wifi_io: vcc-wifi-io {
|
||||
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-wifi-io";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <®_vcc33_wifi>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_pwrseq: wifi-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rtc 1>;
|
||||
+ clock-names = "osc32k-out";
|
||||
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
|
||||
+ post-power-on-delay-ms = <200>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc1 {
|
||||
+ vmmc-supply = <®_vcc33_wifi>;
|
||||
+ vqmmc-supply = <®_vcc_wifi_io>;
|
||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+ bus-width = <4>;
|
||||
+ non-removable;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ status = "okay";
|
||||
+ uwe-bsp {
|
||||
+ compatible = "unisoc,uwe_bsp";
|
||||
+ keep-power-on;
|
||||
+ data-irq;
|
||||
+ //adma-tx;
|
||||
+ adma-rx;
|
||||
+ //blksz-512;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
};
|
||||
|
||||
&emac0 {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,184 +0,0 @@
|
||||
From ab35c98369d50766eb20920a93a2dca927935481 Mon Sep 17 00:00:00 2001
|
||||
From: OpenEmbedded <oe.patch@oe>
|
||||
Date: Fri, 19 May 2023 23:01:14 +0200
|
||||
Subject: [PATCH] Add usb support to h616. This is not needed from kernel 6.2
|
||||
|
||||
Signed-off-by: OpenEmbedded <oe.patch@oe>
|
||||
---
|
||||
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 ++++++++++++++++++
|
||||
1 file changed, 160 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 04cdec7e2..a1d872e74 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -504,6 +504,166 @@ mdio0: mdio {
|
||||
};
|
||||
};
|
||||
|
||||
+ usbotg: usb@5100000 {
|
||||
+ compatible = "allwinner,sun50i-h616-musb",
|
||||
+ "allwinner,sun8i-h3-musb";
|
||||
+ reg = <0x05100000 0x0400>;
|
||||
+ clocks = <&ccu CLK_BUS_OTG>;
|
||||
+ resets = <&ccu RST_BUS_OTG>;
|
||||
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "mc";
|
||||
+ phys = <&usbphy 0>;
|
||||
+ phy-names = "usb";
|
||||
+ extcon = <&usbphy 0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ usbphy: phy@5100400 {
|
||||
+ compatible = "allwinner,sun50i-h616-usb-phy";
|
||||
+ reg = <0x05100400 0x24>,
|
||||
+ <0x05101800 0x14>,
|
||||
+ <0x05200800 0x14>,
|
||||
+ <0x05310800 0x14>,
|
||||
+ <0x05311800 0x14>;
|
||||
+ reg-names = "phy_ctrl",
|
||||
+ "pmu0",
|
||||
+ "pmu1",
|
||||
+ "pmu2",
|
||||
+ "pmu3";
|
||||
+ clocks = <&ccu CLK_USB_PHY0>,
|
||||
+ <&ccu CLK_USB_PHY1>,
|
||||
+ <&ccu CLK_USB_PHY2>,
|
||||
+ <&ccu CLK_USB_PHY3>,
|
||||
+ <&ccu CLK_BUS_EHCI2>;
|
||||
+ clock-names = "usb0_phy",
|
||||
+ "usb1_phy",
|
||||
+ "usb2_phy",
|
||||
+ "usb3_phy",
|
||||
+ "pmu2_clk";
|
||||
+ resets = <&ccu RST_USB_PHY0>,
|
||||
+ <&ccu RST_USB_PHY1>,
|
||||
+ <&ccu RST_USB_PHY2>,
|
||||
+ <&ccu RST_USB_PHY3>;
|
||||
+ reset-names = "usb0_reset",
|
||||
+ "usb1_reset",
|
||||
+ "usb2_reset",
|
||||
+ "usb3_reset";
|
||||
+ status = "disabled";
|
||||
+ #phy-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
+ ehci0: usb@5101000 {
|
||||
+ compatible = "allwinner,sun50i-h616-ehci",
|
||||
+ "generic-ehci";
|
||||
+ reg = <0x05101000 0x100>;
|
||||
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI0>,
|
||||
+ <&ccu CLK_BUS_EHCI0>,
|
||||
+ <&ccu CLK_USB_OHCI0>;
|
||||
+ resets = <&ccu RST_BUS_OHCI0>,
|
||||
+ <&ccu RST_BUS_EHCI0>;
|
||||
+ phys = <&usbphy 0>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ohci0: usb@5101400 {
|
||||
+ compatible = "allwinner,sun50i-h616-ohci",
|
||||
+ "generic-ohci";
|
||||
+ reg = <0x05101400 0x100>;
|
||||
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI0>,
|
||||
+ <&ccu CLK_USB_OHCI0>;
|
||||
+ resets = <&ccu RST_BUS_OHCI0>;
|
||||
+ phys = <&usbphy 0>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ehci1: usb@5200000 {
|
||||
+ compatible = "allwinner,sun50i-h616-ehci",
|
||||
+ "generic-ehci";
|
||||
+ reg = <0x05200000 0x100>;
|
||||
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI1>,
|
||||
+ <&ccu CLK_BUS_EHCI1>,
|
||||
+ <&ccu CLK_USB_OHCI1>;
|
||||
+ resets = <&ccu RST_BUS_OHCI1>,
|
||||
+ <&ccu RST_BUS_EHCI1>;
|
||||
+ phys = <&usbphy 1>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ohci1: usb@5200400 {
|
||||
+ compatible = "allwinner,sun50i-h616-ohci",
|
||||
+ "generic-ohci";
|
||||
+ reg = <0x05200400 0x100>;
|
||||
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI1>,
|
||||
+ <&ccu CLK_USB_OHCI1>;
|
||||
+ resets = <&ccu RST_BUS_OHCI1>;
|
||||
+ phys = <&usbphy 1>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ehci2: usb@5310000 {
|
||||
+ compatible = "allwinner,sun50i-h616-ehci",
|
||||
+ "generic-ehci";
|
||||
+ reg = <0x05310000 0x100>;
|
||||
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI2>,
|
||||
+ <&ccu CLK_BUS_EHCI2>,
|
||||
+ <&ccu CLK_USB_OHCI2>;
|
||||
+ resets = <&ccu RST_BUS_OHCI2>,
|
||||
+ <&ccu RST_BUS_EHCI2>;
|
||||
+ phys = <&usbphy 2>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ohci2: usb@5310400 {
|
||||
+ compatible = "allwinner,sun50i-h616-ohci",
|
||||
+ "generic-ohci";
|
||||
+ reg = <0x05310400 0x100>;
|
||||
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI2>,
|
||||
+ <&ccu CLK_USB_OHCI2>;
|
||||
+ resets = <&ccu RST_BUS_OHCI2>;
|
||||
+ phys = <&usbphy 2>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ehci3: usb@5311000 {
|
||||
+ compatible = "allwinner,sun50i-h616-ehci",
|
||||
+ "generic-ehci";
|
||||
+ reg = <0x05311000 0x100>;
|
||||
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI3>,
|
||||
+ <&ccu CLK_BUS_EHCI3>,
|
||||
+ <&ccu CLK_USB_OHCI3>;
|
||||
+ resets = <&ccu RST_BUS_OHCI3>,
|
||||
+ <&ccu RST_BUS_EHCI3>;
|
||||
+ phys = <&usbphy 3>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ ohci3: usb@5311400 {
|
||||
+ compatible = "allwinner,sun50i-h616-ohci",
|
||||
+ "generic-ohci";
|
||||
+ reg = <0x05311400 0x100>;
|
||||
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_OHCI3>,
|
||||
+ <&ccu CLK_USB_OHCI3>;
|
||||
+ resets = <&ccu RST_BUS_OHCI3>;
|
||||
+ phys = <&usbphy 3>;
|
||||
+ phy-names = "usb";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
rtc: rtc@7000000 {
|
||||
compatible = "allwinner,sun50i-h616-rtc";
|
||||
reg = <0x07000000 0x400>;
|
||||
--
|
||||
2.40.1
|
||||
|
@ -1,84 +0,0 @@
|
||||
From 038441bbe0f6dab3e701061c514a8d776dbe6523 Mon Sep 17 00:00:00 2001
|
||||
From: OpenEmbedded <oe.patch@oe>
|
||||
Date: Sat, 20 May 2023 14:07:47 +0200
|
||||
Subject: [PATCH] DTS orange pi zero2 enable usb
|
||||
|
||||
Signed-off-by: OpenEmbedded <oe.patch@oe>
|
||||
---
|
||||
.../allwinner/sun50i-h616-orangepi-zero2.dts | 42 +++++++++++++++++++
|
||||
1 file changed, 42 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
index 88234a139..3b836296b 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
@@ -50,6 +50,16 @@ reg_vcc5v: vcc5v {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
+ reg_usb1_vbus: regulator-usb1-vbus {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "usb1-vbus";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
|
||||
+ };
|
||||
+
|
||||
reg_vcc33_wifi: vcc33-wifi {
|
||||
/* Always on 3.3V regulator for WiFi and BT */
|
||||
compatible = "regulator-fixed";
|
||||
@@ -79,6 +89,12 @@ wifi_pwrseq: wifi-pwrseq {
|
||||
};
|
||||
};
|
||||
|
||||
+&ehci1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* USB 2 & 3 are on headers only. */
|
||||
+
|
||||
&mmc1 {
|
||||
vmmc-supply = <®_vcc33_wifi>;
|
||||
vqmmc-supply = <®_vcc_wifi_io>;
|
||||
@@ -123,6 +139,11 @@ &mmc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+
|
||||
+&ohci1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&r_rsb {
|
||||
status = "okay";
|
||||
|
||||
@@ -258,3 +279,24 @@ &uart0 {
|
||||
pinctrl-0 = <&uart0_ph_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+&usbotg {
|
||||
+ /*
|
||||
+ * PHY0 pins are connected to a USB-C socket, but a role switch
|
||||
+ * is not implemented: both CC pins are pulled to GND.
|
||||
+ * The VBUS pins power the device, so a fixed peripheral mode
|
||||
+ * is the best choice.
|
||||
+ * The board can be powered via GPIOs, in this case port0 *can*
|
||||
+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
|
||||
+ * then provided by the GPIOs. Any user of this setup would
|
||||
+ * need to adjust the DT accordingly: dr_mode set to "host",
|
||||
+ * enabling OHCI0 and EHCI0.
|
||||
+ */
|
||||
+ dr_mode = "peripheral";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbphy {
|
||||
+ usb1_vbus-supply = <®_usb1_vbus>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.40.1
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -7,26 +7,6 @@ inherit kernel
|
||||
|
||||
require linux.inc
|
||||
|
||||
LINUX_VERSION = "${PV}"
|
||||
|
||||
KERNEL_DTB_PREFIX = "0"
|
||||
|
||||
python() {
|
||||
# return version in int form
|
||||
def kernel_version():
|
||||
ver = d.getVar('PV', True).split('.')
|
||||
return int("".join(ver[0])),int("".join(ver[1]))
|
||||
|
||||
# kernel 6.5 have updated dts path add 'allwinner' prefix automatically
|
||||
major, minor = kernel_version()
|
||||
if major >= 6 and minor >= 5:
|
||||
dt = d.getVar('KERNEL_DEVICETREE', True)
|
||||
if not "allwinner" in dt:
|
||||
dt = "allwinner/{0}".format(dt)
|
||||
d.setVar('KERNEL_DEVICETREE', dt)
|
||||
d.setVar('KERNEL_DTB_PREFIX', "1")
|
||||
}
|
||||
|
||||
# Since we're not using git, this doesn't make a difference, but we need to fill
|
||||
# in something or kernel-yocto.bbclass will fail.
|
||||
KBRANCH ?= "master"
|
||||
@ -44,25 +24,10 @@ S = "${WORKDIR}/linux-${PV}"
|
||||
KRELEASE = "${@d.getVar('PV', True).split('.')[0]}"
|
||||
|
||||
SRC_URI = "https://www.kernel.org/pub/linux/kernel/v${KRELEASE}.x/linux-${PV}.tar.xz \
|
||||
file://defconfig \
|
||||
file://sunxi-kmeta;type=kmeta;name=sunxi-kmeta;destsuffix=sunxi-kmeta \
|
||||
"
|
||||
|
||||
# append patches for kernels before 6.5 and after based on version
|
||||
SRC_URI += "${@oe.utils.ifelse(d.getVar('KERNEL_DTB_PREFIX') == '1', d.getVar('SOURCES_K65'), d.getVar('SOURCES'))}"
|
||||
|
||||
SOURCES_K65 = " \
|
||||
file://6.5/0001-dts-orangepi-zero-Add-wifi-support.patch \
|
||||
file://6.5/0002-dts-nanopi-neo-air-Add-camera-support.patch \
|
||||
file://6.5/0003-dts-allwinner-bananapi-m2-zero-Enforce-consistent-MM.patch \
|
||||
file://6.5/0004-dts-allwinner-bananapi-m64-Consistent-nodes-for-mmc-devices.patch \
|
||||
"
|
||||
|
||||
SOURCES = " \
|
||||
file://0001-dts-orange-pi-zero-Add-wifi-support.patch \
|
||||
file://0002-dts-nanopi-neo-air-add-camera.patch \
|
||||
file://0003-dts-allwinner-bananapi-m2-zreo-Enforce-consistent-MM.patch \
|
||||
file://0004-dts-allwinner-bananapi-m64-Consistent-nodes-for-mmc-devices.patch \
|
||||
file://defconfig \
|
||||
"
|
||||
|
||||
SRC_URI:append:use-mailine-graphics = " file://drm.cfg"
|
||||
@ -70,10 +35,5 @@ SRC_URI:append:bananapi = " file://axp20x.cfg"
|
||||
SRC_URI:append:bananapi-m2-zero = " file://axp20x.cfg"
|
||||
SRC_URI:append:cubietruck = " file://axp20x.cfg"
|
||||
SRC_URI:append:nanopi-neo-air = " file://cam500b.cfg"
|
||||
SRC_URI:append:orange-pi-prime = " \
|
||||
file://0001-dts-sun50i-h5-enable-power-button-for-orange-pi-prime.patch \
|
||||
file://0002-dts-sun50i-h5-orange-pi-prime-add-regulator.patch \
|
||||
file://0003-dts-sun50i-h5-orange-pi-prime-add-rtl8723cs.patch \
|
||||
"
|
||||
|
||||
FILES_${KERNEL_PACKAGE_NAME}-base:append = " ${nonarch_base_libdir}/modules/${KERNEL_VERSION}/modules.builtin.modinfo"
|
||||
|
@ -1,27 +0,0 @@
|
||||
From f487f62babb11d014da7a0b58a0fcdf6d217a812 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
Date: Thu, 11 May 2023 11:18:33 +0200
|
||||
Subject: [PATCH] bananapi-m64: Consistent nodes for mmc devices
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
index e6d5bc0f7..39a28aad8 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
@@ -16,6 +16,9 @@ aliases {
|
||||
ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
+ mmc0 = &mmc0;
|
||||
+ mmc1 = &mmc1;
|
||||
+ mmc2 = &mmc2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
--
|
||||
2.25.1
|
||||
|
@ -1,100 +0,0 @@
|
||||
From a9bad790ae9a9e9befbe8e8938b6baca84ee5138 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
Date: Tue, 24 Oct 2023 10:40:52 +0200
|
||||
Subject: [PATCH] dts: orangepi-zero: Add wifi support
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
.../allwinner/sun8i-h2-plus-orangepi-zero.dts | 46 +++++++++++++++----
|
||||
1 file changed, 37 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
|
||||
index 3706216ff..ca94e313f 100644
|
||||
--- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
|
||||
+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
|
||||
@@ -80,13 +80,15 @@ status_led {
|
||||
};
|
||||
};
|
||||
|
||||
- reg_vcc_wifi: reg_vcc_wifi {
|
||||
+ vdd_wifi: vdd_wifi {
|
||||
compatible = "regulator-fixed";
|
||||
- regulator-min-microvolt = <3300000>;
|
||||
- regulator-max-microvolt = <3300000>;
|
||||
- regulator-name = "vcc-wifi";
|
||||
- enable-active-high;
|
||||
+ regulator-name = "wifi";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
|
||||
+ startup-delay-us = <70000>;
|
||||
+ enable-active-high;
|
||||
+
|
||||
};
|
||||
|
||||
reg_vdd_cpux: vdd-cpux-regulator {
|
||||
@@ -105,10 +107,12 @@ reg_vdd_cpux: vdd-cpux-regulator {
|
||||
states = <1100000 0>, <1300000 1>;
|
||||
};
|
||||
|
||||
- wifi_pwrseq: wifi_pwrseq {
|
||||
+ pwrseq_wifi: pwrseq_wifi {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_rst>;
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
|
||||
- post-power-on-delay-ms = <200>;
|
||||
+ post-power-on-delay-ms = <50>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -139,9 +143,11 @@ &mmc0 {
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
- vmmc-supply = <®_vcc_wifi>;
|
||||
- mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+ vmmc-supply = <®_vcc3v3>;
|
||||
+ vqmmc-supply = <&vdd_wifi>;
|
||||
+ mmc-pwrseq = <&pwrseq_wifi>;
|
||||
bus-width = <4>;
|
||||
+ max-frequency = <16000000>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
|
||||
@@ -151,6 +157,13 @@ &mmc1 {
|
||||
*/
|
||||
xr819: sdio_wifi@1 {
|
||||
reg = <1>;
|
||||
+ compatible = "xradio,xr819";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_wake>;
|
||||
+ interrupt-parent = <&pio>;
|
||||
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
|
||||
+ interrupt-names = "host-wake";
|
||||
+ local-mac-address = [dc 44 6d c0 ff ee];
|
||||
};
|
||||
};
|
||||
|
||||
@@ -207,3 +220,18 @@ &usbphy {
|
||||
status = "okay";
|
||||
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
|
||||
};
|
||||
+
|
||||
+&pio {
|
||||
+ wifi_wake: wifi_wake {
|
||||
+ pins = "PG10";
|
||||
+ function = "gpio_in";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&r_pio {
|
||||
+ wifi_rst: wifi_rst {
|
||||
+ pins = "PL7";
|
||||
+ function = "gpio_out";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
--
|
||||
2.25.1
|
||||
|
@ -1,113 +0,0 @@
|
||||
From e0d786f5465d2e2d977696cf0d02c70b78402291 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
Date: Tue, 24 Oct 2023 10:42:36 +0200
|
||||
Subject: [PATCH] dts:nanopi-neo-air: Add camera support
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
.../dts/allwinner/sun8i-h3-nanopi-neo-air.dts | 85 +++++++++++++++++++
|
||||
1 file changed, 85 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
|
||||
index 9e1a33f94..7a05eff33 100644
|
||||
--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
|
||||
+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
|
||||
@@ -77,6 +77,39 @@ wifi_pwrseq: wifi_pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
};
|
||||
+
|
||||
+ cam_xclk: cam-xclk {
|
||||
+ #clock-cells = <0>;
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <24000000>;
|
||||
+ clock-output-names = "cam-xclk";
|
||||
+ };
|
||||
+
|
||||
+ reg_cam_avdd: cam-avdd {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "cam-avdd";
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+ vin-supply = <®_vcc3v3>;
|
||||
+ };
|
||||
+
|
||||
+ reg_cam_dovdd: cam-dovdd {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "cam-dovdd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <®_vcc3v3>;
|
||||
+ };
|
||||
+
|
||||
+ reg_cam_dvdd: cam-dvdd {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "cam-dvdd";
|
||||
+ regulator-min-microvolt = <1500000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ vin-supply = <®_vcc3v3>;
|
||||
+ };
|
||||
+
|
||||
+
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
@@ -141,3 +174,55 @@ &usbphy {
|
||||
/* USB VBUS is always on */
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+&csi {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ port {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ /* Parallel bus endpoint */
|
||||
+ csi_from_ov5640: endpoint {
|
||||
+ remote-endpoint = <&ov5640_to_csi>;
|
||||
+ bus-width = <8>;
|
||||
+ data-shift = <2>;
|
||||
+ hsync-active = <1>; /* Active high */
|
||||
+ vsync-active = <0>; /* Active low */
|
||||
+ data-active = <1>; /* Active high */
|
||||
+ pclk-sample = <1>; /* Rising */
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ov5640: camera@3c {
|
||||
+ compatible = "ovti,ov5640";
|
||||
+ reg = <0x3c>;
|
||||
+ clocks = <&cam_xclk>;
|
||||
+ clock-names = "xclk";
|
||||
+
|
||||
+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
|
||||
+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
|
||||
+ AVDD-supply = <®_cam_avdd>;
|
||||
+ DOVDD-supply = <®_cam_dovdd>;
|
||||
+ DVDD-supply = <®_cam_dvdd>;
|
||||
+
|
||||
+ port {
|
||||
+ ov5640_to_csi: endpoint {
|
||||
+ remote-endpoint = <&csi_from_ov5640>;
|
||||
+ bus-width = <8>;
|
||||
+ data-shift = <2>;
|
||||
+ hsync-active = <1>; /* Active high */
|
||||
+ vsync-active = <0>; /* Active low */
|
||||
+ data-active = <1>; /* Active high */
|
||||
+ pclk-sample = <1>; /* Rising */
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+&i2c2_pins {
|
||||
+ bias-pull-up;
|
||||
+};
|
||||
--
|
||||
2.25.1
|
||||
|
@ -1,30 +0,0 @@
|
||||
From 7d7f32460702e99cab48909bb85ed84b67e65062 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
Date: Tue, 24 Oct 2023 10:43:55 +0200
|
||||
Subject: [PATCH] dts: allwinner: bananapi-m2-zero: Enforce consistent MMC
|
||||
numbering
|
||||
|
||||
Enforce MMC number (sometimes the order was wrong and the device does not boot).
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts
|
||||
index d729b7c70..410a79487 100644
|
||||
--- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts
|
||||
+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts
|
||||
@@ -20,6 +20,9 @@ / {
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
+ mmc0 = &mmc0;
|
||||
+ mmc1 = &mmc1;
|
||||
+ mmc2 = &mmc2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
--
|
||||
2.25.1
|
||||
|
@ -1,27 +0,0 @@
|
||||
From f487f62babb11d014da7a0b58a0fcdf6d217a812 Mon Sep 17 00:00:00 2001
|
||||
From: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
Date: Thu, 11 May 2023 11:18:33 +0200
|
||||
Subject: [PATCH] bananapi-m64: Consistent nodes for mmc devices
|
||||
|
||||
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
index e6d5bc0f7..39a28aad8 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
@@ -16,6 +16,9 @@ aliases {
|
||||
ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
+ mmc0 = &mmc0;
|
||||
+ mmc1 = &mmc1;
|
||||
+ mmc2 = &mmc2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
--
|
||||
2.25.1
|
||||
|
@ -1,27 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Gunjan Gupta <viraniac@gmail.com>
|
||||
Date: Sat, 15 Jul 2023 17:06:17 +0000
|
||||
Subject: arm64: dts: sun50i: h5: enable power button for orangepi prime
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
index f430acd8558f..35e09098570f 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
@@ -63,8 +63,9 @@ gpio-keys {
|
||||
|
||||
key-sw4 {
|
||||
label = "sw4";
|
||||
- linux,code = <BTN_0>;
|
||||
+ linux,code = <KEY_POWER>;
|
||||
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
|
||||
+ wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,66 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: The-going <48602507+The-going@users.noreply.github.com>
|
||||
Date: Mon, 24 Jan 2022 19:34:31 +0300
|
||||
Subject: arm64:dts: sun50i-h5-orangepi-prime add regulator
|
||||
|
||||
---
|
||||
.../allwinner/sun50i-h5-orangepi-prime.dts | 30 +++++++++++++++++++
|
||||
1 file changed, 30 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
index 998396bc0..6dc6850c1 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
@@ -8,6 +8,7 @@
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/pinctrl/sun4i-a10.h>
|
||||
|
||||
/ {
|
||||
model = "Xunlong Orange Pi Prime";
|
||||
@@ -93,6 +94,10 @@ wifi_pwrseq: wifi_pwrseq {
|
||||
};
|
||||
};
|
||||
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <®_vdd_cpux>;
|
||||
+};
|
||||
+
|
||||
&codec {
|
||||
allwinner,audio-routing =
|
||||
"Line Out", "LINEOUT",
|
||||
@@ -188,6 +193,31 @@ &ohci3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&r_i2c {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ reg_vdd_cpux: regulator@65 {
|
||||
+ compatible = "silergy,sy8106a";
|
||||
+ reg = <0x65>;
|
||||
+ regulator-name = "vdd-cpux";
|
||||
+ silergy,fixed-microvolt = <1200000>;
|
||||
+ /*
|
||||
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
|
||||
+ * however both the Armbian DVFS table and the official one
|
||||
+ * have operating points with voltage under 1.1V, and both
|
||||
+ * DVFS table are known to work properly at the lowest
|
||||
+ * operating point.
|
||||
+ *
|
||||
+ * Use 1.0V as the minimum voltage instead.
|
||||
+ */
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1400000>;
|
||||
+ regulator-ramp-delay = <200>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pa_pins>;
|
||||
--
|
||||
2.25.1
|
@ -1,35 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: The-going <48602507+The-going@users.noreply.github.com>
|
||||
Date: Mon, 7 Feb 2022 19:11:07 +0300
|
||||
Subject: arm64:dts: sun50i-h5-orangepi-prime add rtl8723cs
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
index 8b92d5e77220..f430acd8558f 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
@@ -25,6 +25,7 @@ reg_vcc3v3: vcc3v3 {
|
||||
aliases {
|
||||
ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
+ ethernet1 = &rtl8723cs;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -174,6 +175,10 @@ &mmc1 {
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
+
|
||||
+ rtl8723cs: sdio_wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,72 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: The-going <48602507+The-going@users.noreply.github.com>
|
||||
Date: Sat, 16 Apr 2022 11:51:35 +0300
|
||||
Subject: add nodes for sunxi-info, sunxi-addr and sunxi-dump-reg
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 ++++++++++
|
||||
1 file changed, 19 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
index 538c90663602..6365cce07304 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -1243,6 +1243,25 @@ ths: thermal-sensor@5070400 {
|
||||
nvmem-cell-names = "calibration";
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
+
|
||||
+ sunxi-info {
|
||||
+ compatible = "allwinner,sun50i-h6-sys-info";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ addr_mgt: addr-mgt {
|
||||
+ compatible = "allwinner,sunxi-addr_mgt";
|
||||
+ type_addr_wifi = <0x2>;
|
||||
+ type_addr_bt = <0x2>;
|
||||
+ type_addr_eth = <0x2>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ dump_reg: dump_reg@20000 {
|
||||
+ compatible = "allwinner,sunxi-dump-reg";
|
||||
+ reg = <0x0 0x03001000 0x0 0x0f20>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 98735d39e6e8..5ff1b357a25b 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -1053,6 +1053,25 @@ ths: thermal-sensor@5070400 {
|
||||
nvmem-cell-names = "calibration";
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
+
|
||||
+ dump_reg: dump_reg@20000 {
|
||||
+ compatible = "allwinner,sunxi-dump-reg";
|
||||
+ reg = <0x0 0x03001000 0x0 0x0f20>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ sunxi-info {
|
||||
+ compatible = "allwinner,sun50i-h616-sys-info";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ addr_mgt: addr-mgt {
|
||||
+ compatible = "allwinner,sunxi-addr_mgt";
|
||||
+ type_addr_wifi = <0x2>;
|
||||
+ type_addr_bt = <0x2>;
|
||||
+ type_addr_eth = <0x2>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,41 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Kali Prasad <kprasadvnsi@protonmail.com>
|
||||
Date: Sun, 19 Sep 2021 08:02:27 +0000
|
||||
Subject: arm64: dts: allwinner: h616: Add device node for SID
|
||||
|
||||
The device tree binding for H616's SID controller.
|
||||
|
||||
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 15 ++++++++++
|
||||
1 file changed, 15 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 45359b0d317a..7ad1982fb47f 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -171,6 +171,21 @@ ccu: clock@3001000 {
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
+ sid: efuse@3006000 {
|
||||
+ compatible = "allwinner,sun50i-h616-sid";
|
||||
+ reg = <0x03006000 0x1000>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ cpu_speed_grade: cpu-speed-grade@0 {
|
||||
+ reg = <0x00 0x02>;
|
||||
+ };
|
||||
+
|
||||
+ ths_calibration: thermal-sensor-calibration@14 {
|
||||
+ reg = <0x14 0x8>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
watchdog: watchdog@30090a0 {
|
||||
compatible = "allwinner,sun50i-h616-wdt",
|
||||
"allwinner,sun6i-a31-wdt";
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,473 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: AGM1968 <AGM1968@users.noreply.github.com>
|
||||
Date: Tue, 23 May 2023 16:43:00 +0000
|
||||
Subject: arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
drivers/cpufreq/cpufreq-dt-platdev.c drivers/cpufreq/sun50i-cpufreq-nvmem.c
|
||||
|
||||
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi | 75 ++++++++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi | 64 +++++++++++++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 1 +
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 62 ++-----------
|
||||
drivers/cpufreq/cpufreq-dt-platdev.c | 2 +
|
||||
drivers/cpufreq/sun50i-cpufreq-nvmem.c | 92 +++++++---
|
||||
7 files changed, 221 insertions(+), 80 deletions(-)
|
||||
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
|
||||
new file mode 100644
|
||||
index 000000000000..36f2950367c6
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
|
||||
@@ -0,0 +1,75 @@
|
||||
+//SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+//Testing Version 1 from: AGM1968 <AGM1968@users.noreply.github.com>
|
||||
+//Noted: PLL_CPUX = 24 MHz*N/P (WIP)
|
||||
+
|
||||
+/ {
|
||||
+ cpu_opp_table: opp-table-cpu {
|
||||
+ compatible = "allwinner,sun50i-h616-operating-points";
|
||||
+ nvmem-cells = <&cpu_speed_grade>;
|
||||
+ opp-shared;
|
||||
+
|
||||
+ opp-480000000 {
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ opp-hz = /bits/ 64 <480000000>;
|
||||
+ opp-microvolt-speed0 = <820000 820000 1100000>;
|
||||
+ opp-microvolt-speed1 = <880000 880000 1100000>;
|
||||
+ opp-microvolt-speed2 = <880000 880000 1100000>;
|
||||
+ };
|
||||
+
|
||||
+ opp-600000000 {
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ opp-hz = /bits/ 64 <600000000>;
|
||||
+ opp-microvolt-speed0 = <820000 820000 1100000>;
|
||||
+ opp-microvolt-speed1 = <880000 880000 1100000>;
|
||||
+ opp-microvolt-speed2 = <880000 880000 1100000>;
|
||||
+ };
|
||||
+
|
||||
+ opp-792000000 {
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ opp-hz = /bits/ 64 <792000000>;
|
||||
+ opp-microvolt-speed0 = <860000 860000 1100000>;
|
||||
+ opp-microvolt-speed1 = <940000 940000 1100000>;
|
||||
+ opp-microvolt-speed2 = <940000 940000 1100000>;
|
||||
+ };
|
||||
+
|
||||
+ opp-1008000000 {
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ opp-hz = /bits/ 64 <1008000000>;
|
||||
+ opp-microvolt-speed0 = <900000 900000 1100000>;
|
||||
+ opp-microvolt-speed1 = <1020000 1020000 1100000>;
|
||||
+ opp-microvolt-speed2 = <1020000 1020000 1100000>;
|
||||
+ };
|
||||
+
|
||||
+ opp-1200000000 {
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ opp-hz = /bits/ 64 <1200000000>;
|
||||
+ opp-microvolt-speed0 = <960000 960000 1100000>;
|
||||
+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
|
||||
+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
|
||||
+ };
|
||||
+
|
||||
+ opp-1512000000 {
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ opp-hz = /bits/ 64 <1512000000>;
|
||||
+ opp-microvolt-speed0 = <1100000 1100000 1100000>;
|
||||
+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
|
||||
+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ operating-points-v2 = <&cpu_opp_table>;
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
index 0666d16ba7d0..54d706286554 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
@@ -7,6 +7,7 @@
|
||||
*/
|
||||
|
||||
#include "sun50i-h616.dtsi"
|
||||
+#include "sun50i-h616-cpu-opp.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
index 8d8009c7f9a3..41a5a4013091 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
@@ -12,6 +12,11 @@ / {
|
||||
compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
|
||||
};
|
||||
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <®_dcdca>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&emac0 {
|
||||
phy-supply = <®_dcdce>;
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000000..0509e3fb22e26
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
|
||||
@@ -0,0 +1,64 @@
|
||||
+
|
||||
+
|
||||
+&r_i2c {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ axp313: pmic@36 {
|
||||
+ compatible = "x-powers,axp313a";
|
||||
+ reg = <0x36>;
|
||||
+ #interrupt-cells = <1>;
|
||||
+ interrupt-controller;
|
||||
+ interrupt-parent = <&pio>;
|
||||
+ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
|
||||
+
|
||||
+ vin1-supply = <®_vcc5v>;
|
||||
+ vin2-supply = <®_vcc5v>;
|
||||
+ vin3-supply = <®_vcc5v>;
|
||||
+
|
||||
+ regulators {
|
||||
+ /* Supplies VCC-PLL and DRAM */
|
||||
+ reg_aldo1: aldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc1v8";
|
||||
+ };
|
||||
+
|
||||
+ /* Supplies VCC-IO, so needs to be always on. */
|
||||
+ reg_dldo1: dldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc3v3";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc1: dcdc1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <810000>;
|
||||
+ regulator-max-microvolt = <990000>;
|
||||
+ regulator-step-delay-us = <25>;
|
||||
+ regulator-final-delay-us = <50>;
|
||||
+ regulator-name = "vdd-gpu-sys";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc2: dcdc2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ regulator-step-delay-us = <25>;
|
||||
+ regulator-final-delay-us = <50>;
|
||||
+ regulator-ramp-delay = <200>;
|
||||
+ regulator-name = "vdd-cpu";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdc3: dcdc3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1100000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ regulator-step-delay-us = <25>;
|
||||
+ regulator-final-delay-us = <50>;
|
||||
+ regulator-name = "vdd-dram";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
|
||||
index 00fe28caac93..edbfc83f390a 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
|
||||
@@ -6,12 +6,18 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "sun50i-h616-orangepi-zero.dtsi"
|
||||
+#include "sun50i-h618-cpu-dvfs.dtsi"
|
||||
|
||||
/ {
|
||||
model = "OrangePi Zero3";
|
||||
compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
|
||||
};
|
||||
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <®_dcdc2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&emac0 {
|
||||
phy-supply = <®_dldo1>;
|
||||
};
|
||||
@@ -31,62 +37,6 @@ &mmc0 {
|
||||
vmmc-supply = <®_dldo1>;
|
||||
};
|
||||
|
||||
-&r_i2c {
|
||||
- status = "okay";
|
||||
-
|
||||
- axp313: pmic@36 {
|
||||
- compatible = "x-powers,axp313a";
|
||||
- reg = <0x36>;
|
||||
- #interrupt-cells = <1>;
|
||||
- interrupt-controller;
|
||||
- interrupt-parent = <&pio>;
|
||||
- interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
|
||||
-
|
||||
- vin1-supply = <®_vcc5v>;
|
||||
- vin2-supply = <®_vcc5v>;
|
||||
- vin3-supply = <®_vcc5v>;
|
||||
-
|
||||
- regulators {
|
||||
- /* Supplies VCC-PLL, so needs to be always on. */
|
||||
- reg_aldo1: aldo1 {
|
||||
- regulator-always-on;
|
||||
- regulator-min-microvolt = <1800000>;
|
||||
- regulator-max-microvolt = <1800000>;
|
||||
- regulator-name = "vcc1v8";
|
||||
- };
|
||||
-
|
||||
- /* Supplies VCC-IO, so needs to be always on. */
|
||||
- reg_dldo1: dldo1 {
|
||||
- regulator-always-on;
|
||||
- regulator-min-microvolt = <3300000>;
|
||||
- regulator-max-microvolt = <3300000>;
|
||||
- regulator-name = "vcc3v3";
|
||||
- };
|
||||
-
|
||||
- reg_dcdc1: dcdc1 {
|
||||
- regulator-always-on;
|
||||
- regulator-min-microvolt = <810000>;
|
||||
- regulator-max-microvolt = <990000>;
|
||||
- regulator-name = "vdd-gpu-sys";
|
||||
- };
|
||||
-
|
||||
- reg_dcdc2: dcdc2 {
|
||||
- regulator-always-on;
|
||||
- regulator-min-microvolt = <810000>;
|
||||
- regulator-max-microvolt = <1100000>;
|
||||
- regulator-name = "vdd-cpu";
|
||||
- };
|
||||
-
|
||||
- reg_dcdc3: dcdc3 {
|
||||
- regulator-always-on;
|
||||
- regulator-min-microvolt = <1100000>;
|
||||
- regulator-max-microvolt = <1100000>;
|
||||
- regulator-name = "vdd-dram";
|
||||
- };
|
||||
- };
|
||||
- };
|
||||
-};
|
||||
-
|
||||
&pio {
|
||||
vcc-pc-supply = <®_dldo1>;
|
||||
vcc-pf-supply = <®_dldo1>;
|
||||
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
index fb2875ce1fdd..e63d36839769 100644
|
||||
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
@@ -104,6 +104,8 @@ static const struct of_device_id allowlist[] __initconst = {
|
||||
*/
|
||||
static const struct of_device_id blocklist[] __initconst = {
|
||||
{ .compatible = "allwinner,sun50i-h6", },
|
||||
+ { .compatible = "allwinner,sun50i-h616", },
|
||||
+ { .compatible = "allwinner,sun50i-h618", },
|
||||
|
||||
{ .compatible = "apple,arm-platform", },
|
||||
|
||||
diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
|
||||
index 6845ab5034ec..5d85bfe475de 100644
|
||||
--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
|
||||
+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
|
||||
@@ -6,6 +6,9 @@
|
||||
* provide the OPP framework with required information.
|
||||
*
|
||||
* Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
|
||||
+ *
|
||||
+ * ADD efuse_xlate to extract SoC version so that h6 and h616 can coexist.
|
||||
+ * Version 1 AGM1968 <AGM1968@users.noreply.github.com>
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
@@ -20,25 +23,62 @@
|
||||
|
||||
#define MAX_NAME_LEN 7
|
||||
|
||||
-#define NVMEM_MASK 0x7
|
||||
-#define NVMEM_SHIFT 5
|
||||
+#define SUN50I_H616_NVMEM_MASK 0x22
|
||||
+#define SUN50I_H616_NVMEM_SHIFT 5
|
||||
+#define SUN50I_H6_NVMEM_MASK 0x7
|
||||
+#define SUN50I_H6_NVMEM_SHIFT 5
|
||||
+
|
||||
+struct sunxi_cpufreq_soc_data {
|
||||
+ u32 (*efuse_xlate) (void *efuse);
|
||||
+};
|
||||
|
||||
static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
|
||||
|
||||
+static u32 sun50i_h616_efuse_xlate(void *efuse)
|
||||
+{
|
||||
+ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H616_NVMEM_SHIFT) &
|
||||
+ SUN50I_H616_NVMEM_MASK;
|
||||
+
|
||||
+ /* Tested as V1 h616 soc. Expected efuse values are 1 - 3,
|
||||
+ slowest to fastest */
|
||||
+ if (efuse_value >=1 && efuse_value <= 3)
|
||||
+ return efuse_value - 1;
|
||||
+ else
|
||||
+ return 0;
|
||||
+};
|
||||
+
|
||||
+static u32 sun50i_h6_efuse_xlate(void *efuse)
|
||||
+{
|
||||
+ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H6_NVMEM_SHIFT) &
|
||||
+ SUN50I_H6_NVMEM_MASK;
|
||||
+
|
||||
+ /*
|
||||
+ * We treat unexpected efuse values as if the SoC was from
|
||||
+ * the slowest bin. Expected efuse values are 1 - 3, slowest
|
||||
+ * to fastest.
|
||||
+ */
|
||||
+ if (efuse_value >= 1 && efuse_value <= 3)
|
||||
+ return efuse_value - 1;
|
||||
+ else
|
||||
+ return 0;
|
||||
+};
|
||||
+
|
||||
+
|
||||
/**
|
||||
* sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
|
||||
+ * @soc_data: pointer to sunxi_cpufreq_soc_data context
|
||||
* @versions: Set to the value parsed from efuse
|
||||
*
|
||||
* Returns 0 if success.
|
||||
*/
|
||||
-static int sun50i_cpufreq_get_efuse(u32 *versions)
|
||||
+static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data,
|
||||
+ u32 *versions)
|
||||
{
|
||||
struct nvmem_cell *speedbin_nvmem;
|
||||
struct device_node *np;
|
||||
struct device *cpu_dev;
|
||||
- u32 *speedbin, efuse_value;
|
||||
+ u32 *speedbin;
|
||||
size_t len;
|
||||
- int ret;
|
||||
|
||||
cpu_dev = get_cpu_device(0);
|
||||
if (!cpu_dev)
|
||||
@@ -47,10 +87,9 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
|
||||
np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
|
||||
if (!np)
|
||||
return -ENOENT;
|
||||
-
|
||||
- ret = of_device_is_compatible(np,
|
||||
- "allwinner,sun50i-h6-operating-points");
|
||||
- if (!ret) {
|
||||
+ if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) {}
|
||||
+ else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) {}
|
||||
+ else {
|
||||
of_node_put(np);
|
||||
return -ENOENT;
|
||||
}
|
||||
@@ -66,17 +105,7 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
|
||||
if (IS_ERR(speedbin))
|
||||
return PTR_ERR(speedbin);
|
||||
|
||||
- efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
|
||||
-
|
||||
- /*
|
||||
- * We treat unexpected efuse values as if the SoC was from
|
||||
- * the slowest bin. Expected efuse values are 1-3, slowest
|
||||
- * to fastest.
|
||||
- */
|
||||
- if (efuse_value >= 1 && efuse_value <= 3)
|
||||
- *versions = efuse_value - 1;
|
||||
- else
|
||||
- *versions = 0;
|
||||
+ *versions = soc_data->efuse_xlate(speedbin);
|
||||
|
||||
kfree(speedbin);
|
||||
return 0;
|
||||
@@ -84,18 +113,23 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
|
||||
|
||||
static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
|
||||
{
|
||||
+ const struct of_device_id *match;
|
||||
int *opp_tokens;
|
||||
char name[MAX_NAME_LEN];
|
||||
unsigned int cpu;
|
||||
u32 speed = 0;
|
||||
int ret;
|
||||
|
||||
+ match = dev_get_platdata(&pdev->dev);
|
||||
+ if (!match)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),
|
||||
GFP_KERNEL);
|
||||
if (!opp_tokens)
|
||||
return -ENOMEM;
|
||||
|
||||
- ret = sun50i_cpufreq_get_efuse(&speed);
|
||||
+ ret = sun50i_cpufreq_get_efuse(match-> data, &speed);
|
||||
if (ret) {
|
||||
kfree(opp_tokens);
|
||||
return ret;
|
||||
@@ -159,8 +193,18 @@ static struct platform_driver sun50i_cpufreq_driver = {
|
||||
},
|
||||
};
|
||||
|
||||
+static const struct sunxi_cpufreq_soc_data sun50i_h616_data = {
|
||||
+ .efuse_xlate = sun50i_h616_efuse_xlate,
|
||||
+};
|
||||
+
|
||||
+static const struct sunxi_cpufreq_soc_data sun50i_h6_data = {
|
||||
+ .efuse_xlate = sun50i_h6_efuse_xlate,
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id sun50i_cpufreq_match_list[] = {
|
||||
- { .compatible = "allwinner,sun50i-h6" },
|
||||
+ { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data },
|
||||
+ { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data },
|
||||
+ { .compatible = "allwinner,sun50i-h618", .data = &sun50i_h616_data },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
|
||||
@@ -196,8 +239,8 @@ static int __init sun50i_cpufreq_init(void)
|
||||
return ret;
|
||||
|
||||
sun50i_cpufreq_pdev =
|
||||
- platform_device_register_simple("sun50i-cpufreq-nvmem",
|
||||
- -1, NULL, 0);
|
||||
+ platform_device_register_data(NULL,
|
||||
+ "sun50i-cpufreq-nvmem", -1, match, sizeof(*match));
|
||||
ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
|
||||
if (ret == 0)
|
||||
return 0;
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,135 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Kali Prasad <kprasadvnsi@protonmail.com>
|
||||
Date: Sun, 19 Sep 2021 08:02:27 +0000
|
||||
Subject: arm64: dts: allwinner: h616: Add thermal sensor and thermal zones
|
||||
|
||||
There are four sensors, CPU, GPU, VE, and DDR.
|
||||
|
||||
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 75 ++++++++++
|
||||
1 file changed, 75 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 7ad1982fb47f..8628a9e3dfca 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -9,6 +9,7 @@
|
||||
#include <dt-bindings/clock/sun6i-rtc.h>
|
||||
#include <dt-bindings/reset/sun50i-h616-ccu.h>
|
||||
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
|
||||
+#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
@@ -25,6 +26,8 @@ cpu0: cpu@0 {
|
||||
reg = <0>;
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ #cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
@@ -33,6 +36,8 @@ cpu1: cpu@1 {
|
||||
reg = <1>;
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ #cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
@@ -41,6 +46,8 @@ cpu2: cpu@2 {
|
||||
reg = <2>;
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ #cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
@@ -49,6 +56,8 @@ cpu3: cpu@3 {
|
||||
reg = <3>;
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
+ clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
+ #cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -833,5 +842,71 @@ r_rsb: rsb@7083000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
+
|
||||
+ ths: thermal-sensor@5070400 {
|
||||
+ compatible = "allwinner,sun50i-h616-ths";
|
||||
+ reg = <0x05070400 0x400>;
|
||||
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_THS>;
|
||||
+ clock-names = "bus";
|
||||
+ resets = <&ccu RST_BUS_THS>;
|
||||
+ nvmem-cells = <&ths_calibration>;
|
||||
+ nvmem-cell-names = "calibration";
|
||||
+ #thermal-sensor-cells = <1>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ thermal-zones {
|
||||
+ cpu-thermal {
|
||||
+ polling-delay-passive = <500>;
|
||||
+ polling-delay = <1000>;
|
||||
+ thermal-sensors = <&ths 2>;
|
||||
+ sustainable-power = <1000>;
|
||||
+ k_po = <20>;
|
||||
+ k_pu = <40>;
|
||||
+ k_i = <0>;
|
||||
+
|
||||
+ trips {
|
||||
+ cpu_threshold: trip-point@0 {
|
||||
+ temperature = <60000>;
|
||||
+ type = "passive";
|
||||
+ hysteresis = <0>;
|
||||
+ };
|
||||
+ cpu_target: trip-point@1 {
|
||||
+ temperature = <70000>;
|
||||
+ type = "passive";
|
||||
+ hysteresis = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ cooling-maps {
|
||||
+ map0 {
|
||||
+ trip = <&cpu_target>;
|
||||
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpu-thermal {
|
||||
+ polling-delay-passive = <500>;
|
||||
+ polling-delay = <1000>;
|
||||
+ thermal-sensors = <&ths 0>;
|
||||
+ sustainable-power = <1100>;
|
||||
+ };
|
||||
+
|
||||
+ ve-thermal {
|
||||
+ polling-delay-passive = <0>;
|
||||
+ polling-delay = <0>;
|
||||
+ thermal-sensors = <&ths 1>;
|
||||
+ };
|
||||
+
|
||||
+ ddr-thermal {
|
||||
+ polling-delay-passive = <0>;
|
||||
+ polling-delay = <0>;
|
||||
+ thermal-sensors = <&ths 3>;
|
||||
+ };
|
||||
};
|
||||
};
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,73 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Micha=C5=82=20Dzieko=C5=84ski?=
|
||||
<michal.dziekonski+github@gmail.com>
|
||||
Date: Wed, 3 May 2023 12:17:28 +0000
|
||||
Subject: arm64: dts: allwinner: h616: Fix thermal zones (add missing trips)
|
||||
|
||||
Signed-off-by: Michal Dziekonski <michal.dziekonski+github@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 29 ++++++++++
|
||||
1 file changed, 29 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 8628a9e3dfca..17b13d3193cc 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -877,6 +877,11 @@ cpu_target: trip-point@1 {
|
||||
type = "passive";
|
||||
hysteresis = <0>;
|
||||
};
|
||||
+ cpu_temp_critical: trip-point@2 {
|
||||
+ temperature = <110000>;
|
||||
+ type = "critical";
|
||||
+ hysteresis = <0>;
|
||||
+ };
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
@@ -895,18 +900,42 @@ gpu-thermal {
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&ths 0>;
|
||||
sustainable-power = <1100>;
|
||||
+
|
||||
+ trips {
|
||||
+ gpu_temp_critical: trip-point@0 {
|
||||
+ temperature = <110000>;
|
||||
+ type = "critical";
|
||||
+ hysteresis = <0>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
ve-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&ths 1>;
|
||||
+
|
||||
+ trips {
|
||||
+ ve_temp_critical: trip-point@0 {
|
||||
+ temperature = <110000>;
|
||||
+ type = "critical";
|
||||
+ hysteresis = <0>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
ddr-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&ths 3>;
|
||||
+
|
||||
+ trips {
|
||||
+ ddr_temp_critical: trip-point@0 {
|
||||
+ temperature = <110000>;
|
||||
+ type = "critical";
|
||||
+ hysteresis = <0>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
};
|
||||
};
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,39 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: AGM1968 <AGM1968@users.noreply.github.com>
|
||||
Date: Wed, 31 May 2023 08:12:00 +0000
|
||||
Subject: LED-green_power_on-red_status_heartbeat
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
|
||||
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 7 ++++---
|
||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
index 0666d16ba7d0..19451a0c85ae 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
@@ -26,16 +26,17 @@ leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
- function = LED_FUNCTION_POWER;
|
||||
+ function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
|
||||
- default-state = "on";
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
- function = LED_FUNCTION_STATUS;
|
||||
+ function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
|
||||
+ default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,38 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Fri, 15 Oct 2021 21:07:46 +0200
|
||||
Subject: arm64:dts: allwinner: sun50i-h616 Add GPU node
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 14 ++++++++++
|
||||
1 file changed, 14 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 44f8ae11ca16..26ef79c5d895 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -108,6 +108,20 @@ soc {
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x0 0x40000000>;
|
||||
|
||||
+ gpu: gpu@1800000 {
|
||||
+ compatible = "allwinner,sun50i-h616-mali",
|
||||
+ "arm,mali-bifrost";
|
||||
+ reg = <0x1800000 0x40000>;
|
||||
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "job", "mmu", "gpu";
|
||||
+ clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>;
|
||||
+ clock-names = "core", "bus";
|
||||
+ resets = <&ccu RST_BUS_GPU>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
syscon: syscon@3000000 {
|
||||
compatible = "allwinner,sun50i-h616-system-control";
|
||||
reg = <0x03000000 0x1000>;
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,55 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Fri, 15 Oct 2021 21:14:55 +0200
|
||||
Subject: arm64:dts:allwinner: sun50i-h616 Add VPU node
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 24 ++++++++++
|
||||
1 file changed, 24 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 26ef79c5d895..944ff2747d27 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -122,6 +122,17 @@ gpu: gpu@1800000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ video-codec@1c0e000 {
|
||||
+ compatible = "allwinner,sun50i-h616-video-engine";
|
||||
+ reg = <0x01c0e000 0x2000>;
|
||||
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
|
||||
+ <&ccu CLK_MBUS_VE>;
|
||||
+ clock-names = "ahb", "mod", "ram";
|
||||
+ resets = <&ccu RST_BUS_VE>;
|
||||
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ allwinner,sram = <&ve_sram 1>;
|
||||
+ };
|
||||
+
|
||||
syscon: syscon@3000000 {
|
||||
compatible = "allwinner,sun50i-h616-system-control";
|
||||
reg = <0x03000000 0x1000>;
|
||||
@@ -136,6 +147,19 @@ sram_c: sram@28000 {
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x00028000 0x30000>;
|
||||
};
|
||||
+
|
||||
+ sram_c1: sram@1a00000 {
|
||||
+ compatible = "mmio-sram";
|
||||
+ reg = <0x01a00000 0x200000>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ ranges = <0 0x01a00000 0x200000>;
|
||||
+
|
||||
+ ve_sram: sram-section@0 {
|
||||
+ compatible = "allwinner,sun50i-h616-sram-c1";
|
||||
+ reg = <0x000000 0x200000>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
ccu: clock@3001000 {
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,39 +0,0 @@
|
||||
From a3e54a502cf754b148a8ad06580a3c256bc42b09 Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Yavitz <pyavitz@xxxxx.com>
|
||||
Date: Thu, 22 Feb 2024 19:31:11 -0500
|
||||
Subject: [PATCH] arch: arm64: dts: allwinner: sun50i-h616: PG 12c pins
|
||||
|
||||
pins = "PG17", "PG18";
|
||||
pins = "PG15", "PG16";
|
||||
|
||||
Signed-off-by: Patrick Yavitz <pyavitz@xxxxx.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 12 ++++++++++++
|
||||
1 file changed, 12 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 17df57e2db0a..e5ce4214a43b 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -334,6 +334,18 @@ i2c4_ph_pins: i2c4-ph-pins {
|
||||
function = "i2c4";
|
||||
};
|
||||
|
||||
+ /omit-if-no-ref/
|
||||
+ i2c3_pg_pins: i2c3-pg-pins {
|
||||
+ pins = "PG17", "PG18";
|
||||
+ function = "i2c3";
|
||||
+ };
|
||||
+
|
||||
+ /omit-if-no-ref/
|
||||
+ i2c4_pg_pins: i2c4-pg-pins {
|
||||
+ pins = "PG15", "PG16";
|
||||
+ function = "i2c4";
|
||||
+ };
|
||||
+
|
||||
ir_rx_pin: ir-rx-pin {
|
||||
pins = "PH10";
|
||||
function = "ir_rx";
|
||||
--
|
||||
2.39.2
|
||||
|
@ -1,30 +0,0 @@
|
||||
From 64b0221e526f6359a39ab3beb9a693dc964b1112 Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Yavitz <pyavitz@xxxxx.com>
|
||||
Date: Wed, 6 Mar 2024 06:51:01 -0500
|
||||
Subject: [PATCH] arch: arm64: dts: allwinner: sun50i-h616: spi1 cs1 pin
|
||||
|
||||
Signed-off-by: Patrick Yavitz <pyavitz@xxxxx.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 33f8c758b9e6..1354dca01e78 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -397,6 +397,12 @@ spi1_cs0_pin: spi1-cs0-pin {
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
+ /omit-if-no-ref/
|
||||
+ spi1_cs1_pin: spi1-cs1-pin {
|
||||
+ pins = "PH9";
|
||||
+ function = "spi1";
|
||||
+ };
|
||||
+
|
||||
uart0_ph_pins: uart0-ph-pins {
|
||||
pins = "PH0", "PH1";
|
||||
function = "uart0";
|
||||
--
|
||||
2.39.2
|
||||
|
@ -1,69 +0,0 @@
|
||||
From 8e36084386d07a07f755bda978875b1354162019 Mon Sep 17 00:00:00 2001
|
||||
From: Gunjan Gupta <viraniac@gmail.com>
|
||||
Date: Wed, 13 Dec 2023 19:15:45 +0000
|
||||
Subject: [PATCH] arm64: dts: h616: add wifi support for orange pi zero 2 and
|
||||
zero3
|
||||
|
||||
---
|
||||
.../allwinner/sun50i-h616-orangepi-zero.dtsi | 38 +++++++++++++++++++
|
||||
1 file changed, 38 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
index 19451a0c85ae..400966667d1e 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
@@ -59,6 +59,34 @@ reg_usb1_vbus: regulator-usb1-vbus {
|
||||
gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+ reg_vcc33_wifi: vcc33-wifi {
|
||||
+ /* Always on 3.3V regulator for WiFi and BT */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc33-wifi";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <®_vcc5v>;
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc_wifi_io: vcc-wifi-io {
|
||||
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-wifi-io";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <®_vcc33_wifi>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_pwrseq: wifi-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rtc 1>;
|
||||
+ clock-names = "osc32k-out";
|
||||
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
|
||||
+ post-power-on-delay-ms = <200>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
@@ -90,6 +118,16 @@ &mmc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&mmc1 {
|
||||
+ vmmc-supply = <®_vcc33_wifi>;
|
||||
+ vqmmc-supply = <®_vcc_wifi_io>;
|
||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+ bus-width = <4>;
|
||||
+ non-removable;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,53 +0,0 @@
|
||||
From 8cdd9309fce75995cf3068be5c7ffb65cec51cff Mon Sep 17 00:00:00 2001
|
||||
From: Gunjan Gupta <viraniac@gmail.com>
|
||||
Date: Wed, 3 Jan 2024 09:53:55 +0000
|
||||
Subject: [PATCH] arm64: dts: sun50i-h616: Add dma node
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 16 ++++++++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
index 2424a2827455..e71b79ebced8 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
|
||||
@@ -170,6 +170,18 @@ mixer0_out_tcon_top_mixer0: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
+ dma: dma-controller@3002000 {
|
||||
+ compatible = "allwinner,sun50i-h6-dma";
|
||||
+ reg = <0x03002000 0x1000>;
|
||||
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
|
||||
+ clock-names = "bus", "mbus";
|
||||
+ dma-channels = <16>;
|
||||
+ dma-requests = <49>;
|
||||
+ resets = <&ccu RST_BUS_DMA>;
|
||||
+ #dma-cells = <1>;
|
||||
+ };
|
||||
+
|
||||
gpu: gpu@1800000 {
|
||||
compatible = "allwinner,sun50i-h616-mali",
|
||||
"arm,mali-bifrost";
|
||||
@@ -606,6 +618,8 @@ spi0: spi@5010000 {
|
||||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
|
||||
clock-names = "ahb", "mod";
|
||||
+ dmas = <&dma 22>, <&dma 22>;
|
||||
+ dma-names = "rx", "tx";
|
||||
resets = <&ccu RST_BUS_SPI0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
@@ -621,6 +635,8 @@ spi1: spi@5011000 {
|
||||
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
|
||||
clock-names = "ahb", "mod";
|
||||
+ dmas = <&dma 23>, <&dma 23>;
|
||||
+ dma-names = "rx", "tx";
|
||||
resets = <&ccu RST_BUS_SPI1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,29 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Fri, 15 Oct 2021 21:09:42 +0200
|
||||
Subject: arm64:dts: sun50i-h616-orangepi-zero2 Enable GPU mali
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
index d83852e72f06..8d8009c7f9a3 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
|
||||
@@ -16,6 +16,11 @@ &emac0 {
|
||||
phy-supply = <®_dcdce>;
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdcc>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
vmmc-supply = <®_dcdce>;
|
||||
};
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,24 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: The-going <48602507+The-going@users.noreply.github.com>
|
||||
Date: Wed, 14 Dec 2022 20:15:41 +0300
|
||||
Subject: arm64: dts: sun50i-h616-orangepi-zero2: reg_usb1_vbus status ok
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
index 15290e6892fc..0666d16ba7d0 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
|
||||
@@ -56,6 +56,7 @@ reg_usb1_vbus: regulator-usb1-vbus {
|
||||
vin-supply = <®_vcc5v>;
|
||||
enable-active-high;
|
||||
gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
|
||||
+ status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,41 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Kali Prasad <kprasadvnsi@protonmail.com>
|
||||
Date: Sun, 19 Sep 2021 08:02:27 +0000
|
||||
Subject: drv:nvmem:sunxi_sid: Support SID on H616
|
||||
|
||||
Add support for H616's SID controller. It supports 4K-bit
|
||||
EFUSE.
|
||||
|
||||
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
|
||||
---
|
||||
drivers/nvmem/sunxi_sid.c | 7 +++++++
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
|
||||
index 5d364d85347f..c526fe4abe22 100644
|
||||
--- a/drivers/nvmem/sunxi_sid.c
|
||||
+++ b/drivers/nvmem/sunxi_sid.c
|
||||
@@ -204,6 +204,12 @@ static const struct sunxi_sid_cfg sun50i_h6_cfg = {
|
||||
.size = 0x200,
|
||||
};
|
||||
|
||||
+static const struct sunxi_sid_cfg sun50i_h616_cfg = {
|
||||
+ .value_offset = 0x200,
|
||||
+ .size = 0x100,
|
||||
+ .need_register_readout = true,
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id sunxi_sid_of_match[] = {
|
||||
{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
|
||||
{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
|
||||
@@ -213,6 +219,7 @@ static const struct of_device_id sunxi_sid_of_match[] = {
|
||||
{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
|
||||
{ .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
|
||||
{ .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },
|
||||
+ { .compatible = "allwinner,sun50i-h616-sid", .data = &sun50i_h616_cfg },
|
||||
{/* sentinel */},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,45 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andre Przywara <andre.przywara@arm.com>
|
||||
Date: Wed, 21 Apr 2021 12:46:43 +0100
|
||||
Subject: drv:rtc: sun6i: Add Allwinner H616 support
|
||||
|
||||
The H616 RTC changes its day storage to the newly introduced linear day
|
||||
scheme, so pair the new compatible string with this feature flag.
|
||||
The clock part is missing an external 32768 Hz oscillator input pin,
|
||||
for future expansion we must thus ignore any provided clock for now.
|
||||
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
---
|
||||
drivers/rtc/rtc-sun6i.c | 16 ++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
|
||||
index 190ea007d82e..e0b85a0d5645 100644
|
||||
--- a/drivers/rtc/rtc-sun6i.c
|
||||
+++ b/drivers/rtc/rtc-sun6i.c
|
||||
@@ -389,6 +389,22 @@ static void __init sun50i_h6_rtc_clk_init(struct device_node *node)
|
||||
CLK_OF_DECLARE_DRIVER(sun50i_h6_rtc_clk, "allwinner,sun50i-h6-rtc",
|
||||
sun50i_h6_rtc_clk_init);
|
||||
|
||||
+static const struct sun6i_rtc_clk_data sun50i_h616_rtc_data = {
|
||||
+ .rc_osc_rate = 16000000,
|
||||
+ .fixed_prescaler = 32,
|
||||
+ .has_prescaler = 1,
|
||||
+ .has_out_clk = 1,
|
||||
+ .no_ext_losc = 1,
|
||||
+};
|
||||
+
|
||||
+static void __init sun50i_h616_rtc_clk_init(struct device_node *node)
|
||||
+{
|
||||
+ sun6i_rtc_clk_init(node, &sun50i_h616_rtc_data);
|
||||
+}
|
||||
+
|
||||
+CLK_OF_DECLARE_DRIVER(sun50i_h616_rtc_clk, "allwinner,sun50i-h616-rtc",
|
||||
+ sun50i_h616_rtc_clk_init);
|
||||
+
|
||||
/*
|
||||
* The R40 user manual is self-conflicting on whether the prescaler is
|
||||
* fixed or configurable. The clock diagram shows it as fixed, but there
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,68 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andre Przywara <andre.przywara@arm.com>
|
||||
Date: Mon, 14 Jun 2021 23:02:45 +0100
|
||||
Subject: drv:rtc:sun6i: support RTCs without external LOSCs
|
||||
|
||||
Some newer Allwinner RTCs (for instance the one in the H616 SoC) lack
|
||||
a pin for an external 32768 Hz oscillator. As a consequence, this LOSC
|
||||
can't be selected as the RTC clock source, and we must rely on the
|
||||
internal RC oscillator.
|
||||
To allow additions of clocks to the RTC node, add a feature bit to ignore
|
||||
any provided clocks for now (the current code would think this is the
|
||||
external LOSC). Later DTs and code can then for instance add the PLL
|
||||
based clock input, and older kernel won't get confused.
|
||||
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/rtc/rtc-sun6i.c | 16 +++++++---
|
||||
1 file changed, 11 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
|
||||
index 02129ea346c1..190ea007d82e 100644
|
||||
--- a/drivers/rtc/rtc-sun6i.c
|
||||
+++ b/drivers/rtc/rtc-sun6i.c
|
||||
@@ -137,6 +137,7 @@ struct sun6i_rtc_clk_data {
|
||||
unsigned int has_out_clk : 1;
|
||||
unsigned int has_losc_en : 1;
|
||||
unsigned int has_auto_swt : 1;
|
||||
+ unsigned int no_ext_losc : 1;
|
||||
};
|
||||
|
||||
#define RTC_LINEAR_DAY BIT(0)
|
||||
@@ -260,7 +261,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
|
||||
}
|
||||
|
||||
/* Switch to the external, more precise, oscillator, if present */
|
||||
- if (of_property_present(node, "clocks")) {
|
||||
+ if (!rtc->data->no_ext_losc && of_get_property(node, "clocks", NULL)) {
|
||||
reg |= SUN6I_LOSC_CTRL_EXT_OSC;
|
||||
if (rtc->data->has_losc_en)
|
||||
reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN;
|
||||
@@ -284,14 +285,19 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
|
||||
}
|
||||
|
||||
parents[0] = clk_hw_get_name(rtc->int_osc);
|
||||
- /* If there is no external oscillator, this will be NULL and ... */
|
||||
- parents[1] = of_clk_get_parent_name(node, 0);
|
||||
+ if (rtc->data->no_ext_losc) {
|
||||
+ parents[1] = NULL;
|
||||
+ init.num_parents = 1;
|
||||
+ } else {
|
||||
+ /* If there is no external oscillator, this will be NULL and */
|
||||
+ parents[1] = of_clk_get_parent_name(node, 0);
|
||||
+ /* ... number of clock parents will be 1. */
|
||||
+ init.num_parents = of_clk_get_parent_count(node) + 1;
|
||||
+ }
|
||||
|
||||
rtc->hw.init = &init;
|
||||
|
||||
init.parent_names = parents;
|
||||
- /* ... number of clock parents will be 1. */
|
||||
- init.num_parents = of_clk_get_parent_count(node) + 1;
|
||||
of_property_read_string_index(node, "clock-output-names", 0,
|
||||
&init.name);
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,41 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sat, 16 Oct 2021 21:26:41 +0200
|
||||
Subject: drv:soc: sunxi: sram: Add SRAM C1 H616 handling
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/soc/sunxi/sunxi_sram.c | 10 ++++++++++
|
||||
1 file changed, 10 insertions(+)
|
||||
|
||||
diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
|
||||
index 4458b2e0562b..9e65d8dfe355 100644
|
||||
--- a/drivers/soc/sunxi/sunxi_sram.c
|
||||
+++ b/drivers/soc/sunxi/sunxi_sram.c
|
||||
@@ -70,6 +70,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
|
||||
SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
|
||||
};
|
||||
|
||||
+static struct sunxi_sram_desc sun50i_h616_sram_c1 = {
|
||||
+ .data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
|
||||
+ SUNXI_SRAM_MAP(0x7fffffff, 0, "cpu"),
|
||||
+ SUNXI_SRAM_MAP(0, 1, "ve")),
|
||||
+};
|
||||
+
|
||||
static struct sunxi_sram_desc sun4i_a10_sram_d = {
|
||||
.data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
|
||||
SUNXI_SRAM_MAP(0, 0, "cpu"),
|
||||
@@ -99,6 +105,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = {
|
||||
.compatible = "allwinner,sun50i-a64-sram-c",
|
||||
.data = &sun50i_a64_sram_c.data,
|
||||
},
|
||||
+ {
|
||||
+ .compatible = "allwinner,sun50i-h616-sram-c1",
|
||||
+ .data = &sun50i_h616_sram_c1.data,
|
||||
+ },
|
||||
{}
|
||||
};
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,44 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Fri, 15 Oct 2021 21:49:45 +0200
|
||||
Subject: drv:staging:media:sunxi:cedrus: add H616 variant
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/sunxi/cedrus/cedrus.c | 13 ++++++++++
|
||||
1 file changed, 13 insertions(+)
|
||||
|
||||
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
index a0f9f4a5b03a..160bd376eb58 100644
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
@@ -651,6 +651,15 @@ static const struct cedrus_variant sun50i_h6_cedrus_variant = {
|
||||
.mod_rate = 600000000,
|
||||
};
|
||||
|
||||
+static const struct cedrus_variant sun50i_h616_cedrus_variant = {
|
||||
+ .capabilities = CEDRUS_CAPABILITY_UNTILED |
|
||||
+ CEDRUS_CAPABILITY_MPEG2_DEC |
|
||||
+ CEDRUS_CAPABILITY_H264_DEC |
|
||||
+ CEDRUS_CAPABILITY_H265_DEC |
|
||||
+ CEDRUS_CAPABILITY_VP8_DEC,
|
||||
+ .mod_rate = 600000000,
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id cedrus_dt_match[] = {
|
||||
{
|
||||
.compatible = "allwinner,sun4i-a10-video-engine",
|
||||
@@ -696,6 +705,10 @@ static const struct of_device_id cedrus_dt_match[] = {
|
||||
.compatible = "allwinner,sun50i-h6-video-engine",
|
||||
.data = &sun50i_h6_cedrus_variant,
|
||||
},
|
||||
+ {
|
||||
+ .compatible = "allwinner,sun50i-h616-video-engine",
|
||||
+ .data = &sun50i_h6_cedrus_variant,
|
||||
+ },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, cedrus_dt_match);
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,24 +0,0 @@
|
||||
# Common patches for h616 and h618
|
||||
# Ported from armbian
|
||||
# https://github.com/armbian/build/tree/main/patch/kernel/archive/sunxi-6.6/patches.armbian
|
||||
# Armabian includes a hack hdmi output not included here: drivers-hack-for-h616-hdmi-video-output.patch
|
||||
|
||||
patch add-nodes-for-sunxi-info-addr-dump-reg.patch
|
||||
patch arm64-dts-allwinner-h616-Add-device-node-for-SID.patch
|
||||
patch arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch
|
||||
patch arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
|
||||
patch arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
|
||||
patch arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch
|
||||
patch arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch
|
||||
patch arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch
|
||||
patch arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
|
||||
patch arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch
|
||||
|
||||
patch arm64-dts-sun50i-h616-Add-dma-node.patch
|
||||
patch drv-nvmem-sunxi_sid-Support-SID-on-H616.patch
|
||||
patch drv-rtc-sun6i-Add-Allwinner-H616-support.patch
|
||||
patch drv-rtc-sun6i-support-RTCs-without-external-LOSCs.patch
|
||||
patch drv-soc-sunxi-sram-Add-SRAM-C1-H616-handling.patch
|
||||
patch drv-staging-media-sunxi-cedrus-add-H616-variant.patch
|
||||
patch nvmem-sunxi_sid-add-sunxi_get_soc_chipid-sunxi_get_serial.patch
|
||||
|
@ -1,58 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: The-going <48602507+The-going@users.noreply.github.com>
|
||||
Date: Sat, 16 Apr 2022 11:19:05 +0300
|
||||
Subject: nvmem: sunxi_sid: add sunxi_get_soc_chipid, sunxi_get_serial
|
||||
|
||||
---
|
||||
drivers/nvmem/sunxi_sid.c | 28 ++++++++++
|
||||
1 file changed, 28 insertions(+)
|
||||
|
||||
diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
|
||||
index c526fe4abe22..e522bd1e5edd 100644
|
||||
--- a/drivers/nvmem/sunxi_sid.c
|
||||
+++ b/drivers/nvmem/sunxi_sid.c
|
||||
@@ -36,6 +36,25 @@ struct sunxi_sid {
|
||||
u32 value_offset;
|
||||
};
|
||||
|
||||
+static unsigned int sunxi_soc_chipid[4];
|
||||
+static unsigned int sunxi_serial[4];
|
||||
+
|
||||
+int sunxi_get_soc_chipid(unsigned char *chipid)
|
||||
+{
|
||||
+ memcpy(chipid, sunxi_soc_chipid, 16);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+EXPORT_SYMBOL(sunxi_get_soc_chipid);
|
||||
+
|
||||
+int sunxi_get_serial(unsigned char *serial)
|
||||
+{
|
||||
+ memcpy(serial, sunxi_serial, 16);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+EXPORT_SYMBOL(sunxi_get_serial);
|
||||
+
|
||||
static int sunxi_sid_read(void *context, unsigned int offset,
|
||||
void *val, size_t bytes)
|
||||
{
|
||||
@@ -177,6 +196,15 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
||||
|
||||
platform_set_drvdata(pdev, nvmem);
|
||||
|
||||
+ nvmem_cfg->reg_read(sid, 0, &sunxi_soc_chipid[0], sizeof(int));
|
||||
+ nvmem_cfg->reg_read(sid, 4, &sunxi_soc_chipid[1], sizeof(int));
|
||||
+ nvmem_cfg->reg_read(sid, 8, &sunxi_soc_chipid[2], sizeof(int));
|
||||
+ nvmem_cfg->reg_read(sid, 12, &sunxi_soc_chipid[3], sizeof(int));
|
||||
+
|
||||
+ sunxi_serial[0] = sunxi_soc_chipid[3];
|
||||
+ sunxi_serial[1] = sunxi_soc_chipid[2];
|
||||
+ sunxi_serial[2] = (sunxi_soc_chipid[1] >> 16) & 0x0ffff;
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,7 +0,0 @@
|
||||
# Kmeta for OPI Zero 2
|
||||
include h61x-common-6_6.scc
|
||||
|
||||
patch arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch
|
||||
patch arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch
|
||||
patch arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch
|
||||
|
@ -1,142 +0,0 @@
|
||||
From 91b69779e0875e58d8973b2938a1cc4b7a1c455b Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 25 Mar 2018 22:17:06 +0200
|
||||
Subject: [PATCH 22/44] ASoC: hdmi-codec: fix channel allocation
|
||||
|
||||
---
|
||||
sound/soc/codecs/hdmi-codec.c | 113 ++++++++++++++++------------------
|
||||
1 file changed, 52 insertions(+), 61 deletions(-)
|
||||
|
||||
--- a/sound/soc/codecs/hdmi-codec.c
|
||||
+++ b/sound/soc/codecs/hdmi-codec.c
|
||||
@@ -194,78 +194,69 @@ static const struct snd_pcm_chmap_elem h
|
||||
*/
|
||||
static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
|
||||
{ .ca_id = 0x00, .n_ch = 2,
|
||||
- .mask = FL | FR},
|
||||
- /* 2.1 */
|
||||
- { .ca_id = 0x01, .n_ch = 4,
|
||||
- .mask = FL | FR | LFE},
|
||||
- /* Dolby Surround */
|
||||
+ .mask = FL | FR },
|
||||
+ { .ca_id = 0x03, .n_ch = 4,
|
||||
+ .mask = FL | FR | LFE | FC },
|
||||
{ .ca_id = 0x02, .n_ch = 4,
|
||||
.mask = FL | FR | FC },
|
||||
- /* surround51 */
|
||||
+ { .ca_id = 0x01, .n_ch = 4,
|
||||
+ .mask = FL | FR | LFE },
|
||||
{ .ca_id = 0x0b, .n_ch = 6,
|
||||
- .mask = FL | FR | LFE | FC | RL | RR},
|
||||
- /* surround40 */
|
||||
- { .ca_id = 0x08, .n_ch = 6,
|
||||
- .mask = FL | FR | RL | RR },
|
||||
- /* surround41 */
|
||||
- { .ca_id = 0x09, .n_ch = 6,
|
||||
- .mask = FL | FR | LFE | RL | RR },
|
||||
- /* surround50 */
|
||||
+ .mask = FL | FR | LFE | FC | RL | RR },
|
||||
{ .ca_id = 0x0a, .n_ch = 6,
|
||||
.mask = FL | FR | FC | RL | RR },
|
||||
- /* 6.1 */
|
||||
- { .ca_id = 0x0f, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | FC | RL | RR | RC },
|
||||
- /* surround71 */
|
||||
+ { .ca_id = 0x09, .n_ch = 6,
|
||||
+ .mask = FL | FR | LFE | RL | RR },
|
||||
+ { .ca_id = 0x08, .n_ch = 6,
|
||||
+ .mask = FL | FR | RL | RR },
|
||||
+ { .ca_id = 0x07, .n_ch = 6,
|
||||
+ .mask = FL | FR | LFE | FC | RC },
|
||||
+ { .ca_id = 0x06, .n_ch = 6,
|
||||
+ .mask = FL | FR | FC | RC },
|
||||
+ { .ca_id = 0x05, .n_ch = 6,
|
||||
+ .mask = FL | FR | LFE | RC },
|
||||
+ { .ca_id = 0x04, .n_ch = 6,
|
||||
+ .mask = FL | FR | RC },
|
||||
{ .ca_id = 0x13, .n_ch = 8,
|
||||
.mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
|
||||
- /* others */
|
||||
- { .ca_id = 0x03, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | FC },
|
||||
- { .ca_id = 0x04, .n_ch = 8,
|
||||
- .mask = FL | FR | RC},
|
||||
- { .ca_id = 0x05, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | RC },
|
||||
- { .ca_id = 0x06, .n_ch = 8,
|
||||
- .mask = FL | FR | FC | RC },
|
||||
- { .ca_id = 0x07, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | FC | RC },
|
||||
- { .ca_id = 0x0c, .n_ch = 8,
|
||||
- .mask = FL | FR | RC | RL | RR },
|
||||
- { .ca_id = 0x0d, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | RL | RR | RC },
|
||||
- { .ca_id = 0x0e, .n_ch = 8,
|
||||
- .mask = FL | FR | FC | RL | RR | RC },
|
||||
- { .ca_id = 0x10, .n_ch = 8,
|
||||
- .mask = FL | FR | RL | RR | RLC | RRC },
|
||||
- { .ca_id = 0x11, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | RL | RR | RLC | RRC },
|
||||
+ { .ca_id = 0x1f, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
|
||||
{ .ca_id = 0x12, .n_ch = 8,
|
||||
.mask = FL | FR | FC | RL | RR | RLC | RRC },
|
||||
- { .ca_id = 0x14, .n_ch = 8,
|
||||
- .mask = FL | FR | FLC | FRC },
|
||||
- { .ca_id = 0x15, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | FLC | FRC },
|
||||
- { .ca_id = 0x16, .n_ch = 8,
|
||||
- .mask = FL | FR | FC | FLC | FRC },
|
||||
- { .ca_id = 0x17, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | FC | FLC | FRC },
|
||||
- { .ca_id = 0x18, .n_ch = 8,
|
||||
- .mask = FL | FR | RC | FLC | FRC },
|
||||
- { .ca_id = 0x19, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | RC | FLC | FRC },
|
||||
- { .ca_id = 0x1a, .n_ch = 8,
|
||||
- .mask = FL | FR | RC | FC | FLC | FRC },
|
||||
- { .ca_id = 0x1b, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | RC | FC | FLC | FRC },
|
||||
- { .ca_id = 0x1c, .n_ch = 8,
|
||||
- .mask = FL | FR | RL | RR | FLC | FRC },
|
||||
- { .ca_id = 0x1d, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | RL | RR | FLC | FRC },
|
||||
{ .ca_id = 0x1e, .n_ch = 8,
|
||||
.mask = FL | FR | FC | RL | RR | FLC | FRC },
|
||||
- { .ca_id = 0x1f, .n_ch = 8,
|
||||
- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
|
||||
+ { .ca_id = 0x11, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | RL | RR | RLC | RRC },
|
||||
+ { .ca_id = 0x1d, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | RL | RR | FLC | FRC },
|
||||
+ { .ca_id = 0x10, .n_ch = 8,
|
||||
+ .mask = FL | FR | RL | RR | RLC | RRC },
|
||||
+ { .ca_id = 0x1c, .n_ch = 8,
|
||||
+ .mask = FL | FR | RL | RR | FLC | FRC },
|
||||
+ { .ca_id = 0x0f, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | FC | RL | RR | RC },
|
||||
+ { .ca_id = 0x1b, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | RC | FC | FLC | FRC },
|
||||
+ { .ca_id = 0x0e, .n_ch = 8,
|
||||
+ .mask = FL | FR | FC | RL | RR | RC },
|
||||
+ { .ca_id = 0x1a, .n_ch = 8,
|
||||
+ .mask = FL | FR | RC | FC | FLC | FRC },
|
||||
+ { .ca_id = 0x0d, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | RL | RR | RC },
|
||||
+ { .ca_id = 0x19, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | RC | FLC | FRC },
|
||||
+ { .ca_id = 0x0c, .n_ch = 8,
|
||||
+ .mask = FL | FR | RC | RL | RR },
|
||||
+ { .ca_id = 0x18, .n_ch = 8,
|
||||
+ .mask = FL | FR | RC | FLC | FRC },
|
||||
+ { .ca_id = 0x17, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | FC | FLC | FRC },
|
||||
+ { .ca_id = 0x16, .n_ch = 8,
|
||||
+ .mask = FL | FR | FC | FLC | FRC },
|
||||
+ { .ca_id = 0x15, .n_ch = 8,
|
||||
+ .mask = FL | FR | LFE | FLC | FRC },
|
||||
+ { .ca_id = 0x14, .n_ch = 8,
|
||||
+ .mask = FL | FR | FLC | FRC },
|
||||
};
|
||||
|
||||
struct hdmi_codec_priv {
|
@ -1,53 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 16 Jan 2021 10:58:14 +0100
|
||||
Subject: [PATCH] HACK: h6: Add HDMI sound card
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 +++++++++++++++++++-
|
||||
1 file changed, 19 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -108,6 +108,24 @@
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
+ sound_hdmi: sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,name = "allwinner-hdmi";
|
||||
+ simple-audio-card,mclk-fs = <128>;
|
||||
+ simple-audio-card,frame-inversion;
|
||||
+
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&hdmi>;
|
||||
+ };
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s1>;
|
||||
+ dai-tdm-slot-num = <2>;
|
||||
+ dai-tdm-slot-width = <32>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@@ -664,7 +682,6 @@
|
||||
dmas = <&dma 4>, <&dma 4>;
|
||||
resets = <&ccu RST_BUS_I2S1>;
|
||||
dma-names = "rx", "tx";
|
||||
- status = "disabled";
|
||||
};
|
||||
|
||||
spdif: spdif@5093000 {
|
||||
@@ -801,6 +818,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@6000000 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun50i-h6-dw-hdmi";
|
||||
reg = <0x06000000 0x10000>;
|
||||
reg-io-width = <1>;
|
@ -1,52 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sat, 2 Jan 2021 15:52:27 -0600
|
||||
Subject: [PATCH] Input: axp20x-pek - allow wakeup after shutdown
|
||||
|
||||
While the AXP20x PMIC handles the power button itself after shutting
|
||||
down, it is not always possible to use the PMIC's built-in shutdown
|
||||
feature, such as when other wakeup sources are needed (for example, an
|
||||
IR remote or wake-on-LAN) that require firmware support. In that case,
|
||||
the PMIC remains on, but suspended, until the board is powered back on.
|
||||
|
||||
During this "fake" off state, IRQ configuration is similar to system
|
||||
sleep, where enable_irq_wake() must be call on an IRQ for it to be
|
||||
wakeup capable. Run the suspend callback to arm the power button IRQs
|
||||
during the shutdown process, so the power button works in this state.
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
drivers/input/misc/axp20x-pek.c | 8 +++++++-
|
||||
1 file changed, 7 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/input/misc/axp20x-pek.c
|
||||
+++ b/drivers/input/misc/axp20x-pek.c
|
||||
@@ -354,7 +354,7 @@ static int axp20x_pek_probe(struct platf
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static int __maybe_unused axp20x_pek_suspend(struct device *dev)
|
||||
+static int axp20x_pek_suspend(struct device *dev)
|
||||
{
|
||||
struct axp20x_pek *axp20x_pek = dev_get_drvdata(dev);
|
||||
|
||||
@@ -413,6 +413,11 @@ static const struct dev_pm_ops axp20x_pe
|
||||
#endif
|
||||
};
|
||||
|
||||
+static void axp20x_pek_shutdown(struct platform_device *pdev)
|
||||
+{
|
||||
+ axp20x_pek_suspend(&pdev->dev);
|
||||
+}
|
||||
+
|
||||
static const struct platform_device_id axp_pek_id_match[] = {
|
||||
{
|
||||
.name = "axp20x-pek",
|
||||
@@ -428,6 +433,7 @@ MODULE_DEVICE_TABLE(platform, axp_pek_id
|
||||
|
||||
static struct platform_driver axp20x_pek_driver = {
|
||||
.probe = axp20x_pek_probe,
|
||||
+ .shutdown = axp20x_pek_shutdown,
|
||||
.id_table = axp_pek_id_match,
|
||||
.driver = {
|
||||
.name = "axp20x-pek",
|
@ -1,36 +0,0 @@
|
||||
From dbf607d6716dd0a314d734cfd9423601d6c5a99d Mon Sep 17 00:00:00 2001
|
||||
From: OpenEmbedded <oe.patch@oe>
|
||||
Date: Wed, 6 Dec 2023 18:01:24 +0100
|
||||
Subject: [PATCH] Input: axp20x-pek - allow wakeup after shutdown
|
||||
|
||||
---
|
||||
drivers/input/misc/axp20x-pek.c | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/drivers/input/misc/axp20x-pek.c b/drivers/input/misc/axp20x-pek.c
|
||||
index 4581606a2..7217dc6ed 100644
|
||||
--- a/drivers/input/misc/axp20x-pek.c
|
||||
+++ b/drivers/input/misc/axp20x-pek.c
|
||||
@@ -393,6 +393,11 @@ static const struct dev_pm_ops axp20x_pek_pm_ops = {
|
||||
.resume_noirq = pm_sleep_ptr(axp20x_pek_resume_noirq),
|
||||
};
|
||||
|
||||
+static void axp20x_pek_shutdown(struct platform_device *pdev)
|
||||
+{
|
||||
+ axp20x_pek_suspend(&pdev->dev);
|
||||
+}
|
||||
+
|
||||
static const struct platform_device_id axp_pek_id_match[] = {
|
||||
{
|
||||
.name = "axp20x-pek",
|
||||
@@ -408,6 +413,7 @@ MODULE_DEVICE_TABLE(platform, axp_pek_id_match);
|
||||
|
||||
static struct platform_driver axp20x_pek_driver = {
|
||||
.probe = axp20x_pek_probe,
|
||||
+ .shutdown = axp20x_pek_shutdown,
|
||||
.id_table = axp_pek_id_match,
|
||||
.driver = {
|
||||
.name = "axp20x-pek",
|
||||
--
|
||||
2.43.0
|
||||
|
@ -1,393 +0,0 @@
|
||||
From 20d3d43d9daa82d5fa1e937e17b975974572d189 Mon Sep 17 00:00:00 2001
|
||||
From: Juliano Dorigão <jdorigao@gmail.com>
|
||||
Date: Fri, 3 Mar 2023 16:12:03 -0400
|
||||
Subject: [PATCH] OrangePi 3 LTS support
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/Makefile | 1 +
|
||||
.../allwinner/sun50i-h6-orangepi-3-lts.dts | 361 ++++++++++++++++++
|
||||
2 files changed, 362 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
|
||||
index 6a96494a2..ace8159a6 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/Makefile
|
||||
+++ b/arch/arm64/boot/dts/allwinner/Makefile
|
||||
@@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
|
||||
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3-lts.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
|
||||
new file mode 100644
|
||||
index 000000000..67f38b8a1
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
|
||||
@@ -0,0 +1,361 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+// Copyright (C) 2023 Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
+// Based on sun50i-h6-orangepi-3.dts, which is:
|
||||
+// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "sun50i-h6.dtsi"
|
||||
+#include "sun50i-h6-cpu-opp.dtsi"
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ model = "OrangePi 3 LTS";
|
||||
+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
|
||||
+
|
||||
+ aliases {
|
||||
+ ethernet0 = &emac;
|
||||
+ serial0 = &uart0;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_con_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_out_con>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ext_osc32k: ext_osc32k_clk {
|
||||
+ #clock-cells = <0>;
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "ext_osc32k";
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led-0 {
|
||||
+ label = "orangepi:red:power";
|
||||
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
|
||||
+ };
|
||||
+
|
||||
+ led-1 {
|
||||
+ label = "orangepi:green:status";
|
||||
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
|
||||
+ default-state = "on";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc5v: vcc5v {
|
||||
+ /* board wide 5V supply directly from the DC jack */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-5v";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_gmac_3v3: gmac-3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "gmac-3v3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ startup-delay-us = <150000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc33_wifi: vcc33-wifi {
|
||||
+ /* Always on 3.3V regulator for WiFi and BT */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc33-wifi";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ enable-active-high;
|
||||
+ gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
|
||||
+ };
|
||||
+
|
||||
+ reg_vcc_wifi_io: vcc-wifi-io {
|
||||
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc-wifi-io";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ vin-supply = <®_vcc33_wifi>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_pwrseq: wifi-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rtc 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
|
||||
+ post-power-on-delay-ms = <200>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <®_dcdca>;
|
||||
+};
|
||||
+
|
||||
+&de {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dwc3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ehci0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ehci3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&ext_rgmii_pins>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ phy-supply = <®_gmac_3v3>;
|
||||
+ allwinner,rx-delay-ps = <1500>;
|
||||
+ allwinner,tx-delay-ps = <700>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <®_dcdcc>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ hvcc-supply = <®_bldo2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+
|
||||
+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
|
||||
+ reset-assert-us = <15000>;
|
||||
+ reset-deassert-us = <40000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ vmmc-supply = <®_cldo1>;
|
||||
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
|
||||
+ bus-width = <4>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc1 {
|
||||
+ vmmc-supply = <®_vcc33_wifi>;
|
||||
+ vqmmc-supply = <®_vcc_wifi_io>;
|
||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||
+ bus-width = <4>;
|
||||
+ non-removable;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mmc2 {
|
||||
+ vmmc-supply = <®_cldo1>;
|
||||
+ vqmmc-supply = <®_bldo2>;
|
||||
+ cap-mmc-hw-reset;
|
||||
+ non-removable;
|
||||
+ bus-width = <8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ohci3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pio {
|
||||
+ vcc-pc-supply = <®_bldo2>;
|
||||
+ vcc-pd-supply = <®_cldo1>;
|
||||
+ vcc-pg-supply = <®_bldo3>;
|
||||
+};
|
||||
+
|
||||
+&r_ir {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&r_rsb {
|
||||
+ clock-frequency = <100000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ axp805: pmic@745 {
|
||||
+ compatible = "x-powers,axp805", "x-powers,axp806";
|
||||
+ reg = <0x745>;
|
||||
+ interrupt-parent = <&r_intc>;
|
||||
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-controller;
|
||||
+ #interrupt-cells = <1>;
|
||||
+ x-powers,self-working-mode;
|
||||
+ vina-supply = <®_vcc5v>;
|
||||
+ vinb-supply = <®_vcc5v>;
|
||||
+ vinc-supply = <®_vcc5v>;
|
||||
+ vind-supply = <®_vcc5v>;
|
||||
+ vine-supply = <®_vcc5v>;
|
||||
+ aldoin-supply = <®_vcc5v>;
|
||||
+ bldoin-supply = <®_vcc5v>;
|
||||
+ cldoin-supply = <®_vcc5v>;
|
||||
+
|
||||
+ regulators {
|
||||
+ reg_aldo1: aldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc-pl-led-ir";
|
||||
+ };
|
||||
+
|
||||
+ reg_aldo2: aldo2 {
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc33-audio-tv-ephy-mac";
|
||||
+ };
|
||||
+
|
||||
+ /* ALDO3 is shorted to CLDO1 */
|
||||
+ reg_aldo3: aldo3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo1: bldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc18-dram-bias-pll";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo2: bldo2 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-efuse-pcie-hdmi-pc";
|
||||
+ };
|
||||
+
|
||||
+ reg_bldo3: bldo3 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc-pm-pg-dcxoio-wifi";
|
||||
+ };
|
||||
+
|
||||
+ bldo4 {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+
|
||||
+ reg_cldo1: cldo1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
|
||||
+ };
|
||||
+
|
||||
+ cldo2 {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+
|
||||
+ cldo3 {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdca: dcdca {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1160000>;
|
||||
+ regulator-ramp-delay = <2500>;
|
||||
+ regulator-name = "vdd-cpu";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdcc: dcdcc {
|
||||
+ regulator-enable-ramp-delay = <32000>;
|
||||
+ regulator-min-microvolt = <810000>;
|
||||
+ regulator-max-microvolt = <1080000>;
|
||||
+ regulator-ramp-delay = <2500>;
|
||||
+ regulator-name = "vdd-gpu";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdcd: dcdcd {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <980000>;
|
||||
+ regulator-max-microvolt = <980000>;
|
||||
+ regulator-name = "vdd-sys";
|
||||
+ };
|
||||
+
|
||||
+ reg_dcdce: dcdce {
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-name = "vcc-dram";
|
||||
+ };
|
||||
+
|
||||
+ sw {
|
||||
+ /* unused */
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&r_ir {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&rtc {
|
||||
+ clocks = <&ext_osc32k>;
|
||||
+};
|
||||
+
|
||||
+/delete-node/ &spi0;
|
||||
+
|
||||
+&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_ph_pins>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2otg {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy {
|
||||
+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
|
||||
+ usb0_vbus-supply = <®_vcc5v>;
|
||||
+ usb3_vbus-supply = <®_vcc5v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb3phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.39.2
|
||||
|
@ -1,49 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Mon, 30 Dec 2019 12:39:31 -0600
|
||||
Subject: [PATCH] Revert "clk: qcom: Support 'protected-clocks' property"
|
||||
|
||||
Now that protected-clocks is handled in the clk core, this
|
||||
driver-specific implementation is redundant.
|
||||
|
||||
This reverts commit b181b3b801da8893c8eb706e448dd5111b02de60.
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
drivers/clk/qcom/common.c | 18 ------------------
|
||||
1 file changed, 18 deletions(-)
|
||||
|
||||
--- a/drivers/clk/qcom/common.c
|
||||
+++ b/drivers/clk/qcom/common.c
|
||||
@@ -194,22 +194,6 @@ int qcom_cc_register_sleep_clk(struct de
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
|
||||
|
||||
-/* Drop 'protected-clocks' from the list of clocks to register */
|
||||
-static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc)
|
||||
-{
|
||||
- struct device_node *np = dev->of_node;
|
||||
- struct property *prop;
|
||||
- const __be32 *p;
|
||||
- u32 i;
|
||||
-
|
||||
- of_property_for_each_u32(np, "protected-clocks", prop, p, i) {
|
||||
- if (i >= cc->num_rclks)
|
||||
- continue;
|
||||
-
|
||||
- cc->rclks[i] = NULL;
|
||||
- }
|
||||
-}
|
||||
-
|
||||
static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
|
||||
void *data)
|
||||
{
|
||||
@@ -272,8 +256,6 @@ int qcom_cc_really_probe(struct platform
|
||||
cc->rclks = rclks;
|
||||
cc->num_rclks = num_clks;
|
||||
|
||||
- qcom_cc_drop_protected(dev, cc);
|
||||
-
|
||||
for (i = 0; i < num_clk_hws; i++) {
|
||||
ret = devm_clk_hw_register(dev, clk_hws[i]);
|
||||
if (ret)
|
@ -1,67 +0,0 @@
|
||||
From ba3b30a80ac2c388d48c58fbee242466d51fbfd8 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sun, 6 Dec 2020 11:15:34 -0600
|
||||
Subject: [PATCH 177/389] arm64: dts: allwinner: Enforce consistent MMC
|
||||
numbering
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 ++++++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 6 ++++++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 6 ++++++
|
||||
3 files changed, 18 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
index 77b5349f6087..9e0e17179839 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
@@ -18,6 +18,12 @@ / {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
+ aliases {
|
||||
+ mmc0 = &mmc0;
|
||||
+ mmc1 = &mmc1;
|
||||
+ mmc2 = &mmc2;
|
||||
+ };
|
||||
+
|
||||
chosen {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
|
||||
index a56fae761a1f..2159fa336d75 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
|
||||
@@ -6,6 +6,12 @@
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
+ aliases {
|
||||
+ mmc0 = &mmc0;
|
||||
+ mmc1 = &mmc1;
|
||||
+ mmc2 = &mmc2;
|
||||
+ };
|
||||
+
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
index ca1d287a0a01..3feac99556f3 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -17,6 +17,12 @@ / {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
+ aliases {
|
||||
+ mmc0 = &mmc0;
|
||||
+ mmc1 = &mmc1;
|
||||
+ mmc2 = &mmc2;
|
||||
+ };
|
||||
+
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
--
|
||||
2.35.3
|
||||
|
@ -1,110 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Fri, 16 Aug 2019 16:40:20 +0200
|
||||
Subject: [PATCH] arm64: dts: allwinner: h6: Add AC200 EPHY related nodes
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++++
|
||||
1 file changed, 56 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -16,6 +16,16 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
+ ac200_pwm_clk: ac200_clk {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <24000000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwm1_pin>;
|
||||
+ pwms = <&pwm 1 42 0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@@ -319,6 +329,10 @@
|
||||
cpu_speed_grade: cpu-speed-grade@1c {
|
||||
reg = <0x1c 0x4>;
|
||||
};
|
||||
+
|
||||
+ ephy_calib: ephy_calib@2c {
|
||||
+ reg = <0x2c 0x2>;
|
||||
+ };
|
||||
};
|
||||
|
||||
timer@3009000 {
|
||||
@@ -373,6 +387,13 @@
|
||||
drive-strength = <40>;
|
||||
};
|
||||
|
||||
+ ext_rmii_pins: rmii_pins {
|
||||
+ pins = "PA0", "PA1", "PA2", "PA3", "PA4",
|
||||
+ "PA5", "PA6", "PA7", "PA8", "PA9";
|
||||
+ function = "emac";
|
||||
+ drive-strength = <40>;
|
||||
+ };
|
||||
+
|
||||
hdmi_pins: hdmi-pins {
|
||||
pins = "PH8", "PH9", "PH10";
|
||||
function = "hdmi";
|
||||
@@ -393,6 +414,11 @@
|
||||
function = "i2c2";
|
||||
};
|
||||
|
||||
+ i2c3_pins: i2c3-pins {
|
||||
+ pins = "PB17", "PB18";
|
||||
+ function = "i2c3";
|
||||
+ };
|
||||
+
|
||||
mmc0_pins: mmc0-pins {
|
||||
pins = "PF0", "PF1", "PF2", "PF3",
|
||||
"PF4", "PF5";
|
||||
@@ -419,6 +445,11 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
+ pwm1_pin: pwm1-pin {
|
||||
+ pins = "PB19";
|
||||
+ function = "pwm1";
|
||||
+ };
|
||||
+
|
||||
/omit-if-no-ref/
|
||||
spi0_pins: spi0-pins {
|
||||
pins = "PC0", "PC2", "PC3";
|
||||
@@ -652,6 +683,31 @@
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
+ i2c3: i2c@5002c00 {
|
||||
+ compatible = "allwinner,sun6i-a31-i2c";
|
||||
+ reg = <0x05002c00 0x400>;
|
||||
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_I2C3>;
|
||||
+ resets = <&ccu RST_BUS_I2C3>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c3_pins>;
|
||||
+ status = "disabled";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ ac200: mfd@10 {
|
||||
+ compatible = "x-powers,ac200";
|
||||
+ reg = <0x10>;
|
||||
+ clocks = <&ac200_pwm_clk>;
|
||||
+
|
||||
+ ac200_ephy: phy {
|
||||
+ compatible = "x-powers,ac200-ephy";
|
||||
+ nvmem-cells = <&ephy_calib>;
|
||||
+ nvmem-cell-names = "ephy_calib";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
emac: ethernet@5020000 {
|
||||
compatible = "allwinner,sun50i-h6-emac",
|
||||
"allwinner,sun50i-a64-emac";
|
@ -1,46 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sat, 14 Dec 2019 20:54:40 -0600
|
||||
Subject: [PATCH] arm64: dts: allwinner: h6: Add SCPI protocol
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 ++++++++++++++++++++
|
||||
1 file changed, 20 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -88,6 +88,13 @@
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
+ scpi_protocol: scpi {
|
||||
+ compatible = "arm,scpi";
|
||||
+ mboxes = <&msgbox 2>, <&msgbox 3>;
|
||||
+ mbox-names = "tx", "rx";
|
||||
+ shmem = <&scpi_sram>;
|
||||
+ };
|
||||
+
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
arm,no-tick-in-suspend;
|
||||
@@ -196,6 +203,19 @@
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
+ sram_a2: sram@100000 {
|
||||
+ compatible = "mmio-sram";
|
||||
+ reg = <0x00100000 0x18000>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ ranges = <0 0x00100000 0x18000>;
|
||||
+
|
||||
+ scpi_sram: scpi-sram@17c00 {
|
||||
+ compatible = "arm,scp-shmem";
|
||||
+ reg = <0x17c00 0x200>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
sram_c: sram@28000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00028000 0x1e000>;
|
@ -1,26 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Wed, 12 Oct 2022 23:01:04 +0200
|
||||
Subject: [PATCH] arm64: dts: allwinner: h6: Fix Cedrus IOMMU, again
|
||||
|
||||
Cedrus actually uses two IOMMU channels. Add the second one.
|
||||
|
||||
Fixes: 62a8ccf3a248 ("arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage")
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
index e897559d9a89..436cc2a02d1a 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -172,7 +172,7 @@ video-codec@1c0e000 {
|
||||
resets = <&ccu RST_BUS_VE>;
|
||||
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
allwinner,sram = <&ve_sram 1>;
|
||||
- iommus = <&iommu 3>;
|
||||
+ iommus = <&iommu 1>, <&iommu 3>;
|
||||
};
|
||||
|
||||
gpu: gpu@1800000 {
|
@ -1,31 +0,0 @@
|
||||
From c009b3b707bbde30fa6ff49ca3075160524ea7b9 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Tue, 26 May 2020 20:08:27 +0200
|
||||
Subject: [PATCH 41/44] arm64: dts: h6 deinterlace
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++++++++++
|
||||
1 file changed, 11 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -160,6 +160,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ deinterlace: deinterlace@1420000 {
|
||||
+ compatible = "allwinner,sun50i-h6-deinterlace";
|
||||
+ reg = <0x01420000 0x2000>;
|
||||
+ clocks = <&ccu CLK_BUS_DEINTERLACE>,
|
||||
+ <&ccu CLK_DEINTERLACE>,
|
||||
+ <&ccu CLK_MBUS_DEINTERLACE>;
|
||||
+ clock-names = "bus", "mod", "ram";
|
||||
+ resets = <&ccu RST_BUS_DEINTERLACE>;
|
||||
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ iommus = <&iommu 2>;
|
||||
+ };
|
||||
+
|
||||
video-codec@1c0e000 {
|
||||
compatible = "allwinner,sun50i-h6-video-engine";
|
||||
reg = <0x01c0e000 0x2000>;
|
@ -1,197 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sun, 29 Dec 2019 20:23:28 -0600
|
||||
Subject: [PATCH] clk: Implement protected-clocks for all OF clock providers
|
||||
|
||||
This is a generic implementation of the "protected-clocks" property from
|
||||
the common clock binding. It allows firmware to inform the OS about
|
||||
clocks that must not be disabled while the OS is running.
|
||||
|
||||
This implementation comes with some caveats:
|
||||
|
||||
1) Clocks that have CLK_IS_CRITICAL in their init data are prepared/
|
||||
enabled before they are attached to the clock tree. protected-clocks are
|
||||
only protected once the clock provider is added, which is generally
|
||||
after all of the clocks it provides have been registered. This leaves a
|
||||
window of opportunity where something could disable or modify the clock,
|
||||
such as a driver running on another CPU, or the clock core itself. There
|
||||
is a comment to this effect in __clk_core_init():
|
||||
|
||||
/*
|
||||
* Enable CLK_IS_CRITICAL clocks so newly added critical clocks
|
||||
* don't get accidentally disabled when walking the orphan tree and
|
||||
* reparenting clocks
|
||||
*/
|
||||
|
||||
Similarly, these clocks will be enabled after they are first reparented,
|
||||
unlike other CLK_IS_CRITICAL clocks. See the comment in
|
||||
clk_core_reparent_orphans_nolock():
|
||||
|
||||
/*
|
||||
* We need to use __clk_set_parent_before() and _after() to
|
||||
* to properly migrate any prepare/enable count of the orphan
|
||||
* clock. This is important for CLK_IS_CRITICAL clocks, which
|
||||
* are enabled during init but might not have a parent yet.
|
||||
*/
|
||||
|
||||
Ideally we could detect protected clocks before they are reparented, but
|
||||
there are two problems with that:
|
||||
|
||||
a) From the clock core's perspective, hw->init is const.
|
||||
|
||||
b) The clock core doesn't see the device_node until __clk_register is
|
||||
called on the first clock.
|
||||
|
||||
So the only "race-free" way to detect protected-clocks is to do it in
|
||||
the middle of __clk_register, between when core->flags is initialized
|
||||
and calling __clk_core_init(). That requires scanning the device tree
|
||||
again for each clock, which is part of why I didn't do it that way.
|
||||
|
||||
2) __clk_protect needs to be idempotent, for two reasons:
|
||||
|
||||
a) Clocks with CLK_IS_CRITICAL in their init data are already
|
||||
prepared/enabled, and we don't want to prepare/enable them again.
|
||||
|
||||
b) of_clk_set_defaults() is called twice for (at least some) clock
|
||||
controllers registered with CLK_OF_DECLARE. It is called first in
|
||||
of_clk_add_provider()/of_clk_add_hw_provider() inside clk_init_cb,
|
||||
and again afterward in of_clk_init(). The second call in
|
||||
of_clk_init() may be unnecessary, but verifying that would require
|
||||
auditing all users of CLK_OF_DECLARE to ensure they called one of
|
||||
the of_clk_add{,_hw}_provider functions.
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
drivers/clk/clk-conf.c | 54 ++++++++++++++++++++++++++++++++++++++++++
|
||||
drivers/clk/clk.c | 31 ++++++++++++++++++++++++
|
||||
drivers/clk/clk.h | 2 ++
|
||||
3 files changed, 87 insertions(+)
|
||||
|
||||
--- a/drivers/clk/clk-conf.c
|
||||
+++ b/drivers/clk/clk-conf.c
|
||||
@@ -11,6 +11,54 @@
|
||||
#include <linux/of.h>
|
||||
#include <linux/printk.h>
|
||||
|
||||
+#include "clk.h"
|
||||
+
|
||||
+static int __set_clk_flags(struct device_node *node)
|
||||
+{
|
||||
+ struct of_phandle_args clkspec;
|
||||
+ struct property *prop;
|
||||
+ int i, index = 0, rc;
|
||||
+ const __be32 *cur;
|
||||
+ struct clk *clk;
|
||||
+ u32 nr_cells;
|
||||
+
|
||||
+ rc = of_property_read_u32(node, "#clock-cells", &nr_cells);
|
||||
+ if (rc < 0) {
|
||||
+ pr_err("clk: missing #clock-cells property on %pOF\n", node);
|
||||
+ return rc;
|
||||
+ }
|
||||
+
|
||||
+ clkspec.np = node;
|
||||
+ clkspec.args_count = nr_cells;
|
||||
+
|
||||
+ of_property_for_each_u32(node, "protected-clocks", prop, cur, clkspec.args[0]) {
|
||||
+ /* read the remainder of the clock specifier */
|
||||
+ for (i = 1; i < nr_cells; ++i) {
|
||||
+ cur = of_prop_next_u32(prop, cur, &clkspec.args[i]);
|
||||
+ if (!cur) {
|
||||
+ pr_err("clk: invalid value of protected-clocks"
|
||||
+ " property at %pOF\n", node);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+ }
|
||||
+ clk = of_clk_get_from_provider(&clkspec);
|
||||
+ if (IS_ERR(clk)) {
|
||||
+ if (PTR_ERR(clk) != -EPROBE_DEFER)
|
||||
+ pr_err("clk: couldn't get protected clock"
|
||||
+ " %u for %pOF\n", index, node);
|
||||
+ return PTR_ERR(clk);
|
||||
+ }
|
||||
+
|
||||
+ rc = __clk_protect(clk);
|
||||
+ if (rc < 0)
|
||||
+ pr_warn("clk: failed to protect %s: %d\n",
|
||||
+ __clk_get_name(clk), rc);
|
||||
+ clk_put(clk);
|
||||
+ index++;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int __set_clk_parents(struct device_node *node, bool clk_supplier)
|
||||
{
|
||||
struct of_phandle_args clkspec;
|
||||
@@ -135,6 +183,12 @@ int of_clk_set_defaults(struct device_no
|
||||
if (!node)
|
||||
return 0;
|
||||
|
||||
+ if (clk_supplier) {
|
||||
+ rc = __set_clk_flags(node);
|
||||
+ if (rc < 0)
|
||||
+ return rc;
|
||||
+ }
|
||||
+
|
||||
rc = __set_clk_parents(node, clk_supplier);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
--- a/drivers/clk/clk.c
|
||||
+++ b/drivers/clk/clk.c
|
||||
@@ -4271,6 +4271,37 @@ struct clk *devm_clk_hw_get_clk(struct d
|
||||
EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk);
|
||||
|
||||
/*
|
||||
+ * clk-conf helpers
|
||||
+ */
|
||||
+
|
||||
+int __clk_protect(struct clk *clk)
|
||||
+{
|
||||
+ struct clk_core *core = clk->core;
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ clk_prepare_lock();
|
||||
+
|
||||
+ /*
|
||||
+ * If CLK_IS_CRITICAL was set in the clock's init data, then
|
||||
+ * the clock was already prepared/enabled when it was added.
|
||||
+ */
|
||||
+ if (core->flags & CLK_IS_CRITICAL)
|
||||
+ goto out;
|
||||
+
|
||||
+ core->flags |= CLK_IS_CRITICAL;
|
||||
+ ret = clk_core_prepare(core);
|
||||
+ if (ret)
|
||||
+ goto out;
|
||||
+
|
||||
+ ret = clk_core_enable_lock(core);
|
||||
+
|
||||
+out:
|
||||
+ clk_prepare_unlock();
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
* clkdev helpers
|
||||
*/
|
||||
|
||||
--- a/drivers/clk/clk.h
|
||||
+++ b/drivers/clk/clk.h
|
||||
@@ -24,6 +24,7 @@ struct clk_hw *clk_find_hw(const char *d
|
||||
#ifdef CONFIG_COMMON_CLK
|
||||
struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
|
||||
const char *dev_id, const char *con_id);
|
||||
+int __clk_protect(struct clk *clk);
|
||||
void __clk_put(struct clk *clk);
|
||||
#else
|
||||
/* All these casts to avoid ifdefs in clkdev... */
|
||||
@@ -33,6 +34,7 @@ clk_hw_create_clk(struct device *dev, st
|
||||
{
|
||||
return (struct clk *)hw;
|
||||
}
|
||||
+static inline int __clk_protect(struct clk *clk) { return 0; }
|
||||
static inline void __clk_put(struct clk *clk) { }
|
||||
|
||||
#endif
|
@ -1,122 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Tue, 5 Mar 2019 22:02:41 -0600
|
||||
Subject: [PATCH] firmware: arm_scpi: Support unidirectional mailbox channels
|
||||
|
||||
Some mailbox controllers have only unidirectional channels, so we need a
|
||||
pair of them for each SCPI channel. If a mbox-names property is present,
|
||||
look for "rx" and "tx" mbox channels; otherwise, the existing behavior
|
||||
is preserved, and a single mbox channel is used for each SCPI channel.
|
||||
|
||||
Note that since the mailbox framework only supports a single phandle
|
||||
with each name (mbox_request_channel_byname always returns the first
|
||||
one), this new mode only supports a single SCPI channel.
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
drivers/firmware/arm_scpi.c | 58 +++++++++++++++++++++++++++++--------
|
||||
1 file changed, 46 insertions(+), 12 deletions(-)
|
||||
|
||||
--- a/drivers/firmware/arm_scpi.c
|
||||
+++ b/drivers/firmware/arm_scpi.c
|
||||
@@ -231,7 +231,8 @@ struct scpi_xfer {
|
||||
|
||||
struct scpi_chan {
|
||||
struct mbox_client cl;
|
||||
- struct mbox_chan *chan;
|
||||
+ struct mbox_chan *rx_chan;
|
||||
+ struct mbox_chan *tx_chan;
|
||||
void __iomem *tx_payload;
|
||||
void __iomem *rx_payload;
|
||||
struct list_head rx_pending;
|
||||
@@ -505,7 +506,7 @@ static int scpi_send_message(u8 idx, voi
|
||||
msg->rx_len = rx_len;
|
||||
reinit_completion(&msg->done);
|
||||
|
||||
- ret = mbox_send_message(scpi_chan->chan, msg);
|
||||
+ ret = mbox_send_message(scpi_chan->tx_chan, msg);
|
||||
if (ret < 0 || !rx_buf)
|
||||
goto out;
|
||||
|
||||
@@ -856,8 +857,13 @@ static void scpi_free_channels(void *dat
|
||||
struct scpi_drvinfo *info = data;
|
||||
int i;
|
||||
|
||||
- for (i = 0; i < info->num_chans; i++)
|
||||
- mbox_free_channel(info->channels[i].chan);
|
||||
+ for (i = 0; i < info->num_chans; i++) {
|
||||
+ struct scpi_chan *pchan = &info->channels[i];
|
||||
+
|
||||
+ if (pchan->tx_chan != pchan->rx_chan)
|
||||
+ mbox_free_channel(pchan->tx_chan);
|
||||
+ mbox_free_channel(pchan->rx_chan);
|
||||
+ }
|
||||
}
|
||||
|
||||
static int scpi_remove(struct platform_device *pdev)
|
||||
@@ -913,6 +919,7 @@ static int scpi_probe(struct platform_de
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
struct scpi_drvinfo *scpi_drvinfo;
|
||||
+ bool use_mbox_names = false;
|
||||
|
||||
scpi_drvinfo = devm_kzalloc(dev, sizeof(*scpi_drvinfo), GFP_KERNEL);
|
||||
if (!scpi_drvinfo)
|
||||
@@ -926,6 +933,14 @@ static int scpi_probe(struct platform_de
|
||||
dev_err(dev, "no mboxes property in '%pOF'\n", np);
|
||||
return -ENODEV;
|
||||
}
|
||||
+ if (of_get_property(dev->of_node, "mbox-names", NULL)) {
|
||||
+ use_mbox_names = true;
|
||||
+ if (count != 2) {
|
||||
+ dev_err(dev, "need exactly 2 mboxes with mbox-names\n");
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
+ count /= 2;
|
||||
+ }
|
||||
|
||||
scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan),
|
||||
GFP_KERNEL);
|
||||
@@ -974,15 +989,34 @@ static int scpi_probe(struct platform_de
|
||||
mutex_init(&pchan->xfers_lock);
|
||||
|
||||
ret = scpi_alloc_xfer_list(dev, pchan);
|
||||
- if (!ret) {
|
||||
- pchan->chan = mbox_request_channel(cl, idx);
|
||||
- if (!IS_ERR(pchan->chan))
|
||||
- continue;
|
||||
- ret = PTR_ERR(pchan->chan);
|
||||
- if (ret != -EPROBE_DEFER)
|
||||
- dev_err(dev, "failed to get channel%d err %d\n",
|
||||
- idx, ret);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ if (use_mbox_names) {
|
||||
+ pchan->rx_chan = mbox_request_channel_byname(cl, "rx");
|
||||
+ if (IS_ERR(pchan->rx_chan)) {
|
||||
+ ret = PTR_ERR(pchan->rx_chan);
|
||||
+ goto fail;
|
||||
+ }
|
||||
+ pchan->tx_chan = mbox_request_channel_byname(cl, "tx");
|
||||
+ if (IS_ERR(pchan->rx_chan)) {
|
||||
+ ret = PTR_ERR(pchan->tx_chan);
|
||||
+ goto fail;
|
||||
+ }
|
||||
+ } else {
|
||||
+ pchan->rx_chan = mbox_request_channel(cl, idx);
|
||||
+ if (IS_ERR(pchan->rx_chan)) {
|
||||
+ ret = PTR_ERR(pchan->rx_chan);
|
||||
+ goto fail;
|
||||
+ }
|
||||
+ pchan->tx_chan = pchan->rx_chan;
|
||||
}
|
||||
+ continue;
|
||||
+
|
||||
+fail:
|
||||
+ if (ret != -EPROBE_DEFER)
|
||||
+ dev_err(dev, "failed to get channel%d err %d\n",
|
||||
+ idx, ret);
|
||||
return ret;
|
||||
}
|
||||
|
@ -1,29 +0,0 @@
|
||||
From 791849a059cce08f238491b8cae1c3d452edcda5 Mon Sep 17 00:00:00 2001
|
||||
From: OpenEmbedded <oe.patch@oe>
|
||||
Date: Wed, 6 Dec 2023 00:37:25 +0100
|
||||
Subject: [PATCH 1/2] fix orange pi 3lts rtc on faulty boards"
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
|
||||
index 67f38b8a1..e3337c6f2 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
|
||||
@@ -331,10 +331,10 @@ &pwm {
|
||||
&r_ir {
|
||||
status = "okay";
|
||||
};
|
||||
-
|
||||
+/*
|
||||
&rtc {
|
||||
clocks = <&ext_osc32k>;
|
||||
-};
|
||||
+};*/
|
||||
|
||||
/delete-node/ &spi0;
|
||||
|
||||
--
|
||||
2.43.0
|
||||
|
@ -1,3 +0,0 @@
|
||||
# Optional patch for 3 lts that deactivates external 32Khz crystals and fallback to internal clock
|
||||
# This fix rtc problems at the cost of clock accuracy on faulty boards
|
||||
patch fix-orange-pi-3lts-rtc-on-faulty-boards.patch
|
@ -1,107 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Fri, 14 Oct 2022 20:15:43 +0200
|
||||
Subject: [PATCH] iommu/sun50i: Allow page sizes multiple of 4096
|
||||
|
||||
While peripheral supports only 4K page sizes, we can easily emulate
|
||||
support for bigger page sizes, up to 1M. This is done by making multiple
|
||||
entries in map function or clearing multiple entries in unmap.
|
||||
|
||||
This considerably lowers overhead.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/iommu/sun50i-iommu.c | 44 +++++++++++++++++++++---------------
|
||||
1 file changed, 26 insertions(+), 18 deletions(-)
|
||||
|
||||
diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c
|
||||
index d7c5e9b1a087..9944266c4f58 100644
|
||||
--- a/drivers/iommu/sun50i-iommu.c
|
||||
+++ b/drivers/iommu/sun50i-iommu.c
|
||||
@@ -593,10 +593,12 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
|
||||
{
|
||||
struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
|
||||
struct sun50i_iommu *iommu = sun50i_domain->iommu;
|
||||
- u32 pte_index;
|
||||
+ u32 pte_index, pages, i;
|
||||
u32 *page_table, *pte_addr;
|
||||
int ret = 0;
|
||||
|
||||
+ pages = size / SPAGE_SIZE;
|
||||
+
|
||||
page_table = sun50i_dte_get_page_table(sun50i_domain, iova, gfp);
|
||||
if (IS_ERR(page_table)) {
|
||||
ret = PTR_ERR(page_table);
|
||||
@@ -604,18 +606,21 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
|
||||
}
|
||||
|
||||
pte_index = sun50i_iova_get_pte_index(iova);
|
||||
- pte_addr = &page_table[pte_index];
|
||||
- if (unlikely(sun50i_pte_is_page_valid(*pte_addr))) {
|
||||
- phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
|
||||
- dev_err(iommu->dev,
|
||||
- "iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
|
||||
- &iova, &page_phys, &paddr, prot);
|
||||
- ret = -EBUSY;
|
||||
- goto out;
|
||||
+ for (i = 0; i < pages; i++) {
|
||||
+ pte_addr = &page_table[pte_index + i];
|
||||
+ if (unlikely(sun50i_pte_is_page_valid(*pte_addr))) {
|
||||
+ phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
|
||||
+ dev_err(iommu->dev,
|
||||
+ "iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
|
||||
+ &iova, &page_phys, &paddr, prot);
|
||||
+ ret = -EBUSY;
|
||||
+ goto out;
|
||||
+ }
|
||||
+ *pte_addr = sun50i_mk_pte(paddr, prot);
|
||||
+ paddr += SPAGE_SIZE;
|
||||
}
|
||||
|
||||
- *pte_addr = sun50i_mk_pte(paddr, prot);
|
||||
- sun50i_table_flush(sun50i_domain, pte_addr, 1);
|
||||
+ sun50i_table_flush(sun50i_domain, &page_table[pte_index], pages);
|
||||
|
||||
out:
|
||||
return ret;
|
||||
@@ -626,8 +631,10 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova
|
||||
{
|
||||
struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
|
||||
phys_addr_t pt_phys;
|
||||
+ u32 dte, pages, i;
|
||||
u32 *pte_addr;
|
||||
- u32 dte;
|
||||
+
|
||||
+ pages = size / SPAGE_SIZE;
|
||||
|
||||
dte = sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
|
||||
if (!sun50i_dte_is_pt_valid(dte))
|
||||
@@ -636,13 +643,14 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova
|
||||
pt_phys = sun50i_dte_get_pt_address(dte);
|
||||
pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
|
||||
|
||||
- if (!sun50i_pte_is_page_valid(*pte_addr))
|
||||
- return 0;
|
||||
+ for (i = 0; i < pages; i++)
|
||||
+ if (!sun50i_pte_is_page_valid(pte_addr[i]))
|
||||
+ return 0;
|
||||
|
||||
- memset(pte_addr, 0, sizeof(*pte_addr));
|
||||
- sun50i_table_flush(sun50i_domain, pte_addr, 1);
|
||||
+ memset(pte_addr, 0, sizeof(*pte_addr) * pages);
|
||||
+ sun50i_table_flush(sun50i_domain, pte_addr, pages);
|
||||
|
||||
- return SZ_4K;
|
||||
+ return size;
|
||||
}
|
||||
|
||||
static phys_addr_t sun50i_iommu_iova_to_phys(struct iommu_domain *domain,
|
||||
@@ -828,7 +836,7 @@ static int sun50i_iommu_of_xlate(struct device *dev,
|
||||
}
|
||||
|
||||
static const struct iommu_ops sun50i_iommu_ops = {
|
||||
- .pgsize_bitmap = SZ_4K,
|
||||
+ .pgsize_bitmap = 0x1ff000,
|
||||
.device_group = sun50i_iommu_device_group,
|
||||
.domain_alloc = sun50i_iommu_domain_alloc,
|
||||
.of_xlate = sun50i_iommu_of_xlate,
|
@ -1,406 +0,0 @@
|
||||
From 59adceb6f34521c0f1a229f20ee9961269daa539 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Fri, 16 Aug 2019 16:38:21 +0200
|
||||
Subject: [PATCH 38/44] mfd: Add support for AC200
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
drivers/mfd/Kconfig | 9 ++
|
||||
drivers/mfd/Makefile | 1 +
|
||||
drivers/mfd/ac200.c | 150 +++++++++++++++++++++++++++
|
||||
include/linux/mfd/ac200.h | 209 ++++++++++++++++++++++++++++++++++++++
|
||||
4 files changed, 369 insertions(+)
|
||||
create mode 100644 drivers/mfd/ac200.c
|
||||
create mode 100644 include/linux/mfd/ac200.h
|
||||
|
||||
--- a/drivers/mfd/Kconfig
|
||||
+++ b/drivers/mfd/Kconfig
|
||||
@@ -178,6 +178,15 @@ config MFD_AC100
|
||||
This driver include only the core APIs. You have to select individual
|
||||
components like codecs or RTC under the corresponding menus.
|
||||
|
||||
+config MFD_AC200
|
||||
+ tristate "X-Powers AC200"
|
||||
+ select MFD_CORE
|
||||
+ depends on I2C
|
||||
+ help
|
||||
+ If you say Y here you get support for the X-Powers AC200 IC.
|
||||
+ This driver include only the core APIs. You have to select individual
|
||||
+ components like Ethernet PHY or RTC under the corresponding menus.
|
||||
+
|
||||
config MFD_AXP20X
|
||||
tristate
|
||||
select MFD_CORE
|
||||
--- a/drivers/mfd/Makefile
|
||||
+++ b/drivers/mfd/Makefile
|
||||
@@ -142,6 +142,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-s
|
||||
obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
|
||||
|
||||
obj-$(CONFIG_MFD_AC100) += ac100.o
|
||||
+obj-$(CONFIG_MFD_AC200) += ac200.o
|
||||
obj-$(CONFIG_MFD_AXP20X) += axp20x.o
|
||||
obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
|
||||
obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/mfd/ac200.c
|
||||
@@ -0,0 +1,148 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * MFD core driver for X-Powers' AC200 IC
|
||||
+ *
|
||||
+ * The AC200 is a chip which is co-packaged with Allwinner H6 SoC and
|
||||
+ * includes analog audio codec, analog TV encoder, ethernet PHY, eFuse
|
||||
+ * and RTC.
|
||||
+ *
|
||||
+ * Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
+ *
|
||||
+ * Based on AC100 driver with following copyrights:
|
||||
+ * Copyright (2016) Chen-Yu Tsai
|
||||
+ */
|
||||
+
|
||||
+#include <linux/i2c.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/mfd/core.h>
|
||||
+#include <linux/mfd/ac200.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+
|
||||
+static const struct regmap_range_cfg ac200_range_cfg[] = {
|
||||
+ {
|
||||
+ .range_min = AC200_SYS_VERSION,
|
||||
+ .range_max = AC200_IC_CHARA1,
|
||||
+ .selector_reg = AC200_TWI_REG_ADDR_H,
|
||||
+ .selector_mask = 0xff,
|
||||
+ .selector_shift = 0,
|
||||
+ .window_start = 0,
|
||||
+ .window_len = 256,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static const struct regmap_config ac200_regmap_config = {
|
||||
+ .reg_bits = 8,
|
||||
+ .val_bits = 16,
|
||||
+ .ranges = ac200_range_cfg,
|
||||
+ .num_ranges = ARRAY_SIZE(ac200_range_cfg),
|
||||
+ .max_register = AC200_IC_CHARA1,
|
||||
+};
|
||||
+
|
||||
+static struct mfd_cell ac200_cells[] = {
|
||||
+ {
|
||||
+ .name = "ac200-codec",
|
||||
+ .of_compatible = "x-powers,ac200-codec",
|
||||
+ }, {
|
||||
+ .name = "ac200-efuse",
|
||||
+ .of_compatible = "x-powers,ac200-efuse",
|
||||
+ }, {
|
||||
+ .name = "ac200-ephy",
|
||||
+ .of_compatible = "x-powers,ac200-ephy",
|
||||
+ }, {
|
||||
+ .name = "ac200-rtc",
|
||||
+ .of_compatible = "x-powers,ac200-rtc",
|
||||
+ }, {
|
||||
+ .name = "ac200-tve",
|
||||
+ .of_compatible = "x-powers,ac200-tve",
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int ac200_i2c_probe(struct i2c_client *i2c,
|
||||
+ const struct i2c_device_id *id)
|
||||
+{
|
||||
+ struct device *dev = &i2c->dev;
|
||||
+ struct ac200_dev *ac200;
|
||||
+ int ret;
|
||||
+
|
||||
+ ac200 = devm_kzalloc(dev, sizeof(*ac200), GFP_KERNEL);
|
||||
+ if (!ac200)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ i2c_set_clientdata(i2c, ac200);
|
||||
+
|
||||
+ ac200->clk = devm_clk_get(dev, NULL);
|
||||
+ if (IS_ERR(ac200->clk)) {
|
||||
+ ret = PTR_ERR(ac200->clk);
|
||||
+ dev_err(dev, "Can't obtain the clock: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ac200->regmap = devm_regmap_init_i2c(i2c, &ac200_regmap_config);
|
||||
+ if (IS_ERR(ac200->regmap)) {
|
||||
+ ret = PTR_ERR(ac200->regmap);
|
||||
+ dev_err(dev, "Regmap init failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ret = clk_prepare_enable(ac200->clk);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
|
||||
+ if (ret)
|
||||
+ goto err;
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 1);
|
||||
+ if (ret)
|
||||
+ goto err;
|
||||
+
|
||||
+ ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, ac200_cells,
|
||||
+ ARRAY_SIZE(ac200_cells), NULL, 0, NULL);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Failed to add MFD devices: %d\n", ret);
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err:
|
||||
+ clk_disable_unprepare(ac200->clk);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+void ac200_i2c_remove(struct i2c_client *i2c)
|
||||
+{
|
||||
+ struct ac200_dev *ac200 = i2c_get_clientdata(i2c);
|
||||
+
|
||||
+ regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
|
||||
+
|
||||
+ clk_disable_unprepare(ac200->clk);
|
||||
+}
|
||||
+
|
||||
+static const struct i2c_device_id ac200_ids[] = {
|
||||
+ { "ac200", },
|
||||
+ { /* sentinel */ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(i2c, ac200_ids);
|
||||
+
|
||||
+static const struct of_device_id ac200_of_match[] = {
|
||||
+ { .compatible = "x-powers,ac200" },
|
||||
+ { /* sentinel */ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, ac200_of_match);
|
||||
+
|
||||
+static struct i2c_driver ac200_i2c_driver = {
|
||||
+ .driver = {
|
||||
+ .name = "ac200",
|
||||
+ .of_match_table = of_match_ptr(ac200_of_match),
|
||||
+ },
|
||||
+ .probe = ac200_i2c_probe,
|
||||
+ .remove = ac200_i2c_remove,
|
||||
+ .id_table = ac200_ids,
|
||||
+};
|
||||
+module_i2c_driver(ac200_i2c_driver);
|
||||
+
|
||||
+MODULE_DESCRIPTION("MFD core driver for AC200");
|
||||
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
--- /dev/null
|
||||
+++ b/include/linux/mfd/ac200.h
|
||||
@@ -0,0 +1,209 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
+/*
|
||||
+ * AC200 register list
|
||||
+ *
|
||||
+ * Copyright (C) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
+ */
|
||||
+
|
||||
+#ifndef __LINUX_MFD_AC200_H
|
||||
+#define __LINUX_MFD_AC200_H
|
||||
+
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/regmap.h>
|
||||
+
|
||||
+/* interface registers (can be accessed from any page) */
|
||||
+#define AC200_TWI_CHANGE_TO_RSB 0x3E
|
||||
+#define AC200_TWI_PAD_DELAY 0xC4
|
||||
+#define AC200_TWI_REG_ADDR_H 0xFE
|
||||
+
|
||||
+/* General registers */
|
||||
+#define AC200_SYS_VERSION 0x0000
|
||||
+#define AC200_SYS_CONTROL 0x0002
|
||||
+#define AC200_SYS_IRQ_ENABLE 0x0004
|
||||
+#define AC200_SYS_IRQ_STATUS 0x0006
|
||||
+#define AC200_SYS_CLK_CTL 0x0008
|
||||
+#define AC200_SYS_DLDO_OSC_CTL 0x000A
|
||||
+#define AC200_SYS_PLL_CTL0 0x000C
|
||||
+#define AC200_SYS_PLL_CTL1 0x000E
|
||||
+#define AC200_SYS_AUDIO_CTL0 0x0010
|
||||
+#define AC200_SYS_AUDIO_CTL1 0x0012
|
||||
+#define AC200_SYS_EPHY_CTL0 0x0014
|
||||
+#define AC200_SYS_EPHY_CTL1 0x0016
|
||||
+#define AC200_SYS_TVE_CTL0 0x0018
|
||||
+#define AC200_SYS_TVE_CTL1 0x001A
|
||||
+
|
||||
+/* Audio Codec registers */
|
||||
+#define AC200_AC_SYS_CLK_CTL 0x2000
|
||||
+#define AC200_SYS_MOD_RST 0x2002
|
||||
+#define AC200_SYS_SAMP_CTL 0x2004
|
||||
+#define AC200_I2S_CTL 0x2100
|
||||
+#define AC200_I2S_CLK 0x2102
|
||||
+#define AC200_I2S_FMT0 0x2104
|
||||
+#define AC200_I2S_FMT1 0x2108
|
||||
+#define AC200_I2S_MIX_SRC 0x2114
|
||||
+#define AC200_I2S_MIX_GAIN 0x2116
|
||||
+#define AC200_I2S_DACDAT_DVC 0x2118
|
||||
+#define AC200_I2S_ADCDAT_DVC 0x211A
|
||||
+#define AC200_AC_DAC_DPC 0x2200
|
||||
+#define AC200_AC_DAC_MIX_SRC 0x2202
|
||||
+#define AC200_AC_DAC_MIX_GAIN 0x2204
|
||||
+#define AC200_DACA_OMIXER_CTRL 0x2220
|
||||
+#define AC200_OMIXER_SR 0x2222
|
||||
+#define AC200_LINEOUT_CTRL 0x2224
|
||||
+#define AC200_AC_ADC_DPC 0x2300
|
||||
+#define AC200_MBIAS_CTRL 0x2310
|
||||
+#define AC200_ADC_MIC_CTRL 0x2320
|
||||
+#define AC200_ADCMIXER_SR 0x2322
|
||||
+#define AC200_ANALOG_TUNING0 0x232A
|
||||
+#define AC200_ANALOG_TUNING1 0x232C
|
||||
+#define AC200_AC_AGC_SEL 0x2480
|
||||
+#define AC200_ADC_DAPLCTRL 0x2500
|
||||
+#define AC200_ADC_DAPRCTRL 0x2502
|
||||
+#define AC200_ADC_DAPLSTA 0x2504
|
||||
+#define AC200_ADC_DAPRSTA 0x2506
|
||||
+#define AC200_ADC_DAPLTL 0x2508
|
||||
+#define AC200_ADC_DAPRTL 0x250A
|
||||
+#define AC200_ADC_DAPLHAC 0x250C
|
||||
+#define AC200_ADC_DAPLLAC 0x250E
|
||||
+#define AC200_ADC_DAPRHAC 0x2510
|
||||
+#define AC200_ADC_DAPRLAC 0x2512
|
||||
+#define AC200_ADC_DAPLDT 0x2514
|
||||
+#define AC200_ADC_DAPLAT 0x2516
|
||||
+#define AC200_ADC_DAPRDT 0x2518
|
||||
+#define AC200_ADC_DAPRAT 0x251A
|
||||
+#define AC200_ADC_DAPNTH 0x251C
|
||||
+#define AC200_ADC_DAPLHNAC 0x251E
|
||||
+#define AC200_ADC_DAPLLNAC 0x2520
|
||||
+#define AC200_ADC_DAPRHNAC 0x2522
|
||||
+#define AC200_ADC_DAPRLNAC 0x2524
|
||||
+#define AC200_AC_DAPHHPFC 0x2526
|
||||
+#define AC200_AC_DAPLHPFC 0x2528
|
||||
+#define AC200_AC_DAPOPT 0x252A
|
||||
+#define AC200_AC_DAC_DAPCTRL 0x3000
|
||||
+#define AC200_AC_DRC_HHPFC 0x3002
|
||||
+#define AC200_AC_DRC_LHPFC 0x3004
|
||||
+#define AC200_AC_DRC_CTRL 0x3006
|
||||
+#define AC200_AC_DRC_LPFHAT 0x3008
|
||||
+#define AC200_AC_DRC_LPFLAT 0x300A
|
||||
+#define AC200_AC_DRC_RPFHAT 0x300C
|
||||
+#define AC200_AC_DRC_RPFLAT 0x300E
|
||||
+#define AC200_AC_DRC_LPFHRT 0x3010
|
||||
+#define AC200_AC_DRC_LPFLRT 0x3012
|
||||
+#define AC200_AC_DRC_RPFHRT 0x3014
|
||||
+#define AC200_AC_DRC_RPFLRT 0x3016
|
||||
+#define AC200_AC_DRC_LRMSHAT 0x3018
|
||||
+#define AC200_AC_DRC_LRMSLAT 0x301A
|
||||
+#define AC200_AC_DRC_RRMSHAT 0x301C
|
||||
+#define AC200_AC_DRC_RRMSLAT 0x301E
|
||||
+#define AC200_AC_DRC_HCT 0x3020
|
||||
+#define AC200_AC_DRC_LCT 0x3022
|
||||
+#define AC200_AC_DRC_HKC 0x3024
|
||||
+#define AC200_AC_DRC_LKC 0x3026
|
||||
+#define AC200_AC_DRC_HOPC 0x3028
|
||||
+#define AC200_AC_DRC_LOPC 0x302A
|
||||
+#define AC200_AC_DRC_HLT 0x302C
|
||||
+#define AC200_AC_DRC_LLT 0x302E
|
||||
+#define AC200_AC_DRC_HKI 0x3030
|
||||
+#define AC200_AC_DRC_LKI 0x3032
|
||||
+#define AC200_AC_DRC_HOPL 0x3034
|
||||
+#define AC200_AC_DRC_LOPL 0x3036
|
||||
+#define AC200_AC_DRC_HET 0x3038
|
||||
+#define AC200_AC_DRC_LET 0x303A
|
||||
+#define AC200_AC_DRC_HKE 0x303C
|
||||
+#define AC200_AC_DRC_LKE 0x303E
|
||||
+#define AC200_AC_DRC_HOPE 0x3040
|
||||
+#define AC200_AC_DRC_LOPE 0x3042
|
||||
+#define AC200_AC_DRC_HKN 0x3044
|
||||
+#define AC200_AC_DRC_LKN 0x3046
|
||||
+#define AC200_AC_DRC_SFHAT 0x3048
|
||||
+#define AC200_AC_DRC_SFLAT 0x304A
|
||||
+#define AC200_AC_DRC_SFHRT 0x304C
|
||||
+#define AC200_AC_DRC_SFLRT 0x304E
|
||||
+#define AC200_AC_DRC_MXGHS 0x3050
|
||||
+#define AC200_AC_DRC_MXGLS 0x3052
|
||||
+#define AC200_AC_DRC_MNGHS 0x3054
|
||||
+#define AC200_AC_DRC_MNGLS 0x3056
|
||||
+#define AC200_AC_DRC_EPSHC 0x3058
|
||||
+#define AC200_AC_DRC_EPSLC 0x305A
|
||||
+#define AC200_AC_DRC_HPFHGAIN 0x305E
|
||||
+#define AC200_AC_DRC_HPFLGAIN 0x3060
|
||||
+#define AC200_AC_DRC_BISTCR 0x3100
|
||||
+#define AC200_AC_DRC_BISTST 0x3102
|
||||
+
|
||||
+/* TVE registers */
|
||||
+#define AC200_TVE_CTL0 0x4000
|
||||
+#define AC200_TVE_CTL1 0x4002
|
||||
+#define AC200_TVE_MOD0 0x4004
|
||||
+#define AC200_TVE_MOD1 0x4006
|
||||
+#define AC200_TVE_DAC_CFG0 0x4008
|
||||
+#define AC200_TVE_DAC_CFG1 0x400A
|
||||
+#define AC200_TVE_YC_DELAY 0x400C
|
||||
+#define AC200_TVE_YC_FILTER 0x400E
|
||||
+#define AC200_TVE_BURST_FRQ0 0x4010
|
||||
+#define AC200_TVE_BURST_FRQ1 0x4012
|
||||
+#define AC200_TVE_FRONT_PORCH 0x4014
|
||||
+#define AC200_TVE_BACK_PORCH 0x4016
|
||||
+#define AC200_TVE_TOTAL_LINE 0x401C
|
||||
+#define AC200_TVE_FIRST_ACTIVE 0x401E
|
||||
+#define AC200_TVE_BLACK_LEVEL 0x4020
|
||||
+#define AC200_TVE_BLANK_LEVEL 0x4022
|
||||
+#define AC200_TVE_PLUG_EN 0x4030
|
||||
+#define AC200_TVE_PLUG_IRQ_EN 0x4032
|
||||
+#define AC200_TVE_PLUG_IRQ_STA 0x4034
|
||||
+#define AC200_TVE_PLUG_STA 0x4038
|
||||
+#define AC200_TVE_PLUG_DEBOUNCE 0x4040
|
||||
+#define AC200_TVE_DAC_TEST 0x4042
|
||||
+#define AC200_TVE_PLUG_PULSE_LEVEL 0x40F4
|
||||
+#define AC200_TVE_PLUG_PULSE_START 0x40F8
|
||||
+#define AC200_TVE_PLUG_PULSE_PERIOD 0x40FA
|
||||
+#define AC200_TVE_IF_CTL 0x5000
|
||||
+#define AC200_TVE_IF_TIM0 0x5008
|
||||
+#define AC200_TVE_IF_TIM1 0x500A
|
||||
+#define AC200_TVE_IF_TIM2 0x500C
|
||||
+#define AC200_TVE_IF_TIM3 0x500E
|
||||
+#define AC200_TVE_IF_SYNC0 0x5010
|
||||
+#define AC200_TVE_IF_SYNC1 0x5012
|
||||
+#define AC200_TVE_IF_SYNC2 0x5014
|
||||
+#define AC200_TVE_IF_TIM4 0x5016
|
||||
+#define AC200_TVE_IF_STATUS 0x5018
|
||||
+
|
||||
+/* EPHY registers */
|
||||
+#define AC200_EPHY_CTL 0x6000
|
||||
+#define AC200_EPHY_BIST 0x6002
|
||||
+
|
||||
+/* eFuse registers (0x8000 - 0x9FFF, layout unknown) */
|
||||
+
|
||||
+/* RTC registers */
|
||||
+#define AC200_LOSC_CTRL0 0xA000
|
||||
+#define AC200_LOSC_CTRL1 0xA002
|
||||
+#define AC200_LOSC_AUTO_SWT_STA 0xA004
|
||||
+#define AC200_INTOSC_CLK_PRESCAL 0xA008
|
||||
+#define AC200_RTC_YY_MM_DD0 0xA010
|
||||
+#define AC200_RTC_YY_MM_DD1 0xA012
|
||||
+#define AC200_RTC_HH_MM_SS0 0xA014
|
||||
+#define AC200_RTC_HH_MM_SS1 0xA016
|
||||
+#define AC200_ALARM0_CUR_VLU0 0xA024
|
||||
+#define AC200_ALARM0_CUR_VLU1 0xA026
|
||||
+#define AC200_ALARM0_ENABLE 0xA028
|
||||
+#define AC200_ALARM0_IRQ_EN 0xA02C
|
||||
+#define AC200_ALARM0_IRQ_STA 0xA030
|
||||
+#define AC200_ALARM1_WK_HH_MM_SS0 0xA040
|
||||
+#define AC200_ALARM1_WK_HH_MM_SS1 0xA042
|
||||
+#define AC200_ALARM1_ENABLE 0xA044
|
||||
+#define AC200_ALARM1_IRQ_EN 0xA048
|
||||
+#define AC200_ALARM1_IRQ_STA 0xA04C
|
||||
+#define AC200_ALARM_CONFIG 0xA050
|
||||
+#define AC200_LOSC_OUT_GATING 0xA060
|
||||
+#define AC200_GP_DATA(x) (0xA100 + (x) * 2)
|
||||
+#define AC200_RTC_DEB 0xA170
|
||||
+#define AC200_GPL_HOLD_OUTPUT 0xA180
|
||||
+#define AC200_VDD_RTC 0xA190
|
||||
+#define AC200_IC_CHARA0 0xA1F0
|
||||
+#define AC200_IC_CHARA1 0xA1F2
|
||||
+
|
||||
+struct ac200_dev {
|
||||
+ struct clk *clk;
|
||||
+ struct regmap *regmap;
|
||||
+};
|
||||
+
|
||||
+#endif /* __LINUX_MFD_AC200_H */
|
@ -1,374 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andre Przywara <andre.przywara@arm.com>
|
||||
Date: Mon, 13 Jun 2022 17:37:19 +0100
|
||||
Subject: mfd: Add support for X-Powers AC200 EPHY syscon
|
||||
|
||||
The X-Powers AC200 mixed signal chip contains a 100Mbit/s Ethernet PHY.
|
||||
While the PHY is using the standard MDIO and MII/RMII interfaces to
|
||||
the MAC, there are some registers in the AC200 that need to be setup to
|
||||
make the PHY functional:
|
||||
- The MDIO PHY address needs to set.
|
||||
- The LED polarity needs to be configured.
|
||||
- The MII interface mode needs to be set (MII or RMII).
|
||||
- There is a reset line that controls the PHY operation.
|
||||
- There is a clock gate that blocks or forwards the AC200's internal clock
|
||||
to the PHY.
|
||||
|
||||
This driver here takes care of those setup needs, but does not cover the
|
||||
actual PHY operation. Once the PHY is set up and enabled, it behaves like
|
||||
a standard MDIO/MII controlled PHY, and can be driven by the IEEE802.3-C22
|
||||
driver.
|
||||
|
||||
To some degree those parameters mimic the typical wired setup of a
|
||||
physical PHY chip: the LED polarity, MII interface mode and PHY address
|
||||
are typically configued via connecting certain pins. We use the
|
||||
devicetree to learn those parameters, which depend on the board setup.
|
||||
|
||||
This driver is a child of the AC200 MFD parent device, and uses its
|
||||
regmap and input clock. It also provides a reset and clock controller,
|
||||
which the actual PHY device (node) needs to refer to. This ensures that
|
||||
this PHY control device is initialised before the PHY is expected to work.
|
||||
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
---
|
||||
drivers/phy/allwinner/Kconfig | 9 +
|
||||
drivers/phy/allwinner/Makefile | 1 +
|
||||
drivers/phy/allwinner/ac200-ephy-ctl.c | 301 ++++++++++
|
||||
3 files changed, 311 insertions(+)
|
||||
|
||||
diff --git a/drivers/phy/allwinner/Kconfig b/drivers/phy/allwinner/Kconfig
|
||||
index e93a53139460..d3614169de5c 100644
|
||||
--- a/drivers/phy/allwinner/Kconfig
|
||||
+++ b/drivers/phy/allwinner/Kconfig
|
||||
@@ -58,3 +58,12 @@ config PHY_SUN50I_USB3
|
||||
part of Allwinner H6 SoC.
|
||||
|
||||
This driver controls each individual USB 2+3 host PHY combo.
|
||||
+
|
||||
+config AC200_PHY_CTL
|
||||
+ tristate "X-Power AC200 PHY control driver"
|
||||
+ depends on MFD_AC200
|
||||
+ depends on RESET_CONTROLLER
|
||||
+ help
|
||||
+ Enable this to support the Ethernet PHY operation of the AC200
|
||||
+ mixed signal chip. This driver just enables and configures the
|
||||
+ PHY, the PHY itself is supported by a standard driver.
|
||||
diff --git a/drivers/phy/allwinner/Makefile b/drivers/phy/allwinner/Makefile
|
||||
index bd74901a1255..0eecec7a908a 100644
|
||||
--- a/drivers/phy/allwinner/Makefile
|
||||
+++ b/drivers/phy/allwinner/Makefile
|
||||
@@ -3,3 +3,4 @@ obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o
|
||||
obj-$(CONFIG_PHY_SUN6I_MIPI_DPHY) += phy-sun6i-mipi-dphy.o
|
||||
obj-$(CONFIG_PHY_SUN9I_USB) += phy-sun9i-usb.o
|
||||
obj-$(CONFIG_PHY_SUN50I_USB3) += phy-sun50i-usb3.o
|
||||
+obj-$(CONFIG_AC200_PHY_CTL) += ac200-ephy-ctl.o
|
||||
diff --git a/drivers/phy/allwinner/ac200-ephy-ctl.c b/drivers/phy/allwinner/ac200-ephy-ctl.c
|
||||
new file mode 100644
|
||||
index 000000000000..8efeaf18e42c
|
||||
--- /dev/null
|
||||
+++ b/drivers/phy/allwinner/ac200-ephy-ctl.c
|
||||
@@ -0,0 +1,301 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/**
|
||||
+ * syscon driver to control and configure AC200 Ethernet PHY
|
||||
+ * Copyright (c) 2022 Arm Ltd.
|
||||
+ *
|
||||
+ * TODO's and questions:
|
||||
+ * =========================
|
||||
+ * - This driver is something like a syscon driver, as it controls various
|
||||
+ * bits and registers that effect other devices (the actual PHY). It's
|
||||
+ * unclear where it should live, though:
|
||||
+ * - it could be integrated into the MFD driver, but this looks messy
|
||||
+ * - it could live at the current location (drivers/phy/allwinner), but that
|
||||
+ * sounds wrong
|
||||
+ * - it could be a separate file, but in drivers/mfd
|
||||
+ * - anything else
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/clk-provider.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/nvmem-consumer.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/of_net.h>
|
||||
+#include <linux/phy.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/reset-controller.h>
|
||||
+
|
||||
+/* macros for system ephy control 0 register */
|
||||
+#define AC200_SYS_EPHY_CTL0 0x0014
|
||||
+#define AC200_EPHY_RESET_INVALID BIT(0)
|
||||
+#define AC200_EPHY_SYSCLK_GATING 1
|
||||
+
|
||||
+/* macros for system ephy control 1 register */
|
||||
+#define AC200_SYS_EPHY_CTL1 0x0016
|
||||
+#define AC200_EPHY_E_EPHY_MII_IO_EN BIT(0)
|
||||
+#define AC200_EPHY_E_LNK_LED_IO_EN BIT(1)
|
||||
+#define AC200_EPHY_E_SPD_LED_IO_EN BIT(2)
|
||||
+#define AC200_EPHY_E_DPX_LED_IO_EN BIT(3)
|
||||
+
|
||||
+/* macros for ephy control register */
|
||||
+#define AC200_EPHY_CTL 0x6000
|
||||
+#define AC200_EPHY_SHUTDOWN BIT(0)
|
||||
+#define AC200_EPHY_LED_POL BIT(1)
|
||||
+#define AC200_EPHY_CLK_SEL BIT(2)
|
||||
+#define AC200_EPHY_ADDR(x) (((x) & 0x1F) << 4)
|
||||
+#define AC200_EPHY_XMII_SEL BIT(11)
|
||||
+#define AC200_EPHY_CALIB(x) (((x) & 0xF) << 12)
|
||||
+
|
||||
+struct ac200_ephy_ctl_dev {
|
||||
+ struct reset_controller_dev rcdev;
|
||||
+ struct clk_hw *gate_clk;
|
||||
+ struct regmap *regmap;
|
||||
+};
|
||||
+
|
||||
+static struct ac200_ephy_ctl_dev *to_phy_dev(struct reset_controller_dev *rcdev)
|
||||
+{
|
||||
+ return container_of(rcdev, struct ac200_ephy_ctl_dev, rcdev);
|
||||
+}
|
||||
+
|
||||
+static int ephy_ctl_reset(struct reset_controller_dev *rcdev, unsigned long id)
|
||||
+{
|
||||
+ struct ac200_ephy_ctl_dev *ac200 = to_phy_dev(rcdev);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = regmap_clear_bits(ac200->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_RESET_INVALID);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* This is going via I2C, so there is plenty of built-in delay. */
|
||||
+ return regmap_set_bits(ac200->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_RESET_INVALID);
|
||||
+}
|
||||
+
|
||||
+static int ephy_ctl_assert(struct reset_controller_dev *rcdev, unsigned long id)
|
||||
+{
|
||||
+ struct ac200_ephy_ctl_dev *ac200 = to_phy_dev(rcdev);
|
||||
+
|
||||
+ return regmap_clear_bits(ac200->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_RESET_INVALID);
|
||||
+}
|
||||
+
|
||||
+static int ephy_ctl_deassert(struct reset_controller_dev *rcdev,
|
||||
+ unsigned long id)
|
||||
+{
|
||||
+ struct ac200_ephy_ctl_dev *ac200 = to_phy_dev(rcdev);
|
||||
+
|
||||
+ return regmap_set_bits(ac200->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_RESET_INVALID);
|
||||
+}
|
||||
+
|
||||
+static int ephy_ctl_status(struct reset_controller_dev *rcdev, unsigned long id)
|
||||
+{
|
||||
+ struct ac200_ephy_ctl_dev *ac200 = to_phy_dev(rcdev);
|
||||
+
|
||||
+ return regmap_test_bits(ac200->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_RESET_INVALID);
|
||||
+}
|
||||
+
|
||||
+static int ephy_ctl_reset_of_xlate(struct reset_controller_dev *rcdev,
|
||||
+ const struct of_phandle_args *reset_spec)
|
||||
+{
|
||||
+ if (WARN_ON(reset_spec->args_count != 0))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+const struct reset_control_ops ephy_ctl_reset_ops = {
|
||||
+ .assert = ephy_ctl_assert,
|
||||
+ .deassert = ephy_ctl_deassert,
|
||||
+ .reset = ephy_ctl_reset,
|
||||
+ .status = ephy_ctl_status,
|
||||
+};
|
||||
+
|
||||
+static void ac200_ephy_ctl_disable(struct ac200_ephy_ctl_dev *priv)
|
||||
+{
|
||||
+ regmap_write(priv->regmap, AC200_EPHY_CTL, AC200_EPHY_SHUTDOWN);
|
||||
+ regmap_write(priv->regmap, AC200_SYS_EPHY_CTL1, 0);
|
||||
+ regmap_write(priv->regmap, AC200_SYS_EPHY_CTL0, 0);
|
||||
+}
|
||||
+
|
||||
+static int ac200_ephy_ctl_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct reset_controller_dev *rcdev;
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct ac200_ephy_ctl_dev *priv;
|
||||
+ struct nvmem_cell *calcell;
|
||||
+ const char *parent_name;
|
||||
+ phy_interface_t phy_if;
|
||||
+ u16 *caldata, ephy_ctl;
|
||||
+ struct clk *clk;
|
||||
+ size_t callen;
|
||||
+ u32 value;
|
||||
+ int ret;
|
||||
+
|
||||
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
+ if (!priv)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ platform_set_drvdata(pdev, priv);
|
||||
+
|
||||
+ priv->regmap = dev_get_regmap(dev->parent, NULL);
|
||||
+ if (!priv->regmap)
|
||||
+ return -EPROBE_DEFER;
|
||||
+
|
||||
+ calcell = devm_nvmem_cell_get(dev, "calibration");
|
||||
+ if (IS_ERR(calcell))
|
||||
+ return dev_err_probe(dev, PTR_ERR(calcell),
|
||||
+ "Unable to find calibration data!\n");
|
||||
+
|
||||
+ caldata = nvmem_cell_read(calcell, &callen);
|
||||
+ if (IS_ERR(caldata)) {
|
||||
+ dev_err(dev, "Unable to read calibration data!\n");
|
||||
+ return PTR_ERR(caldata);
|
||||
+ }
|
||||
+
|
||||
+ if (callen != 2) {
|
||||
+ dev_err(dev, "Calibration data length must be 2 bytes!\n");
|
||||
+ kfree(caldata);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ ephy_ctl = AC200_EPHY_CALIB(*caldata + 3);
|
||||
+ kfree(caldata);
|
||||
+
|
||||
+ ret = of_get_phy_mode(dev->of_node, &phy_if);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Unable to read PHY connection mode\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ switch (phy_if) {
|
||||
+ case PHY_INTERFACE_MODE_MII:
|
||||
+ break;
|
||||
+ case PHY_INTERFACE_MODE_RMII:
|
||||
+ ephy_ctl |= AC200_EPHY_XMII_SEL;
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_err(dev, "Illegal PHY connection mode (%d), only RMII or MII supported\n",
|
||||
+ phy_if);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ ret = of_property_read_u32(dev->of_node, "x-powers,led-polarity",
|
||||
+ &value);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Unable to read LED polarity setting\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ if (value == GPIO_ACTIVE_LOW)
|
||||
+ ephy_ctl |= AC200_EPHY_LED_POL;
|
||||
+
|
||||
+ ret = of_property_read_u32(dev->of_node, "phy-address", &value);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Unable to read PHY address value\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ephy_ctl |= AC200_EPHY_ADDR(value);
|
||||
+
|
||||
+ clk = clk_get(dev->parent, NULL);
|
||||
+ if (IS_ERR(clk))
|
||||
+ return dev_err_probe(dev, PTR_ERR(clk),
|
||||
+ "Unable to obtain the clock\n");
|
||||
+
|
||||
+ if (clk_get_rate(clk) == 24000000)
|
||||
+ ephy_ctl |= AC200_EPHY_CLK_SEL;
|
||||
+
|
||||
+ clk_put(clk);
|
||||
+
|
||||
+ /* Assert reset and gate clock, to disable PHY for now */
|
||||
+ ret = regmap_write(priv->regmap, AC200_SYS_EPHY_CTL0, 0);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(priv->regmap, AC200_SYS_EPHY_CTL1,
|
||||
+ AC200_EPHY_E_EPHY_MII_IO_EN |
|
||||
+ AC200_EPHY_E_LNK_LED_IO_EN |
|
||||
+ AC200_EPHY_E_SPD_LED_IO_EN |
|
||||
+ AC200_EPHY_E_DPX_LED_IO_EN);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(priv->regmap, AC200_EPHY_CTL, ephy_ctl);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ rcdev = &priv->rcdev;
|
||||
+ rcdev->owner = dev->driver->owner;
|
||||
+ rcdev->nr_resets = 1;
|
||||
+ rcdev->ops = &ephy_ctl_reset_ops;
|
||||
+ rcdev->of_node = dev->of_node;
|
||||
+ rcdev->of_reset_n_cells = 0;
|
||||
+ rcdev->of_xlate = ephy_ctl_reset_of_xlate;
|
||||
+
|
||||
+ ret = devm_reset_controller_register(dev, rcdev);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Unable to register reset controller: %d\n", ret);
|
||||
+ goto err_disable_ephy;
|
||||
+ }
|
||||
+
|
||||
+ parent_name = of_clk_get_parent_name(dev->parent->of_node, 0);
|
||||
+ priv->gate_clk = devm_clk_hw_register_regmap_gate(dev,
|
||||
+ "ac200-ephy-ctl-gate", parent_name, 0,
|
||||
+ priv->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_SYSCLK_GATING, 0);
|
||||
+ if (IS_ERR(priv->gate_clk)) {
|
||||
+ ret = PTR_ERR(priv->gate_clk);
|
||||
+ dev_err(dev, "Unable to register gate clock: %d\n", ret);
|
||||
+ goto err_disable_ephy;
|
||||
+ }
|
||||
+
|
||||
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
|
||||
+ priv->gate_clk);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Unable to register clock provider: %d\n", ret);
|
||||
+ goto err_disable_ephy;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err_disable_ephy:
|
||||
+ ac200_ephy_ctl_disable(priv);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int ac200_ephy_ctl_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct ac200_ephy_ctl_dev *priv = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ ac200_ephy_ctl_disable(priv);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id ac200_ephy_ctl_match[] = {
|
||||
+ { .compatible = "x-powers,ac200-ephy-ctl" },
|
||||
+ { /* sentinel */ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, ac200_ephy_ctl_match);
|
||||
+
|
||||
+static struct platform_driver ac200_ephy_ctl_driver = {
|
||||
+ .probe = ac200_ephy_ctl_probe,
|
||||
+ .remove = ac200_ephy_ctl_remove,
|
||||
+ .driver = {
|
||||
+ .name = "ac200-ephy-ctl",
|
||||
+ .of_match_table = ac200_ephy_ctl_match,
|
||||
+ },
|
||||
+};
|
||||
+module_platform_driver(ac200_ephy_ctl_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Andre Przywara <andre.przywara@arm.com>");
|
||||
+MODULE_DESCRIPTION("AC200 Ethernet PHY control driver");
|
||||
+MODULE_LICENSE("GPL");
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,265 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Fri, 16 Aug 2019 16:38:21 +0200
|
||||
Subject: mfd: Add support for X-Powers AC200
|
||||
|
||||
The X-Powers AC200 is a mixed signal multi-purpose chip, which provides
|
||||
audio DAC/ADCs, a CVBS video encoder, a 100Mbit/s Ethernet PHY and a
|
||||
real-time clock. Its control registers can be accessed via I2C or
|
||||
Allwinner's RSB bus.
|
||||
Beside this chip being used on some older boards (for instance the Remix
|
||||
Mini PC), it is quite wide spread due to its die being co-packaged on the
|
||||
Allwinner H6 and H616 SoCs, which use its audio, video and PHY
|
||||
functionality.
|
||||
|
||||
Aside from the RTC, the other functions do not need constant
|
||||
hand-holding via the I2C registers, but rather need to be configured and
|
||||
enabled only once.
|
||||
|
||||
We model the control side of this chip using the MFD subsystem. This
|
||||
driver here just provides the parent device for the various subfunctions,
|
||||
and takes care of enabling clocks and reset, but also provides the regmap,
|
||||
which the respective child drivers will use.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
---
|
||||
drivers/mfd/Kconfig | 12 +
|
||||
drivers/mfd/Makefile | 1 +
|
||||
drivers/mfd/ac200.c | 190 ++++++++++
|
||||
3 files changed, 203 insertions(+)
|
||||
|
||||
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
|
||||
index f6b519eaaa71..39fef6420fe5 100644
|
||||
--- a/drivers/mfd/Kconfig
|
||||
+++ b/drivers/mfd/Kconfig
|
||||
@@ -191,6 +191,18 @@ config MFD_AC100
|
||||
This driver include only the core APIs. You have to select individual
|
||||
components like codecs or RTC under the corresponding menus.
|
||||
|
||||
+config MFD_AC200
|
||||
+ tristate "X-Powers AC200"
|
||||
+ select MFD_CORE
|
||||
+ select REGMAP_I2C
|
||||
+ depends on COMMON_CLK
|
||||
+ depends on I2C
|
||||
+ depends on OF
|
||||
+ help
|
||||
+ If you say Y here you get support for the X-Powers AC200 IC.
|
||||
+ This driver include only the core APIs. You have to select individual
|
||||
+ components like Ethernet PHY or codec under the corresponding menus.
|
||||
+
|
||||
config MFD_AXP20X
|
||||
tristate
|
||||
select MFD_CORE
|
||||
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
|
||||
index f3d1f1dc73b5..e2ba77bd1d51 100644
|
||||
--- a/drivers/mfd/Makefile
|
||||
+++ b/drivers/mfd/Makefile
|
||||
@@ -137,6 +137,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o
|
||||
obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
|
||||
|
||||
obj-$(CONFIG_MFD_AC100) += ac100.o
|
||||
+obj-$(CONFIG_MFD_AC200) += ac200.o
|
||||
obj-$(CONFIG_MFD_AXP20X) += axp20x.o
|
||||
obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
|
||||
obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
|
||||
diff --git a/drivers/mfd/ac200.c b/drivers/mfd/ac200.c
|
||||
new file mode 100644
|
||||
index 000000000000..ad28c380c880
|
||||
--- /dev/null
|
||||
+++ b/drivers/mfd/ac200.c
|
||||
@@ -0,0 +1,190 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * MFD core driver for X-Powers' AC200 IC
|
||||
+ *
|
||||
+ * The AC200 is a chip which is co-packaged with Allwinner H6 SoC and
|
||||
+ * includes analog audio codec, analog TV encoder, ethernet PHY, eFuse
|
||||
+ * and RTC.
|
||||
+ *
|
||||
+ * Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
+ *
|
||||
+ * Based on AC100 driver with following copyrights:
|
||||
+ * Copyright (2016) Chen-Yu Tsai
|
||||
+ */
|
||||
+
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/i2c.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/mfd/core.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/nvmem-consumer.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/regmap.h>
|
||||
+
|
||||
+struct ac200_dev {
|
||||
+ struct clk *clk;
|
||||
+ struct regmap *regmap;
|
||||
+};
|
||||
+
|
||||
+#define AC200_SYS_CONTROL 0x0002
|
||||
+#define AC200_SYS_BG_CTL 0x0050
|
||||
+
|
||||
+/* interface register (can be accessed from any page) */
|
||||
+#define AC200_TWI_REG_ADDR_H 0xFE
|
||||
+
|
||||
+#define AC200_MAX_REG 0xA1F2
|
||||
+
|
||||
+static const struct regmap_range_cfg ac200_range_cfg[] = {
|
||||
+ {
|
||||
+ .range_max = AC200_MAX_REG,
|
||||
+ .selector_reg = AC200_TWI_REG_ADDR_H,
|
||||
+ .selector_mask = 0xff,
|
||||
+ .selector_shift = 0,
|
||||
+ .window_start = 0,
|
||||
+ .window_len = 256,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static const struct regmap_config ac200_regmap_config = {
|
||||
+ .name = "AC200",
|
||||
+ .reg_bits = 8,
|
||||
+ .reg_stride = 2,
|
||||
+ .val_bits = 16,
|
||||
+ .ranges = ac200_range_cfg,
|
||||
+ .num_ranges = ARRAY_SIZE(ac200_range_cfg),
|
||||
+ .max_register = AC200_MAX_REG,
|
||||
+};
|
||||
+
|
||||
+static struct mfd_cell ac200_cells[] = {
|
||||
+ {
|
||||
+ .name = "ac200-codec",
|
||||
+ .of_compatible = "x-powers,ac200-codec",
|
||||
+ }, {
|
||||
+ .name = "ac200-ephy-ctl",
|
||||
+ .of_compatible = "x-powers,ac200-ephy-ctl",
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int ac200_i2c_probe(struct i2c_client *i2c)
|
||||
+{
|
||||
+ struct device *dev = &i2c->dev;
|
||||
+ struct nvmem_cell *bgcell;
|
||||
+ struct ac200_dev *ac200;
|
||||
+ u16 *bgdata, bgval;
|
||||
+ size_t bglen;
|
||||
+ int ret;
|
||||
+
|
||||
+ ac200 = devm_kzalloc(dev, sizeof(*ac200), GFP_KERNEL);
|
||||
+ if (!ac200)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ i2c_set_clientdata(i2c, ac200);
|
||||
+
|
||||
+ ac200->clk = devm_clk_get(dev, NULL);
|
||||
+ if (IS_ERR(ac200->clk))
|
||||
+ return dev_err_probe(dev, PTR_ERR(ac200->clk),
|
||||
+ "Can't obtain the clock\n");
|
||||
+
|
||||
+ ac200->regmap = devm_regmap_init_i2c(i2c, &ac200_regmap_config);
|
||||
+ if (IS_ERR(ac200->regmap)) {
|
||||
+ ret = PTR_ERR(ac200->regmap);
|
||||
+ dev_err(dev, "Regmap init failed: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ bgcell = devm_nvmem_cell_get(dev, "bandgap");
|
||||
+ if (IS_ERR(bgcell))
|
||||
+ return dev_err_probe(dev, PTR_ERR(bgcell),
|
||||
+ "Unable to find bandgap data!\n");
|
||||
+
|
||||
+ bgdata = nvmem_cell_read(bgcell, &bglen);
|
||||
+ if (IS_ERR(bgdata)) {
|
||||
+ dev_err(dev, "Unable to read bandgap data!\n");
|
||||
+ return PTR_ERR(bgdata);
|
||||
+ }
|
||||
+
|
||||
+ if (bglen != 2) {
|
||||
+ dev_err(dev, "Invalid nvmem bandgap length!\n");
|
||||
+ kfree(bgdata);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ bgval = *bgdata;
|
||||
+ kfree(bgdata);
|
||||
+
|
||||
+ ret = clk_prepare_enable(ac200->clk);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /*
|
||||
+ * There is no documentation on how long we have to wait before
|
||||
+ * executing first operation. Vendor driver sleeps for 40 ms.
|
||||
+ */
|
||||
+ msleep(40);
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
|
||||
+ if (ret)
|
||||
+ goto err;
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 1);
|
||||
+ if (ret)
|
||||
+ goto err;
|
||||
+
|
||||
+ if (bgval) {
|
||||
+ /* bandgap register is not documented */
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_BG_CTL,
|
||||
+ 0x8280 | bgval);
|
||||
+ if (ret)
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, ac200_cells,
|
||||
+ ARRAY_SIZE(ac200_cells), NULL, 0, NULL);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Failed to add MFD devices: %d\n", ret);
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err:
|
||||
+ clk_disable_unprepare(ac200->clk);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void ac200_i2c_remove(struct i2c_client *i2c)
|
||||
+{
|
||||
+ struct ac200_dev *ac200 = i2c_get_clientdata(i2c);
|
||||
+
|
||||
+ regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
|
||||
+
|
||||
+ clk_disable_unprepare(ac200->clk);
|
||||
+}
|
||||
+
|
||||
+static const struct i2c_device_id ac200_ids[] = {
|
||||
+ { "ac200", },
|
||||
+ { }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(i2c, ac200_ids);
|
||||
+
|
||||
+static const struct of_device_id ac200_of_match[] = {
|
||||
+ { .compatible = "x-powers,ac200" },
|
||||
+ { }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, ac200_of_match);
|
||||
+
|
||||
+static struct i2c_driver ac200_i2c_driver = {
|
||||
+ .driver = {
|
||||
+ .name = "ac200",
|
||||
+ .of_match_table = of_match_ptr(ac200_of_match),
|
||||
+ },
|
||||
+ .probe = ac200_i2c_probe,
|
||||
+ .remove = ac200_i2c_remove,
|
||||
+ .id_table = ac200_ids,
|
||||
+};
|
||||
+module_i2c_driver(ac200_i2c_driver);
|
||||
+
|
||||
+MODULE_DESCRIPTION("MFD core driver for AC200");
|
||||
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@gmail.com>");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
--
|
||||
Armbian
|
||||
|
@ -1,60 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Gonz=C3=A1lez?=
|
||||
<alejandro.gonzalez.correo@gmail.com>
|
||||
Date: Sun, 25 Aug 2019 17:05:58 +0200
|
||||
Subject: [PATCH] mmc: sunxi: fix unusuable eMMC on some H6 boards by disabling
|
||||
DDR
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Some Allwinner H6 boards have timing problems when dealing with
|
||||
DDR-capable eMMC cards. These boards include the Pine H64 and Tanix TX6.
|
||||
|
||||
These timing problems result in out of sync communication between the
|
||||
driver and the eMMC, which renders the memory unsuable for every
|
||||
operation but some basic commmands, like reading the status register.
|
||||
|
||||
The cause of these timing problems is not yet well known, but they go
|
||||
away by disabling DDR mode operation in the driver. Like on some H5
|
||||
boards, it might be that the traces are not precise enough to support
|
||||
these speeds. However, Jernej Skrabec compared the BSP driver with this
|
||||
driver, and found that the BSP driver configures pinctrl to operate at
|
||||
1.8 V when entering DDR mode (although 3.3 V operation is supported), while
|
||||
the mainline kernel lacks any mechanism to switch voltages dynamically.
|
||||
Finally, other possible cause might be some timing parameter that is
|
||||
different on the H6 with respect to other SoCs.
|
||||
|
||||
Therefore, as this fix works reliably, the kernel lacks the required
|
||||
dynamic pinctrl control for now and a slow eMMC is better than a not
|
||||
working eMMC, just disable DDR operation for now on H6-compatible
|
||||
devices.
|
||||
|
||||
Signed-off-by: Alejandro González <alejandro.gonzalez.correo@gmail.com>
|
||||
---
|
||||
drivers/mmc/host/sunxi-mmc.c | 9 ++++++---
|
||||
1 file changed, 6 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/mmc/host/sunxi-mmc.c
|
||||
+++ b/drivers/mmc/host/sunxi-mmc.c
|
||||
@@ -1421,14 +1421,17 @@ static int sunxi_mmc_probe(struct platfo
|
||||
|
||||
/*
|
||||
* Some H5 devices do not have signal traces precise enough to
|
||||
- * use HS DDR mode for their eMMC chips.
|
||||
+ * use HS DDR mode for their eMMC chips. Other H6 devices operate
|
||||
+ * unreliably on HS DDR mode, too.
|
||||
*
|
||||
* We still enable HS DDR modes for all the other controller
|
||||
- * variants that support them.
|
||||
+ * variants that support them properly.
|
||||
*/
|
||||
if ((host->cfg->clk_delays || host->use_new_timings) &&
|
||||
!of_device_is_compatible(pdev->dev.of_node,
|
||||
- "allwinner,sun50i-h5-emmc"))
|
||||
+ "allwinner,sun50i-h5-emmc") &&
|
||||
+ !of_device_is_compatible(pdev->dev.of_node,
|
||||
+ "allwinner,sun50i-h6-emmc"))
|
||||
mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
|
||||
|
||||
ret = mmc_of_parse(mmc);
|
@ -1,276 +0,0 @@
|
||||
From cbf68fb141747879e2e6c43584c1e1e3b4d77683 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Fri, 16 Aug 2019 16:38:57 +0200
|
||||
Subject: [PATCH 39/44] net: phy: Add support for AC200 EPHY
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
drivers/net/phy/Kconfig | 7 ++
|
||||
drivers/net/phy/Makefile | 1 +
|
||||
drivers/net/phy/ac200.c | 234 +++++++++++++++++++++++++++++++++++++++
|
||||
3 files changed, 242 insertions(+)
|
||||
create mode 100644 drivers/net/phy/ac200.c
|
||||
|
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -63,6 +63,13 @@ config SFP
|
||||
|
||||
comment "MII PHY device drivers"
|
||||
|
||||
+config AC200_PHY
|
||||
+ tristate "AC200 EPHY"
|
||||
+ depends on NVMEM
|
||||
+ depends on OF
|
||||
+ help
|
||||
+ Fast ethernet PHY as found in X-Powers AC200 multi-function device.
|
||||
+
|
||||
config AMD_PHY
|
||||
tristate "AMD PHYs"
|
||||
help
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -30,6 +30,7 @@ obj-$(CONFIG_SFP) += sfp.o
|
||||
sfp-obj-$(CONFIG_SFP) += sfp-bus.o
|
||||
obj-y += $(sfp-obj-y) $(sfp-obj-m)
|
||||
|
||||
+obj-$(CONFIG_AC200_PHY) += ac200.o
|
||||
obj-$(CONFIG_ADIN_PHY) += adin.o
|
||||
obj-$(CONFIG_AMD_PHY) += amd.o
|
||||
aquantia-objs += aquantia_main.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/phy/ac200.c
|
||||
@@ -0,0 +1,234 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/**
|
||||
+ * Driver for AC200 Ethernet PHY
|
||||
+ *
|
||||
+ * Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/mfd/ac200.h>
|
||||
+#include <linux/nvmem-consumer.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/phy.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+
|
||||
+#define AC200_EPHY_ID 0x00441400
|
||||
+#define AC200_EPHY_ID_MASK 0x0ffffff0
|
||||
+
|
||||
+/* macros for system ephy control 0 register */
|
||||
+#define AC200_EPHY_RESET_INVALID BIT(0)
|
||||
+#define AC200_EPHY_SYSCLK_GATING BIT(1)
|
||||
+
|
||||
+/* macros for system ephy control 1 register */
|
||||
+#define AC200_EPHY_E_EPHY_MII_IO_EN BIT(0)
|
||||
+#define AC200_EPHY_E_LNK_LED_IO_EN BIT(1)
|
||||
+#define AC200_EPHY_E_SPD_LED_IO_EN BIT(2)
|
||||
+#define AC200_EPHY_E_DPX_LED_IO_EN BIT(3)
|
||||
+
|
||||
+/* macros for ephy control register */
|
||||
+#define AC200_EPHY_SHUTDOWN BIT(0)
|
||||
+#define AC200_EPHY_LED_POL BIT(1)
|
||||
+#define AC200_EPHY_CLK_SEL BIT(2)
|
||||
+#define AC200_EPHY_ADDR(x) (((x) & 0x1F) << 4)
|
||||
+#define AC200_EPHY_XMII_SEL BIT(11)
|
||||
+#define AC200_EPHY_CALIB(x) (((x) & 0xF) << 12)
|
||||
+
|
||||
+struct ac200_ephy_dev {
|
||||
+ struct phy_driver *ephy;
|
||||
+ struct regmap *regmap;
|
||||
+};
|
||||
+
|
||||
+static char *ac200_phy_name = "AC200 EPHY";
|
||||
+
|
||||
+static void disable_intelligent_ieee(struct phy_device *phydev)
|
||||
+{
|
||||
+ unsigned int value;
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0100); /* switch to page 1 */
|
||||
+ value = phy_read(phydev, 0x17);
|
||||
+ value &= ~BIT(3); /* disable IEEE */
|
||||
+ phy_write(phydev, 0x17, value);
|
||||
+ phy_write(phydev, 0x1f, 0x0000); /* switch to page 0 */
|
||||
+}
|
||||
+
|
||||
+static void disable_802_3az_ieee(struct phy_device *phydev)
|
||||
+{
|
||||
+ unsigned int value;
|
||||
+
|
||||
+ phy_write(phydev, 0xd, 0x7);
|
||||
+ phy_write(phydev, 0xe, 0x3c);
|
||||
+ phy_write(phydev, 0xd, BIT(14) | 0x7);
|
||||
+ value = phy_read(phydev, 0xe);
|
||||
+ value &= ~BIT(1);
|
||||
+ phy_write(phydev, 0xd, 0x7);
|
||||
+ phy_write(phydev, 0xe, 0x3c);
|
||||
+ phy_write(phydev, 0xd, BIT(14) | 0x7);
|
||||
+ phy_write(phydev, 0xe, value);
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0200); /* switch to page 2 */
|
||||
+ phy_write(phydev, 0x18, 0x0000);
|
||||
+}
|
||||
+
|
||||
+static int ac200_ephy_config_init(struct phy_device *phydev)
|
||||
+{
|
||||
+ const struct ac200_ephy_dev *priv = phydev->drv->driver_data;
|
||||
+ unsigned int value;
|
||||
+ int ret;
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0100); /* Switch to Page 1 */
|
||||
+ phy_write(phydev, 0x12, 0x4824); /* Disable APS */
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0200); /* Switch to Page 2 */
|
||||
+ phy_write(phydev, 0x18, 0x0000); /* PHYAFE TRX optimization */
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0600); /* Switch to Page 6 */
|
||||
+ phy_write(phydev, 0x14, 0x708f); /* PHYAFE TX optimization */
|
||||
+ phy_write(phydev, 0x13, 0xF000); /* PHYAFE RX optimization */
|
||||
+ phy_write(phydev, 0x15, 0x1530);
|
||||
+
|
||||
+ phy_write(phydev, 0x1f, 0x0800); /* Switch to Page 6 */
|
||||
+ phy_write(phydev, 0x18, 0x00bc); /* PHYAFE TRX optimization */
|
||||
+
|
||||
+ disable_intelligent_ieee(phydev); /* Disable Intelligent IEEE */
|
||||
+ disable_802_3az_ieee(phydev); /* Disable 802.3az IEEE */
|
||||
+ phy_write(phydev, 0x1f, 0x0000); /* Switch to Page 0 */
|
||||
+
|
||||
+ value = (phydev->interface == PHY_INTERFACE_MODE_RMII) ?
|
||||
+ AC200_EPHY_XMII_SEL : 0;
|
||||
+ ret = regmap_update_bits(priv->regmap, AC200_EPHY_CTL,
|
||||
+ AC200_EPHY_XMII_SEL, value);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* FIXME: This is probably H6 specific */
|
||||
+ value = phy_read(phydev, 0x13);
|
||||
+ value |= BIT(12);
|
||||
+ phy_write(phydev, 0x13, value);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct mdio_device_id __maybe_unused ac200_ephy_phy_tbl[] = {
|
||||
+ { AC200_EPHY_ID, AC200_EPHY_ID_MASK },
|
||||
+ { /* sentinel */ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(mdio, ac200_ephy_phy_tbl);
|
||||
+
|
||||
+static int ac200_ephy_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct ac200_dev *ac200 = dev_get_drvdata(pdev->dev.parent);
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct ac200_ephy_dev *priv;
|
||||
+ struct nvmem_cell *calcell;
|
||||
+ struct phy_driver *ephy;
|
||||
+ u16 *caldata, calib;
|
||||
+ size_t callen;
|
||||
+ int ret;
|
||||
+
|
||||
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
+ if (!priv)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ ephy = devm_kzalloc(dev, sizeof(*ephy), GFP_KERNEL);
|
||||
+ if (!ephy)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ calcell = devm_nvmem_cell_get(dev, "ephy_calib");
|
||||
+ if (IS_ERR(calcell)) {
|
||||
+ dev_err(dev, "Unable to find calibration data!\n");
|
||||
+ return PTR_ERR(calcell);
|
||||
+ }
|
||||
+
|
||||
+ caldata = nvmem_cell_read(calcell, &callen);
|
||||
+ if (IS_ERR(caldata)) {
|
||||
+ dev_err(dev, "Unable to read calibration data!\n");
|
||||
+ return PTR_ERR(caldata);
|
||||
+ }
|
||||
+
|
||||
+ if (callen != 2) {
|
||||
+ dev_err(dev, "Calibration data has wrong length: 2 != %lu\n",
|
||||
+ callen);
|
||||
+ kfree(caldata);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ calib = *caldata + 3;
|
||||
+ kfree(caldata);
|
||||
+
|
||||
+ ephy->phy_id = AC200_EPHY_ID;
|
||||
+ ephy->phy_id_mask = AC200_EPHY_ID_MASK;
|
||||
+ ephy->name = ac200_phy_name;
|
||||
+ ephy->driver_data = priv;
|
||||
+ ephy->soft_reset = genphy_soft_reset;
|
||||
+ ephy->config_init = ac200_ephy_config_init;
|
||||
+ ephy->suspend = genphy_suspend;
|
||||
+ ephy->resume = genphy_resume;
|
||||
+
|
||||
+ priv->ephy = ephy;
|
||||
+ priv->regmap = ac200->regmap;
|
||||
+ platform_set_drvdata(pdev, priv);
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_EPHY_CTL0,
|
||||
+ AC200_EPHY_RESET_INVALID |
|
||||
+ AC200_EPHY_SYSCLK_GATING);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_SYS_EPHY_CTL1,
|
||||
+ AC200_EPHY_E_EPHY_MII_IO_EN |
|
||||
+ AC200_EPHY_E_LNK_LED_IO_EN |
|
||||
+ AC200_EPHY_E_SPD_LED_IO_EN |
|
||||
+ AC200_EPHY_E_DPX_LED_IO_EN);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(ac200->regmap, AC200_EPHY_CTL,
|
||||
+ AC200_EPHY_LED_POL |
|
||||
+ AC200_EPHY_CLK_SEL |
|
||||
+ AC200_EPHY_ADDR(1) |
|
||||
+ AC200_EPHY_CALIB(calib));
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = phy_driver_register(priv->ephy, THIS_MODULE);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "Unable to register phy\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int ac200_ephy_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct ac200_ephy_dev *priv = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ phy_driver_unregister(priv->ephy);
|
||||
+
|
||||
+ regmap_write(priv->regmap, AC200_EPHY_CTL, AC200_EPHY_SHUTDOWN);
|
||||
+ regmap_write(priv->regmap, AC200_SYS_EPHY_CTL1, 0);
|
||||
+ regmap_write(priv->regmap, AC200_SYS_EPHY_CTL0, 0);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id ac200_ephy_match[] = {
|
||||
+ { .compatible = "x-powers,ac200-ephy" },
|
||||
+ { /* sentinel */ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, ac200_ephy_match);
|
||||
+
|
||||
+static struct platform_driver ac200_ephy_driver = {
|
||||
+ .probe = ac200_ephy_probe,
|
||||
+ .remove = ac200_ephy_remove,
|
||||
+ .driver = {
|
||||
+ .name = "ac200-ephy",
|
||||
+ .of_match_table = ac200_ephy_match,
|
||||
+ },
|
||||
+};
|
||||
+module_platform_driver(ac200_ephy_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
|
||||
+MODULE_DESCRIPTION("AC200 Ethernet PHY driver");
|
||||
+MODULE_LICENSE("GPL");
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user