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MIPS: MIPS32r1: Decoder bit reader function optimized. PATCH [1/6]

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Solved unaligned load and added MIPS32r1 support for VP8LoadNewBytes.

Change-Id: I7782e668a8f2b9dace0ab6afeaff3449bbc7d90b
This commit is contained in:
Jovan Zelincevic 2013-12-25 11:41:45 +01:00 committed by Djordje Pesut
parent c741183c10
commit 4d493f8db2
1 changed files with 14 additions and 0 deletions
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14
src/utils/bit_reader.h
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@ -73,6 +73,8 @@ extern "C" {
#define BITS 56
#elif defined(__arm__) || defined(_M_ARM) // ARM
#define BITS 24
#elif defined(__mips__) // MIPS
#define BITS 24
#else // reasonable default
#define BITS 24
#endif
@ -154,7 +156,19 @@ static WEBP_INLINE void VP8LoadNewBytes(VP8BitReader* const br) {
if (br->buf_ + sizeof(lbit_t) <= br->buf_end_) {
// convert memory type to register type (with some zero'ing!)
bit_t bits;
#if defined(__mips__) // MIPS
// This is needed because of un-aligned read.
lbit_t in_bits;
lbit_t* p_buf_ = (lbit_t*)br->buf_;
__asm__ volatile(
"ulw %[in_bits], 0(%[p_buf_]) \n\t"
: [in_bits]"=r"(in_bits)
: [p_buf_]"r"(p_buf_)
: "memory"
);
#else
const lbit_t in_bits = *(const lbit_t*)br->buf_;
#endif
br->buf_ += (BITS) >> 3;
#if !defined(__BIG_ENDIAN__)
#if (BITS > 32)