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73 lines
2.1 KiB
C
73 lines
2.1 KiB
C
/*
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* Broadcom PCIe 1570 webcam driver
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* Some of the register defines are taken from the crystalhd driver
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*
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* Copyright (C) 2014 Patrik Jakobsson (patrik.r.jakobsson@gmail.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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*/
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#ifndef _BCWC_REG_H
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#define _BCWC_REG_H
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/* S2 IO reg */
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#define S2_PCIE_LINK_D000 0xd000
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#define S2_PCIE_LINK_D120 0xd120
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#define S2_PCIE_LINK_D124 0xd124
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#define S2_PCIE_LINK_D128 0xd128
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#define S2_PCIE_LINK_D12C 0xd12c
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/* These are written to 0x203 before DDR soc init */
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#define S2_DDR_REG_1100 0x1100
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#define S2_DDR_REG_1104 0x1104
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#define S2_DDR_REG_1108 0x1108
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#define S2_DDR_REG_110c 0x110c
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#define S2_DDR_REG_1110 0x1110
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#define S2_DDR_REG_1114 0x1114
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#define S2_DDR_REG_1118 0x1118
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#define S2_DDR_REG_111C 0x111c
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#define DDR_PHY_REG_BASE 0x2800
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#define DDR_PHY_NUM_REGS 127 /* Found in AppleCamIn::Start() */
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/* On iomem with pointer at ...fill me in... */
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#define S2_PLL_STATUS_04 0x04
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#define S2_PLL_REFCLK (1 << 3) /* 1 = 25MHz, 0 = 24MHz */
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#define S2_PLL_STATUS_0C 0x0c /* Register is called CMU_R_PLL_STS_MEMADDR */
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#define S2_PLL_STATUS_LOCKED (1 << 7) /* 1 = PLL locked, 0 = PLL not locked */
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#define S2_PLL_STATUS_A8 0xa8
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#define S2_PLL_BYPASS (1 << 0) /* 1 = bypass, 0 = non-bypass */
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#define S2_PLL_CTRL_14 0x0014
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#define S2_PLL_CTRL_20 0x0020
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#define S2_PLL_CTRL_24 0x0024
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#define S2_PLL_CTRL_2C 0x002c
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#define S2_PLL_CTRL_9C 0x009c
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#define S2_PLL_CTRL_100 0x0100
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#define S2_PLL_CTRL_510 0x0510
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/* On iomem with pointer at 0x0ff0 (Bar 4: 1MB) */
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#define IRQ_IPC_NUM_CHAN 0xc3000
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#define IRQ_IPC_QUEUE_SIZE 0xc3004
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#define IRQ_REG_08 0xc3008
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#define IRQ_FW_HEAP_SIZE 0xc300c
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#define IRQ_REG_10 0xc3010
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#define IRQ_REG_14 0xc3014
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#define IRQ_REG_18 0xc3018
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#define IRQ_REG_1C 0xc301c
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#define IRQ_REG_40004 0x40004
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#define IRQ_REG_40008 0x40008
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#define IRQ_REG_41000 0x41000
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#define IRQ_REG_41024 0x41024
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#define IRQ_REG_RANGE_START 0x0128
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#define IRQ_REG_RANGE_END 0x0220
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#endif
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