mirror of
https://github.com/patjak/facetimehd.git
synced 2026-04-09 19:10:01 +02:00
isp: Move isp code to it's own file
Also rename some registers Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
This commit is contained in:
2
Makefile
2
Makefile
@@ -1,4 +1,4 @@
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bcwc_pcie-objs := bcwc_ddr.o bcwc_hw.o bcwc_drv.o
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bcwc_pcie-objs := bcwc_ddr.o bcwc_hw.o bcwc_drv.o isp.o
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obj-m := bcwc_pcie.o
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KVERSION := $(shell uname -r)
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95
bcwc_hw.c
95
bcwc_hw.c
@@ -21,6 +21,7 @@
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#include "bcwc_drv.h"
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#include "bcwc_hw.h"
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#include "bcwc_ddr.h"
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#include "isp.h"
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/* FIXME: Double check these */
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static u32 ddr_phy_reg_map[] = {
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@@ -657,100 +658,6 @@ static int bcwc_hw_ddr_phy_save_regs(struct bcwc_private *dev_priv)
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return 0;
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}
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static int bcwc_hw_isp_init(struct bcwc_private *dev_priv)
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{
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u32 num_channels, queue_size;
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u32 reg;
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int i, retries;
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BCWC_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_IPC_QUEUE_SIZE);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_08);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_10);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_14);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_18);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_1C);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
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bcwc_hw_pci_post(dev_priv);
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/*
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* Probably the IPC queue
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* FIXME: Check if we can do 64bit writes on PCIe
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*/
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for (i = IRQ_REG_RANGE_START; i <= IRQ_REG_RANGE_END; i += 8) {
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BCWC_ISP_REG_WRITE(0xffffff, i);
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BCWC_ISP_REG_WRITE(0x000000, i + 4);
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}
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE( 0x80000000, ISP_REG_40008);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0x1, ISP_REG_40004);
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bcwc_hw_pci_post(dev_priv);
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for (retries = 0; retries < 1000; retries++) {
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reg = BCWC_ISP_REG_READ(ISP_REG_40004);
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if ((reg & 0xff) == 0xf0)
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break;
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udelay(10);
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}
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if (retries >= 1000) {
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dev_info(&dev_priv->pdev->dev, "Init failed! No wake signal\n");
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return -EIO;
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}
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BCWC_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
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num_channels = BCWC_ISP_REG_READ(ISP_IPC_NUM_CHAN) + 1;
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queue_size = BCWC_ISP_REG_READ(ISP_IPC_QUEUE_SIZE);
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dev_info(&dev_priv->pdev->dev,
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"Number of IPC channels: %u, queue size: %u\n",
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num_channels, queue_size);
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if (num_channels > 32) {
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dev_info(&dev_priv->pdev->dev, "Too many IPC channels: %u\n",
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num_channels);
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return -EIO;
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}
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/*
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bcwc_alloc_dev_mem(queue_size, &ret, 0);
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*/
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/* Firmware must fit in 4194304 bytes */
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reg = BCWC_ISP_REG_READ(ISP_FW_HEAP_SIZE);
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if (reg > 0x400000) {
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dev_info(&dev_priv->pdev->dev,
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"Firmware request size too big (%u bytes)\n",
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reg);
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return -ENOMEM;
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}
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dev_info(&dev_priv->pdev->dev, "Firmware request size: %u\n", reg);
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return 0;
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}
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static int bcwc_hw_irq_enable(struct bcwc_private *dev_priv)
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{
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return 0;
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14
bcwc_reg.h
14
bcwc_reg.h
@@ -140,18 +140,18 @@
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/* On iomem with pointer at 0x0ff0 (Bar 4: 1MB) */
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#define ISP_IPC_NUM_CHAN 0xc3000
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#define ISP_IPC_QUEUE_SIZE 0xc3004
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#define ISP_REG_08 0xc3008
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#define ISP_REG_C3008 0xc3008
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#define ISP_FW_HEAP_SIZE 0xc300c
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#define ISP_REG_10 0xc3010
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#define ISP_REG_14 0xc3014
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#define ISP_REG_18 0xc3018
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#define ISP_REG_1C 0xc301c
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#define ISP_REG_C3010 0xc3010
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#define ISP_REG_C3014 0xc3014
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#define ISP_REG_C3018 0xc3018
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#define ISP_REG_C301C 0xc301c
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#define ISP_REG_40004 0x40004
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#define ISP_REG_40008 0x40008
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#define ISP_REG_41000 0x41000
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#define ISP_REG_41024 0x41024
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#define IRQ_REG_RANGE_START 0x0128
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#define IRQ_REG_RANGE_END 0x0220
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#define ISP_IPC_CHAN_START 0x0128
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#define ISP_IPC_CHAN_END 0x0220
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#endif
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117
isp.c
Normal file
117
isp.c
Normal file
@@ -0,0 +1,117 @@
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/*
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* Broadcom PCIe 1570 webcam driver
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* Some of the register defines are taken from the crystalhd driver
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*
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* Copyright (C) 2014 Patrik Jakobsson (patrik.r.jakobsson@gmail.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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*/
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#include <linux/delay.h>
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#include "bcwc_drv.h"
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#include "bcwc_hw.h"
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#include "bcwc_reg.h"
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#include "isp.h"
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int isp_init(struct bcwc_private *dev_priv)
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{
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u32 num_channels, queue_size;
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u32 reg;
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int i, retries;
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BCWC_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_IPC_QUEUE_SIZE);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_C3008);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_C3010);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_C3014);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_C3018);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0, ISP_REG_C301C);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
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bcwc_hw_pci_post(dev_priv);
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/*
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* Probably the IPC queue
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* FIXME: Check if we can do 64bit writes on PCIe
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*/
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for (i = ISP_IPC_CHAN_START; i <= ISP_IPC_CHAN_END; i += 8) {
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BCWC_ISP_REG_WRITE(0xffffffff, i);
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BCWC_ISP_REG_WRITE(0, i + 4);
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}
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE( 0x80000000, ISP_REG_40008);
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bcwc_hw_pci_post(dev_priv);
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BCWC_ISP_REG_WRITE(0x1, ISP_REG_40004);
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bcwc_hw_pci_post(dev_priv);
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for (retries = 0; retries < 1000; retries++) {
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reg = BCWC_ISP_REG_READ(ISP_REG_40004);
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if ((reg & 0xff) == 0xf0)
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break;
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udelay(10);
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}
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if (retries >= 1000) {
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dev_info(&dev_priv->pdev->dev, "Init failed! No wake signal\n");
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return -EIO;
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}
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BCWC_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
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num_channels = BCWC_ISP_REG_READ(ISP_IPC_NUM_CHAN) + 1;
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queue_size = BCWC_ISP_REG_READ(ISP_IPC_QUEUE_SIZE);
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dev_info(&dev_priv->pdev->dev,
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"Number of IPC channels: %u, queue size: %u\n",
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num_channels, queue_size);
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if (num_channels > 32) {
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dev_info(&dev_priv->pdev->dev, "Too many IPC channels: %u\n",
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num_channels);
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return -EIO;
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}
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/*
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bcwc_alloc_dev_mem(queue_size, &ret, 0);
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*/
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/* Firmware must fit in 4194304 bytes */
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reg = BCWC_ISP_REG_READ(ISP_FW_HEAP_SIZE);
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if (reg > 0x400000) {
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dev_info(&dev_priv->pdev->dev,
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"Firmware request size too big (%u bytes)\n",
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reg);
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return -ENOMEM;
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}
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dev_info(&dev_priv->pdev->dev, "Firmware request size: %u\n", reg);
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return 0;
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}
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int isp_uninit(struct bcwc_private *dev_priv)
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{
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return 0;
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}
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18
isp.h
Normal file
18
isp.h
Normal file
@@ -0,0 +1,18 @@
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/*
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* Broadcom PCIe 1570 webcam driver
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* Some of the register defines are taken from the crystalhd driver
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*
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* Copyright (C) 2014 Patrik Jakobsson (patrik.r.jakobsson@gmail.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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*/
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#ifndef _ISP_H
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#define _ISP_H
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extern int isp_init(struct bcwc_private *dev_priv);
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#endif
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