York Sun e32d59a2fa driver/ddr/fsl: Add sync of refresh ...

Add sync of refresh for multiple DDR controllers. DDRC initialization
needs to complete first. Code is re-ordered to keep refresh close.

Signed-off-by: York Sun <yorksun@freescale.com>

2015-02-24 13:09:42 -08:00

..

fsl

driver/ddr/fsl: Add sync of refresh

2015-02-24 13:09:42 -08:00

mvebu

arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdr

2015-02-06 17:25:03 +01:00