Paul Burton a95800e881 MIPS: Fix invalidate_dcache_range to operate on L1 Dcache ...

Commit fb64cda579 ("MIPS: Abstract cache op loops with a macro")
accidentally modified invalidate_dcache_range to operate on the L1
Icache instead of the Dcache. Fix the cache op used to operate on the
Dcache.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: fb64cda579 ("MIPS: Abstract cache op loops with a macro")

2016-06-10 12:27:29 +02:00

..

ashldi3.c

dm: mips: Import libgcc components from Linux

2012-08-17 20:13:48 +02:00

ashrdi3.c

dm: mips: Import libgcc components from Linux

2012-08-17 20:13:48 +02:00

bootm.c

MIPS: bootm: Add fixup of '/memory' node.

2016-04-19 13:21:48 +02:00

cache_init.S

MIPS: Split I & D cache line size config

2016-05-31 09:44:24 +02:00

cache.c

MIPS: Fix invalidate_dcache_range to operate on L1 Dcache

2016-06-10 12:27:29 +02:00

libgcc.h

dm: mips: Import libgcc components from Linux

2012-08-17 20:13:48 +02:00

lshrdi3.c

dm: mips: Import libgcc components from Linux

2012-08-17 20:13:48 +02:00

Makefile

MIPS: Support dynamic I/O port base address

2016-02-01 22:13:25 +01:00