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	coreboot.c and coreboot_pci.c don't contain board specific but only coreboot specific code. Hence move it to the coreboot directory in arch/x86/cpu (which should probably be moved out of cpu/ in another commit) Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			88 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			88 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2011 The Chromium OS Authors.
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|  * (C) Copyright 2008
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|  * Graeme Russ, graeme.russ@gmail.com.
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <asm/u-boot-x86.h>
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| #include <flash.h>
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| #include <netdev.h>
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| #include <asm/arch-coreboot/tables.h>
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| #include <asm/arch-coreboot/sysinfo.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
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| 
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| /*
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|  * Miscellaneous platform dependent initializations
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|  */
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| int cpu_init_f(void)
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| {
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| 	int ret = get_coreboot_info(&lib_sysinfo);
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| 	if (ret != 0)
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| 		printf("Failed to parse coreboot tables.\n");
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| 	return ret;
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| }
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| 
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| int board_early_init_f(void)
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| {
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| 	return 0;
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| }
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| 
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| int board_early_init_r(void)
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| {
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| 	/* CPU Speed to 100MHz */
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| 	gd->cpu_clk = 100000000;
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| 
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| 	/* Crystal is 33.000MHz */
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| 	gd->bus_clk = 33000000;
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| 
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| 	return 0;
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| }
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| 
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| void show_boot_progress(int val)
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| {
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| }
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| 
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| 
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| int last_stage_init(void)
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| {
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| 	return 0;
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| }
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| 
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| #ifndef CONFIG_SYS_NO_FLASH
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| ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| int board_eth_init(bd_t *bis)
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| {
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| 	return pci_eth_init(bis);
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| }
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| 
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| void setup_pcat_compatibility()
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| {
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| }
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