Stefan Roese e1d1429b49 ppc4xx: Fix GPIO configuration for pcs440ep ...

The SRD0_PFC0 register was not configured correctly to enable the GPIO's
49-63 for GPIO. They have been configured as trace signals. This patch
fixes this by clearing the corresponding bit.

Signed-off-by: Stefan Roese <sr@denx.de>

2008-02-04 11:47:40 +01:00

..

config.mk

[PCS440EP] upgrade the PCS440EP board:

2007-06-22 19:11:54 +02:00

flash.c

[PCS440EP] - Show on the DIAG LEDs, if the SHA1 check failed

2007-07-11 18:39:11 +02:00

init.S

[PCS440EP] upgrade the PCS440EP board:

2007-06-22 19:11:54 +02:00

Makefile

Move "ar" flags to config.mk to allow for silent "make -s"

2006-10-09 01:02:05 +02:00

pcs440ep.c

ppc4xx: Fix GPIO configuration for pcs440ep

2008-02-04 11:47:40 +01:00

u-boot.lds

Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections

2008-01-12 20:31:39 +01:00