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	- Add IXP4xx NPE ethernet MAC support - Add support for Intel IXDPG425 board - Add support for Prodrive PDNB3 board - Add IRQ support Patch by Stefan Roese, 23 May 2006 [This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still sufferes from licensing issues. Blame Intel.]
		
			
				
	
	
		
			250 lines
		
	
	
		
			5.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			250 lines
		
	
	
		
			5.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2006
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|  * Stefan Roese, DENX Software Engineering, sr@denx.de.
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Marius Groeger <mgroeger@sysgo.de>
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Alex Zuepke <azu@sysgo.de>
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <asm/arch/ixp425.h>
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| 
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| #ifdef CONFIG_USE_IRQ
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| /*
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|  * When interrupts are enabled, use timer 2 for time/delay generation...
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|  */
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| 
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| #define FREQ		66666666
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| #define CLOCK_TICK_RATE	(((FREQ / CFG_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CFG_HZ)
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| #define LATCH		((CLOCK_TICK_RATE + CFG_HZ/2) / CFG_HZ)	/* For divider */
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| 
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| struct _irq_handler {
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| 	void                *m_data;
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| 	void (*m_func)( void *data);
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| };
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| 
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| static struct _irq_handler IRQ_HANDLER[N_IRQS];
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| 
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| static volatile ulong timestamp;
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| 
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| /* enable IRQ/FIQ interrupts */
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| void enable_interrupts(void)
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| {
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| 	unsigned long temp;
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| 	__asm__ __volatile__("mrs %0, cpsr\n"
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| 			     "bic %0, %0, #0x80\n"
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| 			     "msr cpsr_c, %0"
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| 			     : "=r" (temp)
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| 			     :
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| 			     : "memory");
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| }
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| 
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| /*
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|  * disable IRQ/FIQ interrupts
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|  * returns true if interrupts had been enabled before we disabled them
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|  */
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| int disable_interrupts(void)
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| {
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| 	unsigned long old,temp;
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| 	__asm__ __volatile__("mrs %0, cpsr\n"
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| 			     "orr %1, %0, #0x80\n"
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| 			     "msr cpsr_c, %1"
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| 			     : "=r" (old), "=r" (temp)
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| 			     :
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| 			     : "memory");
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| 	return (old & 0x80) == 0;
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| }
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| 
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| static void default_isr(void *data)
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| {
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| 	printf("default_isr():  called for IRQ %d, Interrupt Status=%x PR=%x\n",
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| 	       (int)data, *IXP425_ICIP, *IXP425_ICIH);
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| }
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| 
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| static int next_irq(void)
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| {
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| 	return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1);
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| }
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| 
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| static void timer_isr(void *data)
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| {
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| 	unsigned int *pTime = (unsigned int *)data;
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| 
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| 	(*pTime)++;
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| 
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| 	/*
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| 	 * Reset IRQ source
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| 	 */
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| 	*IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
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| }
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| 
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| ulong get_timer (ulong base)
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| {
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| 	return timestamp - base;
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| }
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| 
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| void reset_timer (void)
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| {
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| 	timestamp = 0;
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| }
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| 
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| #else /* #ifdef CONFIG_USE_IRQ */
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| void enable_interrupts (void)
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| {
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| 	return;
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| }
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| int disable_interrupts (void)
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| {
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| 	return 0;
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| }
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| #endif /* #ifdef CONFIG_USE_IRQ */
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| 
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| void bad_mode (void)
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| {
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| 	panic ("Resetting CPU ...\n");
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| 	reset_cpu (0);
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| }
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| 
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| void show_regs (struct pt_regs *regs)
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| {
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| 	unsigned long flags;
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| 	const char *processor_modes[] = {
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| 	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
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| 	"UK4_26",	"UK5_26",	"UK6_26",	"UK7_26",
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| 	"UK8_26",	"UK9_26",	"UK10_26",	"UK11_26",
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| 	"UK12_26",	"UK13_26",	"UK14_26",	"UK15_26",
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| 	"USER_32",	"FIQ_32",	"IRQ_32",	"SVC_32",
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| 	"UK4_32",	"UK5_32",	"UK6_32",	"ABT_32",
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| 	"UK8_32",	"UK9_32",	"UK10_32",	"UND_32",
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| 	"UK12_32",	"UK13_32",	"UK14_32",	"SYS_32"
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| 	};
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| 
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| 	flags = condition_codes (regs);
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| 
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| 	printf ("pc : [<%08lx>]    lr : [<%08lx>]\n"
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| 		"sp : %08lx  ip : %08lx  fp : %08lx\n",
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| 		instruction_pointer (regs),
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| 		regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
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| 	printf ("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
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| 		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
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| 	printf ("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
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| 		regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
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| 	printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
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| 		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
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| 	printf ("Flags: %c%c%c%c",
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| 		flags & CC_N_BIT ? 'N' : 'n',
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| 		flags & CC_Z_BIT ? 'Z' : 'z',
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| 		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
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| 	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
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| 		interrupts_enabled (regs) ? "on" : "off",
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| 		fast_interrupts_enabled (regs) ? "on" : "off",
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| 		processor_modes[processor_mode (regs)],
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| 		thumb_mode (regs) ? " (T)" : "");
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| }
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| 
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| void do_undefined_instruction (struct pt_regs *pt_regs)
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| {
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| 	printf ("undefined instruction\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_software_interrupt (struct pt_regs *pt_regs)
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| {
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| 	printf ("software interrupt\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_prefetch_abort (struct pt_regs *pt_regs)
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| {
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| 	printf ("prefetch abort\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_data_abort (struct pt_regs *pt_regs)
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| {
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| 	printf ("data abort\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_not_used (struct pt_regs *pt_regs)
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| {
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| 	printf ("not used\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_fiq (struct pt_regs *pt_regs)
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| {
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| 	printf ("fast interrupt request\n");
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| 	show_regs (pt_regs);
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| 	printf("IRQ=%08lx FIQ=%08lx\n", *IXP425_ICIH, *IXP425_ICFH);
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| }
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| 
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| void do_irq (struct pt_regs *pt_regs)
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| {
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| #ifdef CONFIG_USE_IRQ
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| 	int irq = next_irq();
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| 
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| 	IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data);
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| #else
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| 	printf ("interrupt request\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| #endif
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| }
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| 
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| int interrupt_init (void)
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| {
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| #ifdef CONFIG_USE_IRQ
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| 	int i;
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| 
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| 	/* install default interrupt handlers */
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| 	for (i = 0; i < N_IRQS; i++) {
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| 		IRQ_HANDLER[i].m_data = (void *)i;
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| 		IRQ_HANDLER[i].m_func = default_isr;
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| 	}
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| 
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| 	/* install interrupt handler for timer */
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| 	IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp;
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| 	IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr;
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| 
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| 	/* setup the Timer counter value */
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| 	*IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
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| 
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| 	/* configure interrupts for IRQ mode */
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| 	*IXP425_ICLR = 0x00000000;
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| 
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| 	/* enable timer irq */
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| 	*IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
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| #endif
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| 
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| 	return (0);
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| }
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