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affd4a9fa0
These work reasonable well, but there are a few errors: - Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also Signed-off-by: Simon Glass <sjg@chromium.org>
22 lines
549 B
C
22 lines
549 B
C
/*
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* Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_HARDWARE_H
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#define _ASM_ARCH_HARDWARE_H
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#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set))
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#define RK_SETBITS(set) RK_CLRSETBITS(0, set)
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#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)
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#define TIMER7_BASE 0xff810020
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#define rk_clrsetreg(addr, clr, set) \
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writel(((clr) | (set)) << 16 | (set), addr)
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#define rk_clrreg(addr, clr) writel((clr) << 16, addr)
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#define rk_setreg(addr, set) writel((set) << 16 | (set), addr)
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#endif
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