Calvin Johnson ac0ba47b9c armv8: layerscape: csu: enable ns access to PFE registers ...

Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

2018-03-22 15:05:30 -05:00

..

clock.h

common: freescale: Move arch-specific declarations

2017-06-05 12:30:55 -04:00

config.h

armv8: layerscape: Allocate 66 MB DDR for secure memory

2017-10-27 08:47:14 -07:00

cpu.h

armv8: fsl: ifc: Put IFC related code under CONFIG_FSL_IFC

2017-09-22 12:45:17 -07:00

fdt.h

…

fsl_serdes.h

armv8: lsch3: Add serdes and DDR voltage setup

2018-01-23 11:18:12 -08:00

immap_lsch2.h

armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC

2018-03-22 15:05:30 -05:00

immap_lsch3.h

board: common: vid: Add support for LTC3882 voltage regulator chip

2018-01-23 11:19:56 -08:00

imx-regs.h

…

mmu.h

…

mp.h

armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64

2017-08-01 08:28:56 -07:00

ns_access.h

armv8: layerscape: csu: enable ns access to PFE registers

2018-03-22 15:05:30 -05:00

ppa.h

fsl-layerscape/ppa: cleanup ppa.h

2017-03-28 08:59:47 -07:00

soc.h

armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC

2018-03-22 15:05:30 -05:00

speed.h

drivers/misc: Share qbman init between archs

2018-01-10 12:28:47 -08:00

stream_id_lsch2.h

arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2

2017-03-28 10:47:16 -07:00

stream_id_lsch3.h

armv8: ls1088a: Add NXP LS1088A SoC support

2017-09-11 08:00:13 -07:00