Jagannadha Sutradharudu Teki ec4b73f09c fpga: zynqpl: Add dcache flush support ...

Buffers must be cache and dma aligned.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

2013-11-06 09:15:12 +01:00

..

ACEX1K.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

altera.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

cyclon2.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

fpga.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

ivm_core.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

lattice.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

Makefile

drivers: convert makefiles to Kbuild style

2013-10-31 13:26:01 -04:00

spartan2.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

spartan3.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

stratixII.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

virtex2.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

xilinx.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

zynqpl.c

fpga: zynqpl: Add dcache flush support

2013-11-06 09:15:12 +01:00