York Sun dc1437afd7 driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation ...

wwt_bg should match rrt_bg. It was a typo in driver.

Signed-off-by: York Sun <yorksun@freescale.com>

2015-02-24 13:09:26 -08:00

..

fsl

driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation

2015-02-24 13:09:26 -08:00

mvebu

arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdr

2015-02-06 17:25:03 +01:00