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The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
83 lines
2.6 KiB
C
83 lines
2.6 KiB
C
/*
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* Freescale i.MXS Register Accessors
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __MXS_REGS_COMMON_H__
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#define __MXS_REGS_COMMON_H__
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/*
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* The i.MXS has interesting feature when it comes to register access. There
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* are four kinds of access to one particular register. Those are:
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*
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* 1) Common read/write access. To use this mode, just write to the address of
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* the register.
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* 2) Set bits only access. To set bits, write which bits you want to set to the
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* address of the register + 0x4.
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* 3) Clear bits only access. To clear bits, write which bits you want to clear
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* to the address of the register + 0x8.
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* 4) Toggle bits only access. To toggle bits, write which bits you want to
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* toggle to the address of the register + 0xc.
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*
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* IMPORTANT NOTE: Not all registers support accesses 2-4! Also, not all bits
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* can be set/cleared by pure write as in access type 1, some need to be
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* explicitly set/cleared by using access type 2-3.
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*
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* The following macros and structures allow the user to either access the
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* register in all aforementioned modes (by accessing reg_name, reg_name_set,
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* reg_name_clr, reg_name_tog) or pass the register structure further into
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* various functions with correct type information (by accessing reg_name_reg).
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*
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*/
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#define __mxs_reg_8(name) \
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uint8_t name[4]; \
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uint8_t name##_set[4]; \
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uint8_t name##_clr[4]; \
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uint8_t name##_tog[4]; \
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#define __mxs_reg_32(name) \
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uint32_t name; \
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uint32_t name##_set; \
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uint32_t name##_clr; \
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uint32_t name##_tog;
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struct mxs_register_8 {
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__mxs_reg_8(reg)
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};
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struct mxs_register_32 {
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__mxs_reg_32(reg)
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};
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#define mxs_reg_8(name) \
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union { \
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struct { __mxs_reg_8(name) }; \
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struct mxs_register_8 name##_reg; \
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};
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#define mxs_reg_32(name) \
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union { \
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struct { __mxs_reg_32(name) }; \
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struct mxs_register_32 name##_reg; \
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};
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#endif /* __MXS_REGS_COMMON_H__ */
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