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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
102 lines
2.1 KiB
C
102 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2008,2009
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <malloc.h>
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#include <pci.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep,
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enum pci_size_t size)
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{
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outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR);
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switch (size) {
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case PCI_SIZE_8:
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*valuep = inb(PCI_REG_DATA + (offset & 3));
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break;
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case PCI_SIZE_16:
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*valuep = inw(PCI_REG_DATA + (offset & 2));
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break;
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case PCI_SIZE_32:
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*valuep = inl(PCI_REG_DATA);
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break;
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}
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return 0;
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}
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int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value,
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enum pci_size_t size)
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{
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outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR);
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switch (size) {
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case PCI_SIZE_8:
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outb(value, PCI_REG_DATA + (offset & 3));
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break;
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case PCI_SIZE_16:
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outw(value, PCI_REG_DATA + (offset & 2));
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break;
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case PCI_SIZE_32:
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outl(value, PCI_REG_DATA);
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break;
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}
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return 0;
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}
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int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set,
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enum pci_size_t size)
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{
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ulong value;
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int ret;
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ret = pci_x86_read_config(bdf, offset, &value, size);
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if (ret)
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return ret;
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value &= ~clr;
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value |= set;
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return pci_x86_write_config(bdf, offset, value, size);
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}
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void pci_assign_irqs(int bus, int device, u8 irq[4])
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{
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pci_dev_t bdf;
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int func;
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u16 vendor;
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u8 pin, line;
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for (func = 0; func < 8; func++) {
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bdf = PCI_BDF(bus, device, func);
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pci_read_config16(bdf, PCI_VENDOR_ID, &vendor);
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if (vendor == 0xffff || vendor == 0x0000)
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continue;
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pci_read_config8(bdf, PCI_INTERRUPT_PIN, &pin);
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/* PCI spec says all values except 1..4 are reserved */
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if ((pin < 1) || (pin > 4))
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continue;
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line = irq[pin - 1];
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if (!line)
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continue;
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debug("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n",
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line, bus, device, func, 'A' + pin - 1);
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pci_write_config8(bdf, PCI_INTERRUPT_LINE, line);
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}
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}
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