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You can now configure LAG on VSC9953's ports using the command:
ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>}
A port must belong to a single LAG. By default, a port
belongs to a LAG equal to the port's number.
For each frame, a hash will be calculated based on
Source/Destination MAC addresses, Source/Destination IP(v4/v6)
addresses, Source/Destination ports. This hash will be used to
select a single egress port from LAG. This also assures
that frames from the same flow will always have the
same egress port.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
64 lines
2.9 KiB
Plaintext
64 lines
2.9 KiB
Plaintext
This file contains information for VSC9953, a Vitesse L2 Switch IP
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which is integrated in the T1040/T1020 Freescale SoCs.
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About Device:
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=============
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VSC9953 is an 8-port Gigabit Ethernet switch supports the following features:
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- 8192 MAC addresses
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- Static Address provisioning
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- Dynamic learning of MAC addresses and aging
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- 4096 VLANs
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- Independent and shared VLAN learning (IVL, SVL)
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- Policing with storm control and MC/BC protection
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- IPv4 and IPv6 multicast
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- Jumbo frames (9.6 KB)
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- Access Control List
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- VLAN editing, translation and remarking
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- RMON counters per port
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Switch interfaces:
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- 8 Gigabit switch ports (ports 0 to 7) are external and are connected to external PHYs
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- 2 switch ports (ports 8 and 9) of 2.5 G are connected (fixed links)
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to FMan ports (FM1@DTSEC1 and FM1@DTSEC2)
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Commands Overview:
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=============
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Commands supported
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- enable/disable a port or show its configuration (speed, duplexity, status, etc.)
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- port statistics
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- MAC learning
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- add/remove FDB entries
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- Port-based VLAN
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- Private/Shared VLAN learning
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- VLAN ingress filtering
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- Port LAG
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Commands syntax
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ethsw [port <port_no>] { enable | disable | show } - enable/disable a port; show a port's configuration
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ethsw [port <port_no>] statistics { [help] | [clear] } - show an l2 switch port's statistics
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ethsw [port <port_no>] learning { [help] | show | auto | disable } - enable/disable/show learning configuration on a port
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ethsw [port <port_no>] [vlan <vid>] fdb { [help] | show | flush | { add | del } <mac> } - add/delete a mac entry in FDB; use show to see FDB entries;
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if [vlan <vid>] is missing, VID 1 will be used
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ethsw [port <port_no>] pvid { [help] | show | <pvid> } - set/show PVID (ingress and egress VLAN tagging) for a port
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ethsw [port <port_no>] vlan { [help] | show | add <vid> | del <vid> } - add a VLAN to a port (VLAN members)
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ethsw [port <port_no>] untagged { [help] | show | all | none | pvid } - set egress tagging mode for a port
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ethsw [port <port_no>] egress tag { [help] | show | pvid | classified } - configure VID source for egress tag.
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Tag's VID could be the frame's classified VID or the PVID of the port
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ethsw vlan fdb { [help] | show | shared | private } - make VLAN learning shared or private
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ethsw [port <port_no>] ingress filtering { [help] | show | enable | disable } - enable/disable VLAN ingress filtering on port
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ethsw [port <port_no>] aggr { [help] | show | <lag_group_no> } - get/set LAG group for a port
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=> ethsw show
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Port Status Link Speed Duplex
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0 enabled down 10 half
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1 enabled down 10 half
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2 enabled down 10 half
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3 enabled up 1000 full
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4 disabled down - half
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5 disabled down - half
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6 disabled down - half
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7 disabled down - half
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8 enabled up 2500 full
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9 enabled up 2500 full
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=>
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