Patrick Delaunay d219415544 stm32mp1: clk: support digital bypass ...

HSE and LSE bypass shall support both analog and digital signals.
This patch add a way to select digital bypas case in the device tree
and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register
during clock tree initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

2018-07-20 15:55:07 -04:00

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microchip,pic32-clock.txt

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nvidia,tegra20-car.txt

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rockchip,rk3188-cru.txt

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rockchip,rk3288-cru.txt

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rockchip,rk3288-dmc.txt

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rockchip,rk3368-dmc.txt

rockchip: rk3368: add DRAM controller driver with DRAM initialisation

2017-08-13 17:12:33 +02:00

rockchip,rk3399-dmc.txt

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rockchip.txt

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snps,hsdk-cgu.txt

ARC: clk: introduce HSDK CGU clock driver

2017-12-11 11:36:23 +03:00

st,stm32-rcc.txt

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st,stm32h7-rcc.txt

dm: clk: add clk driver support for stm32h7 SoCs

2017-09-22 07:40:01 -04:00

st,stm32mp1.txt

stm32mp1: clk: support digital bypass

2018-07-20 15:55:07 -04:00