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u-boot-megous/arch/arm/dts/rk3399-u-boot.dtsi
Jonas Karlman 104779b411 rockchip: rk3399: Sync SoC DT from Linux kernel v6.8
Sync RK3399 SoC common .dtsi-files from Linux kernel v6.8.

The ethernet0 alias is moved to rk3399-u-boot.dtsi in this patch, the
alias will be added in board specific .dts-files and finally removed
from rk3399-u-boot.dtsi in following patches.

The rng node is replaced with crypto0 and crypto1, both can supply
random numbers.

There is no other intended change with this patch.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#include "rockchip-u-boot.dtsi"
/ {
aliases {
ethernet0 = &gmac;
mmc0 = &sdhci;
mmc1 = &sdmmc;
pci0 = &pcie0;
spi1 = &spi1;
};
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
pmusgrf: syscon@ff330000 {
compatible = "rockchip,rk3399-pmusgrf", "syscon";
reg = <0x0 0xff330000 0x0 0xe3d4>;
bootph-all;
};
cic: syscon@ff620000 {
compatible = "rockchip,rk3399-cic", "syscon";
reg = <0x0 0xff620000 0x0 0x100>;
bootph-all;
};
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
&binman {
multiple-images;
rom {
filename = "u-boot.rom";
size = <0x400000>;
pad-byte = <0xff>;
mkimage {
args = "-n rk3399 -T rkspi";
u-boot-spl {
};
};
u-boot-img {
offset = <0x40000>;
};
u-boot {
offset = <0x300000>;
};
fdtmap {
};
};
};
#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
&cru {
bootph-all;
};
&dfi {
bootph-all;
};
&dmc {
reg = <0x0 0xffa80000 0x0 0x0800
0x0 0xffa80800 0x0 0x1800
0x0 0xffa82000 0x0 0x2000
0x0 0xffa84000 0x0 0x1000
0x0 0xffa88000 0x0 0x0800
0x0 0xffa88800 0x0 0x1800
0x0 0xffa8a000 0x0 0x2000
0x0 0xffa8c000 0x0 0x1000>;
bootph-all;
status = "okay";
};
&emmc_phy {
bootph-pre-ram;
bootph-some-ram;
};
&grf {
bootph-all;
};
&pcfg_pull_none {
bootph-all;
};
&pcfg_pull_up {
bootph-all;
};
&pinctrl {
bootph-all;
};
&pmu {
bootph-all;
};
&pmucru {
bootph-all;
};
&pmugrf {
bootph-all;
};
&sdhci {
bootph-pre-ram;
bootph-some-ram;
max-frequency = <200000000>;
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
};
&sdmmc {
bootph-pre-ram;
bootph-some-ram;
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
};
&sdmmc_bus4 {
bootph-pre-ram;
bootph-some-ram;
};
&sdmmc_cd {
bootph-pre-ram;
bootph-some-ram;
};
&sdmmc_clk {
bootph-pre-ram;
bootph-some-ram;
};
&sdmmc_cmd {
bootph-pre-ram;
bootph-some-ram;
};
&spi1_clk {
bootph-pre-ram;
bootph-some-ram;
};
&spi1_cs0 {
bootph-pre-ram;
bootph-some-ram;
};
&spi1_rx {
bootph-pre-ram;
bootph-some-ram;
};
&spi1_tx {
bootph-pre-ram;
bootph-some-ram;
};
&uart2 {
bootph-all;
clock-frequency = <24000000>;
};
&uart2c_xfer {
bootph-pre-sram;
bootph-pre-ram;
};
&vopb {
bootph-some-ram;
};
&vopl {
bootph-some-ram;
};
&xin24m {
bootph-all;
};