York Sun dda3b610ee arm/ls1021a: Add workaround for DDR erratum A008378 ...

Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

Signed-off-by: York Sun <yorksun@freescale.com>

2015-01-23 22:29:13 -06:00

..

arm_ddr_gen3.c

fsl/sleep: updated the deep sleep framework for QorIQ platforms

2014-12-11 09:41:18 -08:00

ctrl_regs.c

driver/ddr/fsl: Fix MRC_CYC calculation for DDR3

2014-12-15 09:15:12 -08:00

ddr1_dimm_params.c

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ddr2_dimm_params.c

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ddr3_dimm_params.c

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ddr4_dimm_params.c

driver/ddr/fsl: Add workaround for faulty SPD

2014-12-05 08:06:14 -08:00

fsl_ddr_gen4.c

arm/ls1021a: Add workaround for DDR erratum A008378

2015-01-23 22:29:13 -06:00

interactive.c

driver/ddr/fsl: Fix tXP and tCKE

2014-09-25 08:36:18 -07:00

lc_common_dimm_params.c

linux/kernel.h: sync min, max, min3, max3 macros with Linux

2014-11-23 06:48:30 -05:00

main.c

linux/kernel.h: sync min, max, min3, max3 macros with Linux

2014-11-23 06:48:30 -05:00

Makefile

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

2014-04-22 17:58:48 -07:00

mpc85xx_ddr_gen1.c

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mpc85xx_ddr_gen2.c

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mpc85xx_ddr_gen3.c

fsl/sleep: updated the deep sleep framework for QorIQ platforms

2014-12-11 09:41:18 -08:00

mpc86xx_ddr.c

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options.c

driver/ddr/fsl: Fix tXP and tCKE

2014-09-25 08:36:18 -07:00

util.c

driver/ddr: Restruct driver to allow standalone memory space

2014-09-25 08:36:18 -07:00