Stephen Warren a839c3641e ARM: tegra: align carveout size ...

Align the size of the carveout region to 2M. This ensures that the size
can be accurately represented by an LPAE page table that uses sections.

This solves a bug (hang at boot time soon after printing the DRAM size)
that only shows up when the following two commits are merged together:
d32e86bde8 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d ARM: tegra: avoid using secure carveout RAM

Cc: Mark Kettenis <kettenis@openbsd.org>
Cc: Alexander Graf <agraf@suse.de>
Acked-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

2018-08-01 20:06:10 -04:00

..

tegra20

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tegra30

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tegra114

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2018-05-07 09:34:12 -04:00

tegra124

Kconfig: Sort bool, default, select and imply options

2018-07-30 07:18:48 -04:00

tegra186

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2018-05-07 09:34:12 -04:00

tegra210

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ap.c

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arm64-mmu.c

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board2.c

ARM: tegra: align carveout size

2018-08-01 20:06:10 -04:00

board186.c

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board.c

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cache.c

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clock.c

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cmd_enterrcm.c

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cpu.c

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cpu.h

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dt-setup.c

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emc.c

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emc.h

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gpu.c

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ivc.c

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Kconfig

dm: Change CMD_DM enabling

2018-07-30 07:18:48 -04:00

lowlevel_init.S

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Makefile

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pinmux-common.c

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powergate.c

Revert "tegra: Introduce SRAM repair on tegra124"

2018-07-26 13:15:29 -07:00

psci.S

tegra: psci: save context id in cpu_on command

2018-05-07 11:52:55 -04:00

spl.c

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sys_info.c

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xusb-padctl-common.c

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xusb-padctl-common.h

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xusb-padctl-dummy.c

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