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c00b289b9636a6f545deb0d068d2b8c51a01b0de
u-boot-megous/arch/riscv/include/asm
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Heinrich Schuchardt d14222e7c1 risc-v: implement DBCN write byte 
The DBCN extension provides a Console Write Byte call.
Implement function sbi_dbcn_write_byte to invoke it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:55 +08:00
..
arch-andes
riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()
2023-02-17 19:07:48 +08:00
arch-fu540
board: sifive: use ccache driver instead of helper function
2021-09-07 10:34:29 +08:00
arch-fu740
include: Remove unused header files
2023-05-31 12:31:47 -04:00
arch-generic
dm: treewide: Rename ..._platdata variables to just ..._plat
2020-12-13 16:51:09 -07:00
arch-jh7110
eeprom: starfive: Enable ID EEPROM configuration
2023-07-12 13:21:40 +08:00
acpi_table.h
acpi: Add missing RISC-V acpi_table header
2023-08-02 11:02:33 +08:00
asm.h
riscv: Sync csr.h with Linux kernel v5.2
2019-08-15 13:42:28 +08:00
atomic.h
riscv: add generic link for <asm/atomic.h>
2023-07-06 17:28:08 +08:00
barrier.h
riscv: make use of the barrier functions from Linux
2018-11-26 13:57:30 +08:00
bitops.h
riscv: define test_and_{set,clear}_bit in asm/bitops.h
2023-07-06 17:28:08 +08:00
byteorder.h
…
cache.h
riscv: lib: modify the indent
2021-09-07 10:34:29 +08:00
config.h
Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
2022-07-07 14:01:09 -04:00
csr.h
riscv: Add option to support RISC-V privileged spec 1.9
2020-07-01 15:01:22 +08:00
dma-mapping.h
dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>
2020-02-19 21:27:30 +08:00
encoding.h
global: Finish CONFIG -> CFG migration
2023-01-20 12:27:24 -05:00
global_data.h
riscv: Rename SiFive CLINT to RISC-V ALINT
2023-07-12 13:21:40 +08:00
gpio.h
gpio: sifive: add support for DM based gpio driver for FU540-SoC
2019-10-18 09:04:01 +08:00
io.h
riscv: Correct a comment in io.h
2023-04-20 20:45:08 +08:00
linkage.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
posix_types.h
riscv: fix use of incorrectly sized variables
2018-11-26 13:57:29 +08:00
processor.h
…
ptrace.h
riscv: checkpatch: Fix alignment should match open parenthesis
2018-03-30 13:13:22 +08:00
sbi.h
risc-v: implement DBCN write byte
2023-09-05 10:53:55 +08:00
sections.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
setjmp.h
SPDX: Convert single license tags to Linux Kernel style
2018-05-29 14:44:21 +08:00
smp.h
doc: replace @return by Return:
2022-01-19 18:11:34 +01:00
spl.h
common: spl: Add spl NVMe boot support
2023-06-19 17:47:41 -04:00
string.h
riscv: assembler versions of memcpy, memmove, memset
2021-04-08 15:37:29 +08:00
syscon.h
riscv: Rename SiFive CLINT to RISC-V ALINT
2023-07-12 13:21:40 +08:00
system.h
riscv: implement local_irq_{save,restore} macros
2023-07-06 17:28:08 +08:00
types.h
riscv: Change phys_addr_t and phys_size_t to 64-bit
2021-02-03 03:38:41 -07:00
u-boot-riscv.h
riscv: Provide a mechanism to fix DT for reserved memory
2020-04-23 10:14:16 +08:00
u-boot.h
bdinfo: riscv: Use generic bd_info
2020-06-25 13:24:10 -04:00
unaligned.h
…